@@ -247,18 +247,6 @@ else()
247247  endif ()
248248endif ()
249249
250- #------------------------------------------------------------------------------- 
251- # HIP Default Target Configuration. 
252- # 
253- # HIP does not have a stable instruction set like NVIDIA PTX; it requires 
254- # binaries specific to a target chip. We have tests that generate and run 
255- # deployable code which need to specify the proper target chip. 
256- #------------------------------------------------------------------------------- 
257- 
258- set (IREE_HIP_TEST_TARGET_CHIP ""  CACHE  STRING 
259-   "Target chip for HIP tests that need to compile device code. \  
260-    Defaults to empty string to disable tests." )
261- 
262250#------------------------------------------------------------------------------- 
263251# Runtime HAL Driver Options 
264252# By default, all runtime drivers supported by the current platform which do 
@@ -418,6 +406,44 @@ if(IREE_HAL_EXECUTABLE_PLUGIN_SYSTEM_LIBRARY)
418406  message (STATUS  "  - system-library" )
419407endif ()
420408
409+ #------------------------------------------------------------------------------- 
410+ # HIP Default Target Configuration. 
411+ # 
412+ # HIP does not have a stable instruction set like NVIDIA PTX; it requires 
413+ # binaries specific to a target chip. We have tests that generate and run 
414+ # deployable code which need to specify the proper target chip. 
415+ #------------------------------------------------------------------------------- 
416+ 
417+ # When ROCm is detected on the build host and a corresponding HAL driver is enabled, 
418+ # force the user to make a conscious decision to enable or disable ROCm testing. 
419+ # It's hard to enable automatically for a given target 
420+ # chip because that would rely too much on guessing what the target chip is. 
421+ # But silently continuing with ROCm testing disabled by default has also been 
422+ # surprising. 
423+ if  ((IREE_HAL_DRIVER_HIP OR  IREE_HAL_DRIVER_AMDGPU) AND  NOT  DEFINED  CACHE {IREE_HIP_TEST_TARGET_CHIP})
424+   find_program (_ROCMINFO_COMMAND rocminfo)
425+   if  (_ROCMINFO_COMMAND)
426+     execute_process (COMMAND  ${_ROCMINFO_COMMAND}  OUTPUT_VARIABLE  _ROCMINFO_OUTPUT)
427+     string (REGEX  MATCH "Name:[ ]*gfx[0-9]+"  _ROCMINFO_OUTPUT_NAME_LINE "${_ROCMINFO_OUTPUT} " )
428+     string (REGEX  MATCH "gfx[0-9]+"  _ROCMINFO_GFX_NAME "${_ROCMINFO_OUTPUT_NAME_LINE} " )
429+     if  (_ROCMINFO_GFX_NAME)
430+       # This needs to be FATAL_ERROR not SEND_ERROR, else the set(CACHE) below 
431+       # will prematurely hide this error in case cmake is run again without 
432+       # addressing the issue. 
433+       # Also note that in the unusual case of multiple devices with distinct 
434+       # architectures, we only detected one of them, so the message needs to 
435+       # be conservative. 
436+       message (FATAL_ERROR "At least one ROCm device detected, with architecture: ${_ROCMINFO_GFX_NAME} .\n " 
437+                       "Explicitly either enable or disable ROCm testing.\n " 
438+                       "To enable ROCm testing for ${_ROCMINFO_GFX_NAME} :\n     cmake -DIREE_HIP_TEST_TARGET_CHIP=${_ROCMINFO_GFX_NAME} \n " 
439+                       "To disable ROCm testing:\n     cmake -DIREE_HIP_TEST_TARGET_CHIP=\n "  )
440+     endif ()
441+   endif ()
442+ endif ()
443+ set (IREE_HIP_TEST_TARGET_CHIP ""  CACHE  STRING 
444+   "Target chip for HIP tests that need to compile device code. \  
445+    Defaults to empty string to disable tests." )
446+ 
421447#------------------------------------------------------------------------------- 
422448# Compiler Target Options 
423449# We try to keep the default build as simple as possible and disable heavy targets. 
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