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Illegal instruction on core load when compiled with any optimizations #18

@thieman

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@thieman

I'm just starting to investigate this but I figured I'd post it now. I'm developing a core which loads and runs fine when compiled at opt-level=0 (debug level default). However, if I compile it with any other level of optimizations, whether speed- or size-based, I get an illegal instruction core dump as soon as I load the core in Retroarch. This is before actually attempting to load any content, this is when I select "Load Core" from the main menu. I'm seeing this both in a Linux->Windows GNU crosscompile, and in a Mac native compile.

If I don't make progress soon I'll try to come up with a minimal repro, but a larger repro is available now by cloning https://github.com/thieman/exa-rs at commit 6035360da4f74d72705d88c234d4328a7547a291.

I'm also wondering if this may be related to #13.

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