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simz80.c
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simz80.c
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/* Z80 instruction set simulator.
Copyright (C) 1995 Frank D. Cringle.
This file is part of yaze - yet another Z80 emulator.
Yaze is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 of the License, or (at your
option) any later version.
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* This file was generated from simz80.pl
with the following choice of options */
char *perl_params =
"combine=0,"
"optab=0,"
"cb_inline=0,"
"dfd_inline=0,"
"ed_inline=1";
#include "simz80.h"
static const unsigned char partab[256] = {
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,
4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,
};
#define parity(x) partab[(x)&0xff]
#ifdef DEBUG
volatile int stopsim;
#endif
#define POP(x) do { \
FASTREG y = RAM(SP); SP++; \
x = y + (RAM(SP) << 8); SP++; \
} while (0)
#define PUSH(x) do { \
--SP; RAM(SP) = (x) >> 8; \
--SP; RAM(SP) = x; \
} while (0)
#define JPC(cond) PC = cond ? GetWORD(PC) : PC+2
#define CALLC(cond) { \
if (cond) { \
FASTREG adrr = GetWORD(PC); \
PUSH(PC+2); \
PC = adrr; \
} \
else \
PC += 2; \
}
/* load Z80 registers into (we hope) host registers */
#define LOAD_STATE() \
PC = pc; \
AF = af[af_sel]; \
BC = regs[regs_sel].bc; \
DE = regs[regs_sel].de; \
HL = regs[regs_sel].hl; \
SP = sp
/* load Z80 registers into (we hope) host registers */
#define DECLARE_STATE() \
FASTREG PC = pc; \
FASTREG AF = af[af_sel]; \
FASTREG BC = regs[regs_sel].bc; \
FASTREG DE = regs[regs_sel].de; \
FASTREG HL = regs[regs_sel].hl; \
FASTREG SP = sp
/* save Z80 registers back into memory */
#define SAVE_STATE() \
pc = PC; \
af[af_sel] = AF; \
regs[regs_sel].bc = BC; \
regs[regs_sel].de = DE; \
regs[regs_sel].hl = HL; \
sp = SP
static void
cb_prefix(FASTREG adr)
{
DECLARE_STATE();
FASTWORK temp, acu, op, cbits;
switch ((op = GetBYTE(PC)) & 7) {
case 0: ++PC; acu = hreg(BC); break;
case 1: ++PC; acu = lreg(BC); break;
case 2: ++PC; acu = hreg(DE); break;
case 3: ++PC; acu = lreg(DE); break;
case 4: ++PC; acu = hreg(HL); break;
case 5: ++PC; acu = lreg(HL); break;
case 6: ++PC; acu = GetBYTE(adr); break;
case 7: ++PC; acu = hreg(AF); break;
}
switch (op & 0xc0) {
case 0x00: /* shift/rotate */
switch (op & 0x38) {
case 0x00: /* RLC */
temp = (acu << 1) | (acu >> 7);
cbits = temp & 1;
goto cbshflg1;
case 0x08: /* RRC */
temp = (acu >> 1) | (acu << 7);
cbits = temp & 0x80;
goto cbshflg1;
case 0x10: /* RL */
temp = (acu << 1) | TSTFLAG(C);
cbits = acu & 0x80;
goto cbshflg1;
case 0x18: /* RR */
temp = (acu >> 1) | (TSTFLAG(C) << 7);
cbits = acu & 1;
goto cbshflg1;
case 0x20: /* SLA */
temp = acu << 1;
cbits = acu & 0x80;
goto cbshflg1;
case 0x28: /* SRA */
temp = (acu >> 1) | (acu & 0x80);
cbits = acu & 1;
goto cbshflg1;
case 0x30: /* SLIA */
temp = (acu << 1) | 1;
cbits = acu & 0x80;
goto cbshflg1;
case 0x38: /* SRL */
temp = acu >> 1;
cbits = acu & 1;
cbshflg1:
AF = (AF & ~0xff) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
parity(temp) | !!cbits;
}
break;
case 0x40: /* BIT */
if (acu & (1 << ((op >> 3) & 7)))
AF = (AF & ~0xfe) | 0x10 |
(((op & 0x38) == 0x38) << 7);
else
AF = (AF & ~0xfe) | 0x54;
if ((op&7) != 6)
AF |= (acu & 0x28);
temp = acu;
break;
case 0x80: /* RES */
temp = acu & ~(1 << ((op >> 3) & 7));
break;
case 0xc0: /* SET */
temp = acu | (1 << ((op >> 3) & 7));
break;
}
switch (op & 7) {
case 0: Sethreg(BC, temp); break;
case 1: Setlreg(BC, temp); break;
case 2: Sethreg(DE, temp); break;
case 3: Setlreg(DE, temp); break;
case 4: Sethreg(HL, temp); break;
case 5: Setlreg(HL, temp); break;
case 6: PutBYTE(adr, temp); break;
case 7: Sethreg(AF, temp); break;
}
SAVE_STATE();
}
static FASTREG
dfd_prefix(FASTREG IXY)
{
DECLARE_STATE();
FASTWORK temp, adr, acu, op, sum, cbits;
switch (++PC, op = GetBYTE(PC-1)) {
case 0x09: /* ADD IXY,BC */
IXY &= 0xffff;
BC &= 0xffff;
sum = IXY + BC;
cbits = (IXY ^ BC ^ sum) >> 8;
IXY = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x19: /* ADD IXY,DE */
IXY &= 0xffff;
DE &= 0xffff;
sum = IXY + DE;
cbits = (IXY ^ DE ^ sum) >> 8;
IXY = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x21: /* LD IXY,nnnn */
IXY = GetWORD(PC);
PC += 2;
break;
case 0x22: /* LD (nnnn),IXY */
temp = GetWORD(PC);
PutWORD(temp, IXY);
PC += 2;
break;
case 0x23: /* INC IXY */
++IXY;
break;
case 0x24: /* INC IXYH */
IXY += 0x100;
temp = hreg(IXY);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x25: /* DEC IXYH */
IXY -= 0x100;
temp = hreg(IXY);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x26: /* LD IXYH,nn */
Sethreg(IXY, GetBYTE(PC)); ++PC;
break;
case 0x29: /* ADD IXY,IXY */
IXY &= 0xffff;
sum = IXY + IXY;
cbits = (IXY ^ IXY ^ sum) >> 8;
IXY = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x2A: /* LD IXY,(nnnn) */
temp = GetWORD(PC);
IXY = GetWORD(temp);
PC += 2;
break;
case 0x2B: /* DEC IXY */
--IXY;
break;
case 0x2C: /* INC IXYL */
temp = lreg(IXY)+1;
Setlreg(IXY, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x2D: /* DEC IXYL */
temp = lreg(IXY)-1;
Setlreg(IXY, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x2E: /* LD IXYL,nn */
Setlreg(IXY, GetBYTE(PC)); ++PC;
break;
case 0x34: /* INC (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr)+1;
PutBYTE(adr, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x35: /* DEC (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr)-1;
PutBYTE(adr, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x36: /* LD (IXY+dd),nn */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, GetBYTE(PC)); ++PC;
break;
case 0x39: /* ADD IXY,SP */
IXY &= 0xffff;
SP &= 0xffff;
sum = IXY + SP;
cbits = (IXY ^ SP ^ sum) >> 8;
IXY = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x44: /* LD B,IXYH */
Sethreg(BC, hreg(IXY));
break;
case 0x45: /* LD B,IXYL */
Sethreg(BC, lreg(IXY));
break;
case 0x46: /* LD B,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Sethreg(BC, GetBYTE(adr));
break;
case 0x4C: /* LD C,IXYH */
Setlreg(BC, hreg(IXY));
break;
case 0x4D: /* LD C,IXYL */
Setlreg(BC, lreg(IXY));
break;
case 0x4E: /* LD C,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Setlreg(BC, GetBYTE(adr));
break;
case 0x54: /* LD D,IXYH */
Sethreg(DE, hreg(IXY));
break;
case 0x55: /* LD D,IXYL */
Sethreg(DE, lreg(IXY));
break;
case 0x56: /* LD D,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Sethreg(DE, GetBYTE(adr));
break;
case 0x5C: /* LD E,H */
Setlreg(DE, hreg(IXY));
break;
case 0x5D: /* LD E,L */
Setlreg(DE, lreg(IXY));
break;
case 0x5E: /* LD E,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Setlreg(DE, GetBYTE(adr));
break;
case 0x60: /* LD IXYH,B */
Sethreg(IXY, hreg(BC));
break;
case 0x61: /* LD IXYH,C */
Sethreg(IXY, lreg(BC));
break;
case 0x62: /* LD IXYH,D */
Sethreg(IXY, hreg(DE));
break;
case 0x63: /* LD IXYH,E */
Sethreg(IXY, lreg(DE));
break;
case 0x64: /* LD IXYH,IXYH */
/* nop */
break;
case 0x65: /* LD IXYH,IXYL */
Sethreg(IXY, lreg(IXY));
break;
case 0x66: /* LD H,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Sethreg(HL, GetBYTE(adr));
break;
case 0x67: /* LD IXYH,A */
Sethreg(IXY, hreg(AF));
break;
case 0x68: /* LD IXYL,B */
Setlreg(IXY, hreg(BC));
break;
case 0x69: /* LD IXYL,C */
Setlreg(IXY, lreg(BC));
break;
case 0x6A: /* LD IXYL,D */
Setlreg(IXY, hreg(DE));
break;
case 0x6B: /* LD IXYL,E */
Setlreg(IXY, lreg(DE));
break;
case 0x6C: /* LD IXYL,IXYH */
Setlreg(IXY, hreg(IXY));
break;
case 0x6D: /* LD IXYL,IXYL */
/* nop */
break;
case 0x6E: /* LD L,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Setlreg(HL, GetBYTE(adr));
break;
case 0x6F: /* LD IXYL,A */
Setlreg(IXY, hreg(AF));
break;
case 0x70: /* LD (IXY+dd),B */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, hreg(BC));
break;
case 0x71: /* LD (IXY+dd),C */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, lreg(BC));
break;
case 0x72: /* LD (IXY+dd),D */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, hreg(DE));
break;
case 0x73: /* LD (IXY+dd),E */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, lreg(DE));
break;
case 0x74: /* LD (IXY+dd),H */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, hreg(HL));
break;
case 0x75: /* LD (IXY+dd),L */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, lreg(HL));
break;
case 0x77: /* LD (IXY+dd),A */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
PutBYTE(adr, hreg(AF));
break;
case 0x7C: /* LD A,IXYH */
Sethreg(AF, hreg(IXY));
break;
case 0x7D: /* LD A,IXYL */
Sethreg(AF, lreg(IXY));
break;
case 0x7E: /* LD A,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
Sethreg(AF, GetBYTE(adr));
break;
case 0x84: /* ADD A,IXYH */
temp = hreg(IXY);
acu = hreg(AF);
sum = acu + temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x85: /* ADD A,IXYL */
temp = lreg(IXY);
acu = hreg(AF);
sum = acu + temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x86: /* ADD A,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr);
acu = hreg(AF);
sum = acu + temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x8C: /* ADC A,IXYH */
temp = hreg(IXY);
acu = hreg(AF);
sum = acu + temp + TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x8D: /* ADC A,IXYL */
temp = lreg(IXY);
acu = hreg(AF);
sum = acu + temp + TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x8E: /* ADC A,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr);
acu = hreg(AF);
sum = acu + temp + TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1);
break;
case 0x94: /* SUB IXYH */
temp = hreg(IXY);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0x95: /* SUB IXYL */
temp = lreg(IXY);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0x96: /* SUB (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0x9C: /* SBC A,IXYH */
temp = hreg(IXY);
acu = hreg(AF);
sum = acu - temp - TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0x9D: /* SBC A,IXYL */
temp = lreg(IXY);
acu = hreg(AF);
sum = acu - temp - TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0x9E: /* SBC A,(IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr);
acu = hreg(AF);
sum = acu - temp - TSTFLAG(C);
cbits = acu ^ temp ^ sum;
AF = ((sum & 0xff) << 8) | (sum & 0xa8) |
(((sum & 0xff) == 0) << 6) | (cbits & 0x10) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
((cbits >> 8) & 1);
break;
case 0xA4: /* AND IXYH */
sum = ((AF & (IXY)) >> 8) & 0xff;
AF = (sum << 8) | (sum & 0xa8) |
((sum == 0) << 6) | 0x10 | partab[sum];
break;
case 0xA5: /* AND IXYL */
sum = ((AF >> 8) & IXY) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | 0x10 |
((sum == 0) << 6) | partab[sum];
break;
case 0xA6: /* AND (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
sum = ((AF >> 8) & GetBYTE(adr)) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | 0x10 |
((sum == 0) << 6) | partab[sum];
break;
case 0xAC: /* XOR IXYH */
sum = ((AF ^ (IXY)) >> 8) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xAD: /* XOR IXYL */
sum = ((AF >> 8) ^ IXY) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xAE: /* XOR (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
sum = ((AF >> 8) ^ GetBYTE(adr)) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xB4: /* OR IXYH */
sum = ((AF | (IXY)) >> 8) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xB5: /* OR IXYL */
sum = ((AF >> 8) | IXY) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xB6: /* OR (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
sum = ((AF >> 8) | GetBYTE(adr)) & 0xff;
AF = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | partab[sum];
break;
case 0xBC: /* CP IXYH */
temp = hreg(IXY);
AF = (AF & ~0x28) | (temp & 0x28);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = (AF & ~0xff) | (sum & 0x80) |
(((sum & 0xff) == 0) << 6) | (temp & 0x28) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0xBD: /* CP IXYL */
temp = lreg(IXY);
AF = (AF & ~0x28) | (temp & 0x28);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = (AF & ~0xff) | (sum & 0x80) |
(((sum & 0xff) == 0) << 6) | (temp & 0x28) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0xBE: /* CP (IXY+dd) */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
temp = GetBYTE(adr);
AF = (AF & ~0x28) | (temp & 0x28);
acu = hreg(AF);
sum = acu - temp;
cbits = acu ^ temp ^ sum;
AF = (AF & ~0xff) | (sum & 0x80) |
(((sum & 0xff) == 0) << 6) | (temp & 0x28) |
(((cbits >> 6) ^ (cbits >> 5)) & 4) | 2 |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0xCB: /* CB prefix */
adr = IXY + (signed char) GetBYTE(PC); ++PC;
SAVE_STATE();
cb_prefix(adr);
LOAD_STATE();
break;
case 0xE1: /* POP IXY */
POP(IXY);
break;
case 0xE3: /* EX (SP),IXY */
temp = IXY; POP(IXY); PUSH(temp);
break;
case 0xE5: /* PUSH IXY */
PUSH(IXY);
break;
case 0xE9: /* JP (IXY) */
PC = IXY;
break;
case 0xF9: /* LD SP,IXY */
SP = IXY;
break;
default: PC--; /* ignore DD */
}
SAVE_STATE();
return(IXY);
}
FASTWORK
simz80(FASTREG PC)
{
FASTREG AF = af[af_sel];
FASTREG BC = regs[regs_sel].bc;
FASTREG DE = regs[regs_sel].de;
FASTREG HL = regs[regs_sel].hl;
FASTREG SP = sp;
FASTWORK temp, acu, sum, cbits;
FASTWORK op, adr;
#ifdef DEBUG
while (!stopsim) {
#else
while (1) {
#endif
switch(++PC,RAM(PC-1)) {
case 0x00: /* NOP */
break;
case 0x01: /* LD BC,nnnn */
BC = GetWORD(PC);
PC += 2;
break;
case 0x02: /* LD (BC),A */
PutBYTE(BC, hreg(AF));
break;
case 0x03: /* INC BC */
++BC;
break;
case 0x04: /* INC B */
BC += 0x100;
temp = hreg(BC);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x05: /* DEC B */
BC -= 0x100;
temp = hreg(BC);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x06: /* LD B,nn */
Sethreg(BC, GetBYTE(PC)); ++PC;
break;
case 0x07: /* RLCA */
AF = ((AF >> 7) & 0x0128) | ((AF << 1) & ~0x1ff) |
(AF & 0xc4) | ((AF >> 15) & 1);
break;
case 0x08: /* EX AF,AF' */
af[af_sel] = AF;
af_sel = 1 - af_sel;
AF = af[af_sel];
break;
case 0x09: /* ADD HL,BC */
HL &= 0xffff;
BC &= 0xffff;
sum = HL + BC;
cbits = (HL ^ BC ^ sum) >> 8;
HL = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x0A: /* LD A,(BC) */
Sethreg(AF, GetBYTE(BC));
break;
case 0x0B: /* DEC BC */
--BC;
break;
case 0x0C: /* INC C */
temp = lreg(BC)+1;
Setlreg(BC, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x0D: /* DEC C */
temp = lreg(BC)-1;
Setlreg(BC, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x0E: /* LD C,nn */
Setlreg(BC, GetBYTE(PC)); ++PC;
break;
case 0x0F: /* RRCA */
temp = hreg(AF);
sum = temp >> 1;
AF = ((temp & 1) << 15) | (sum << 8) |
(sum & 0x28) | (AF & 0xc4) | (temp & 1);
break;
case 0x10: /* DJNZ dd */
PC += ((BC -= 0x100) & 0xff00) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x11: /* LD DE,nnnn */
DE = GetWORD(PC);
PC += 2;
break;
case 0x12: /* LD (DE),A */
PutBYTE(DE, hreg(AF));
break;
case 0x13: /* INC DE */
++DE;
break;
case 0x14: /* INC D */
DE += 0x100;
temp = hreg(DE);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x15: /* DEC D */
DE -= 0x100;
temp = hreg(DE);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x16: /* LD D,nn */
Sethreg(DE, GetBYTE(PC)); ++PC;
break;
case 0x17: /* RLA */
AF = ((AF << 8) & 0x0100) | ((AF >> 7) & 0x28) | ((AF << 1) & ~0x01ff) |
(AF & 0xc4) | ((AF >> 15) & 1);
break;
case 0x18: /* JR dd */
PC += (1) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x19: /* ADD HL,DE */
HL &= 0xffff;
DE &= 0xffff;
sum = HL + DE;
cbits = (HL ^ DE ^ sum) >> 8;
HL = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x1A: /* LD A,(DE) */
Sethreg(AF, GetBYTE(DE));
break;
case 0x1B: /* DEC DE */
--DE;
break;
case 0x1C: /* INC E */
temp = lreg(DE)+1;
Setlreg(DE, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x1D: /* DEC E */
temp = lreg(DE)-1;
Setlreg(DE, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x1E: /* LD E,nn */
Setlreg(DE, GetBYTE(PC)); ++PC;
break;
case 0x1F: /* RRA */
temp = hreg(AF);
sum = temp >> 1;
AF = ((AF & 1) << 15) | (sum << 8) |
(sum & 0x28) | (AF & 0xc4) | (temp & 1);
break;
case 0x20: /* JR NZ,dd */
PC += (!TSTFLAG(Z)) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x21: /* LD HL,nnnn */
HL = GetWORD(PC);
PC += 2;
break;
case 0x22: /* LD (nnnn),HL */
temp = GetWORD(PC);
PutWORD(temp, HL);
PC += 2;
break;
case 0x23: /* INC HL */
++HL;
break;
case 0x24: /* INC H */
HL += 0x100;
temp = hreg(HL);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x25: /* DEC H */
HL -= 0x100;
temp = hreg(HL);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x26: /* LD H,nn */
Sethreg(HL, GetBYTE(PC)); ++PC;
break;
case 0x27: /* DAA */
acu = hreg(AF);
temp = ldig(acu);
cbits = TSTFLAG(C);
if (TSTFLAG(N)) { /* last operation was a subtract */
int hd = cbits || acu > 0x99;
if (TSTFLAG(H) || (temp > 9)) { /* adjust low digit */
if (temp > 5)
SETFLAG(H, 0);
acu -= 6;
acu &= 0xff;
}
if (hd) /* adjust high digit */
acu -= 0x160;
}
else { /* last operation was an add */
if (TSTFLAG(H) || (temp > 9)) { /* adjust low digit */
SETFLAG(H, (temp > 9));
acu += 6;
}
if (cbits || ((acu & 0x1f0) > 0x90)) /* adjust high digit */
acu += 0x60;
}
cbits |= (acu >> 8) & 1;
acu &= 0xff;
AF = (acu << 8) | (acu & 0xa8) | ((acu == 0) << 6) |
(AF & 0x12) | partab[acu] | cbits;
break;
case 0x28: /* JR Z,dd */
PC += (TSTFLAG(Z)) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x29: /* ADD HL,HL */
HL &= 0xffff;
sum = HL + HL;
cbits = (HL ^ HL ^ sum) >> 8;
HL = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x2A: /* LD HL,(nnnn) */
temp = GetWORD(PC);
HL = GetWORD(temp);
PC += 2;
break;
case 0x2B: /* DEC HL */
--HL;
break;
case 0x2C: /* INC L */
temp = lreg(HL)+1;
Setlreg(HL, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x2D: /* DEC L */
temp = lreg(HL)-1;
Setlreg(HL, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x2E: /* LD L,nn */
Setlreg(HL, GetBYTE(PC)); ++PC;
break;
case 0x2F: /* CPL */
AF = (~AF & ~0xff) | (AF & 0xc5) | ((~AF >> 8) & 0x28) | 0x12;
break;
case 0x30: /* JR NC,dd */
PC += (!TSTFLAG(C)) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x31: /* LD SP,nnnn */
SP = GetWORD(PC);
PC += 2;
break;
case 0x32: /* LD (nnnn),A */
temp = GetWORD(PC);
PutBYTE(temp, hreg(AF));
PC += 2;
break;
case 0x33: /* INC SP */
++SP;
break;
case 0x34: /* INC (HL) */
temp = GetBYTE(HL)+1;
PutBYTE(HL, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) |
((temp == 0x80) << 2);
break;
case 0x35: /* DEC (HL) */
temp = GetBYTE(HL)-1;
PutBYTE(HL, temp);
AF = (AF & ~0xfe) | (temp & 0xa8) |
(((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) |
((temp == 0x7f) << 2) | 2;
break;
case 0x36: /* LD (HL),nn */
PutBYTE(HL, GetBYTE(PC)); ++PC;
break;
case 0x37: /* SCF */
AF = (AF&~0x3b)|((AF>>8)&0x28)|1;
break;
case 0x38: /* JR C,dd */
PC += (TSTFLAG(C)) ? (signed char) GetBYTE(PC) + 1 : 1;
break;
case 0x39: /* ADD HL,SP */
HL &= 0xffff;
SP &= 0xffff;
sum = HL + SP;
cbits = (HL ^ SP ^ sum) >> 8;
HL = sum;
AF = (AF & ~0x3b) | ((sum >> 8) & 0x28) |
(cbits & 0x10) | ((cbits >> 8) & 1);
break;
case 0x3A: /* LD A,(nnnn) */
temp = GetWORD(PC);
Sethreg(AF, GetBYTE(temp));
PC += 2;
break;