Referring to the Comportable guideline for peripheral device functionality, the module hmac has the following hardware interfaces defined
- Primary Clock:
clk_i
- Other Clocks: none
- Bus Device Interfaces (TL-UL):
tl
- Bus Host Interfaces (TL-UL): none
- Peripheral Pins for Chip IO: none
| Port Name |
Package::Struct |
Type |
Act |
Width |
Description |
| idle |
prim_mubi_pkg::mubi4 |
uni |
req |
1 |
|
| tl |
tlul_pkg::tl |
req_rsp |
rsp |
1 |
|
| Interrupt Name |
Type |
Description |
| hmac_done |
Event |
HMAC/SHA-2 has completed. |
| fifo_empty |
Status |
The message FIFO is empty. This interrupt is raised only if the message FIFO is actually writable by software, i.e., if all of the following conditions are met: i) The HMAC block is not running in HMAC mode and performing the second round of computing the final hash of the outer key as well as the result of the first round using the inner key. ii) Software has not yet written the Process or Stop command to finish the hashing operation. For the interrupt to be raised, the message FIFO must also have been full previously. Otherwise, the hardware empties the FIFO faster than software can fill it and there is no point in interrupting the software to inform it about the message FIFO being empty. |
| hmac_err |
Event |
HMAC error has occurred. ERR_CODE register shows which error occurred. |
| Alert Name |
Description |
| fatal_fault |
This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. |
| Countermeasure ID |
Description |
| HMAC.BUS.INTEGRITY |
End-to-end bus integrity scheme. |