Merge pull request #2 from allexoll/main

published 0.1.0

Author: allexoll

.gitignore

@@ -8,3 +8,5 @@ Cargo.lock
 
 # These are backup files generated by rustfmt
 **/*.rs.bk
+
+/.vscode

Cargo.toml

@@ -4,7 +4,7 @@ authors = ["Alexis Marquet <[email protected]>"]
 name = "lpc546xx-hal"
 categories = ["embedded", "hardware-support", "no-std"]
 description = "Peripheral access API for LPC546xx series microcontrollers"
-documentation = "https::/docs.rs/crate/lpc546-hal"
+documentation = "https://docs.rs/crate/lpc546xx-hal"
 
 keywords = ["arm", "cortex-m", "lpc546xx", "hal"]
 license = "0BSD"
@@ -13,6 +13,10 @@ repository = "https://github.com/lpc-rs/lpc546xx-hal"
 version = "0.1.0"
 
 
+[package.metadata.docs.rs]
+features = ["mcu-LPC54628J512ET180", "rt"]
+targets = ["thumbv7em-none-eabihf"]
+
 [workspace]
 members = ["self-tests"]
 

README.md

@@ -1,4 +1,6 @@
-# lpc546xx-hal
+> PR welcome! 
+
+# lpc546xx-hal [![crates.io](https://img.shields.io/crates/v/lpc546xx-hal.svg)](https://crates.io/crates/lpc546xx-hal) [![Documentation](https://docs.rs/lpc546xx-hal/badge.svg)](https://docs.rs/lpc546xx-hal) 
 
 Hardware Abstraction Layer crate for the lpc546xx family.
 

src/gpio.rs

@@ -1,5 +1,7 @@
 //! GeneralPurpose Input / Output
-//!
+//! 
+//! Some GPIO are missing as of now because IOCON type `A` and type `I` are
+//! not yet implemented
 
 use crate::syscon::Syscon;
 use core::marker::PhantomData;
@@ -25,7 +27,7 @@ pub struct Floating;
 /// pulled down input (type state)
 pub struct PullDown;
 
-// Pulled up input (type state)
+/// Pulled up input (type state)
 pub struct PullUp;
 
 /// Open Drain input or output (type state)
@@ -146,18 +148,7 @@ pub enum IoType {
     TYPEI = 1,
     TYPEA = 2,
 }
-/*
-macro_rules! gpio {
-    (
-        $PX:ident, $Portn:expr,
-        [ 
-            $(
-                $PX_X:ident: ($pioX_X:ident, $ioconpioX_Xreg:ident, $Pinn:expr, $MODE:ty),
-            )+
-        ]
-    )  => {
 
-*/
 macro_rules! gpio {
     ($GPIO:ident, 
         [

src/syscon.rs

@@ -1,3 +1,7 @@
+//! System configuration
+//!
+//!
+//!
 use crate::pac::*;
 use embedded_time::rate::{Extensions, Hertz};
 
@@ -50,6 +54,9 @@ impl Syscon {
     pub fn part_id(&self) -> u32 {
         self.rb.device_id0.read().partid().bits()
     }
+    pub fn get_main_clock_freq(self) -> Hertz {
+        self.clocks.main_clk
+    }
 }
 /// The main API for the SYSCON peripheral
 impl Syscon {
@@ -81,7 +88,7 @@ impl Syscon {
 /// implemented nor used outside of LPC82x HAL. Any changes to this trait won't
 /// be considered breaking changes.
 ///
-/// Compared to https://git.io/fjpf9 (in lpc-rs/lpc8xx-hal/lpc8xx-hal-common)
+/// Compared to <https://git.io/fjpf9> (in lpc-rs/lpc8xx-hal/lpc8xx-hal-common)
 /// we use a less minimal API in order to hide the fact that there are three
 /// different AHLBCKLCTRL?, which a HAL user shouldn't really need to know about.
 pub trait ClockControl {
@@ -300,6 +307,7 @@ impl SysconExt for SYSCON {
 /// Frozen clock frequencies
 ///
 /// The existence of this value indicates that the clock configuration can no longer be changed
+#[allow(dead_code)]
 #[derive(Clone, Copy)]
 pub struct Clocks {
     source: MainClkSelA,
@@ -312,6 +320,8 @@ impl Clocks {
         &self.source
     }
 }
+
+#[allow(dead_code)]
 pub struct Config {
     mainclksela: MainClkSelA,
     mainclkselb: MainClkSelB,