notes.txt

https://github.com/espressif/esptool
https://github.com/pfalcon/esp-open-sdk

https://github.com/pfalcon/esp-open-sdk
BLUE 67x 4Mhz Z80 speed

https://github.com/pfalcon/esp-open-sdk/issues/226
http://www.cpm.z80.de/develop.htm
http://forgetfullbrain.blogspot.my/search/label/ESP%20Native%20SDK%20Programming
http://forgetfullbrain.blogspot.my/2015/08/dissecting-blinky-program.html
http://forgetfullbrain.blogspot.my/2015/08/let-get-connected-esp-as-tcp-server.html
https://github.com/anotherlin/z80emu
http://www.tramm.li/i8080/
http://cpuville.com/cpm_on_new_computer.html
http://www.autometer.de/unix4fun/z80pack/ftp/z80pack-1.32.tgz
http://techtinkering.com/2008/10/17/setting-up-z80pack-to-create-an-emulated-cpm-system/


http://www.classiccmp.org/dunfield/img/index.htm
http://www.gaby.de/sysdisk.htm
00000000 Code
00040000 DriveA
00080000 DriveB
000C0000 DriveC
00100000 DriveD
00140000 DriveE
00180000 DriveF
001C0000 DriveG
00200000 DriveH
00240000 DriveI
00280000 DriveJ
002C0000 DriveK
00300000 DriveL
00340000 DriveM
00380000 DriveN
003C0000 DriveO

1486768789:  shf/rot (<ix,iy>+1)...........  ERROR **** crc expected:713acd81 found:cb288fcc
1486768798:  shf/rot <b,c,d,e,h,l,(hl),a>..  ERROR **** crc expected:eb604d58 found:fac70e40

https://github.com/ptcryan/CPM_Due/blob/master/Z80Dasm.h


http://www.nj7p.org/Computers/Disk%20Subsystems/floppies.html
The first standard disk was the IBM 3740 format 8-inch SSSD disk 241Kb (77 tracks, one head, 
26 each 128 byte sectors per track with a skew of six) disk. This was the disk format used 
for exchange between all the CPM-80 8-inch systems and software providers.


http://schorn.ch/altair.html

https://drive.google.com/drive/folders/0B0qlyUn3r0g-WXVRR2g5VEsxUTg

srec_cat $1 -binary -offset 0x100 -o $1.ihex -intel

https://github.com/cmarrin/m8rscript/blob/75aed9a19627d328618399598fe58fbd99f9f3e6/esp/core/Esp.h#L113

http://nemesis.lonestar.org/computers/tandy/software/apps/m4/qd/opcodes.html

http://www.cirsovius.de/CPM/Projekte/Disassembler/Disassembler-en.html

http://www.s100computers.com/Software%20Folder/Assembler%20Collection/Assembler%20Collection.htm


Before optimization c>a:pip xmodem.asm=m:xmodem.asm
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r

B: ZEXALL   COM : ZEXDOC   COM
b>ZEXDOCrrrrrrrrrrrrrrrrrrr
Z80 instruction exerciser
<adc,sbc> hl,<bc,de,hl,sp>.


----------------------------------------------------------------------------- 

46734978649 cycle(s) emulated.
For a Z80 running at 4.00MHz, that would be 11683 second(s) or 3.25 hour(s).
Zexall took 173 seconds  on Intel Atom CPU N570 @ 1.66GHz

----------------------------------------------------------------------------- 
TIME START 11:42 - DEFAULT ESP SPEED
                                                                                
b>zexall                                                                        
Z80 instruction exerciser                                                       
<adc,sbc> hl,<bc,de,hl,sp>....  OK                                              
add hl,<bc,de,hl,sp>..........  OK                                              
add ix,<bc,de,ix,sp>..........  OK                                              
add iy,<bc,de,iy,sp>..........  OK                                              
aluop a,nn....................  OK                                              
aluop a,<b,c,d,e,h,l,(hl),a>..  OK                                              
aluop a,<ixh,ixl,iyh,iyl>.....  OK                                              
aluop a,(<ix,iy>+1)...........  OK                                              
bit n,(<ix,iy>+1).............  OK                                              
bit n,<b,c,d,e,h,l,(hl),a>....  OK                                              
cpd<r>........................  OK                                              
cpi<r>........................  OK                                              
<daa,cpl,scf,ccf>.............  OK                                              
<inc,dec> a...................  OK                                              
<inc,dec> b...................  OK                                              
<inc,dec> bc..................  OK                                              
<inc,dec> c...................  OK                                              
<inc,dec> d...................  OK                                              
<inc,dec> de..................  OK                                              
<inc,dec> e...................  OK                                              
<inc,dec> h...................  OK                                              
<inc,dec> hl..................  OK                                              
<inc,dec> ix..................  OK                                              
<inc,dec> iy..................  OK                                              
<inc,dec> l...................  OK                                              
<inc,dec> (hl)................  OK                                              
<inc,dec> sp..................  OK                                              
<inc,dec> (<ix,iy>+1).........  OK                                              
<inc,dec> ixh.................  OK                                              
<inc,dec> ixl.................  OK                                              
<inc,dec> iyh.................  OK                                              
<inc,dec> iyl.................  OK                                              
ld <bc,de>,(nnnn).............  OK                                              
ld hl,(nnnn)..................  OK                                              
ld sp,(nnnn)..................  OK                                              
ld <ix,iy>,(nnnn).............  OK                                              
ld (nnnn),<bc,de>.............  OK                                              
ld (nnnn),hl..................  OK                                              
ld (nnnn),sp..................  OK                                              
ld (nnnn),<ix,iy>.............  OK                                              
ld <bc,de,hl,sp>,nnnn.........  OK                                              
ld <ix,iy>,nnnn...............  OK                                              
ld a,<(bc),(de)>..............  OK                                              
ld <b,c,d,e,h,l,(hl),a>,nn....  OK                                              
ld (<ix,iy>+1),nn.............  OK                                              
ld <b,c,d,e>,(<ix,iy>+1)......  OK                                              
ld <h,l>,(<ix,iy>+1)..........  OK                                              
ld a,(<ix,iy>+1)..............  OK                                              
ld <ixh,ixl,iyh,iyl>,nn.......  OK                                              
ld <bcdehla>,<bcdehla>........  OK                                              
ld <bcdexya>,<bcdexya>........  OK                                              
ld a,(nnnn) / ld (nnnn),a.....  OK                                              
ldd<r> (1)....................  OK                                              
ldd<r> (2)....................  OK                                              
ldi<r> (1)....................  OK                                              
ldi<r> (2)....................  OK                                              
neg...........................  OK                                              
<rrd,rld>.....................  OK                                              
<rlca,rrca,rla,rra>...........  OK                                              
shf/rot (<ix,iy>+1)...........  ERROR **** crc expected:710034cb found:cb127686 
shf/rot <b,c,d,e,h,l,(hl),a>..  ERROR **** crc expected:a4255833 found:b5821b2b 
<set,res> n,<bcdehl(hl)a>.....  OK                                              
<set,res> n,(<ix,iy>+1).......  OK                                              
ld (<ix,iy>+1),<b,c,d,e>......  OK                                              
ld (<ix,iy>+1),<h,l>..........  OK                                              
ld (<ix,iy>+1),a..............  OK                                              
ld (<bc,de>),a................  OK                                              
Tests complete�                                                                 
TIME END 15:44
----------------------------------------------------------------------------- 
                                                                        




----------------------------------------------------------------------------- 
TIME START 16:24 - 320? MHz ESP SPEED

b>zexall
Z80 instruction exerciser
<adc,sbc> hl,<bc,de,hl,sp>....  OK
add hl,<bc,de,hl,sp>..........  OK
add ix,<bc,de,ix,sp>..........  OK
add iy,<bc,de,iy,sp>..........  OK
aluop a,nn....................  OK
aluop a,<b,c,d,e,h,l,(hl),a>..  OK
aluop a,<ixh,ixl,iyh,iyl>.....  OK
aluop a,(<ix,iy>+1)...........  OK
bit n,(<ix,iy>+1).............  OK
bit n,<b,c,d,e,h,l,(hl),a>....  OK
cpd<r>........................  OK
cpi<r>........................  OK
<daa,cpl,scf,ccf>.............  OK
<inc,dec> a...................  OK
<inc,dec> b...................  OK
<inc,dec> bc..................  OK
<inc,dec> c...................  OK
<inc,dec> d...................  OK
<inc,dec> de..................  OK
<inc,dec> e...................  OK
<inc,dec> h...................  OK
<inc,dec> hl..................  OK
<inc,dec> ix..................  OK
<inc,dec> iy..................  OK
<inc,dec> l...................  OK
<inc,dec> (hl)................  OK
<inc,dec> sp..................  OK
<inc,dec> (<ix,iy>+1).........  OK
<inc,dec> ixh.................  OK
<inc,dec> ixl.................  OK
<inc,dec> iyh.................  OK
<inc,dec> iyl.................  OK
ld <bc,de>,(nnnn).............  OK
ld hl,(nnnn)..................  OK
ld sp,(nnnn)..................  OK
ld <ix,iy>,(nnnn).............  OK
ld (nnnn),<bc,de>.............  OK
ld (nnnn),hl..................  OK
ld (nnnn),sp..................  OK
ld (nnnn),<ix,iy>.............  OK
ld <bc,de,hl,sp>,nnnn.........  OK
ld <ix,iy>,nnnn...............  OK
ld a,<(bc),(de)>..............  OK
ld <b,c,d,e,h,l,(hl),a>,nn....  OK
ld (<ix,iy>+1),nn.............  OK
ld <b,c,d,e>,(<ix,iy>+1)......  OK
ld <h,l>,(<ix,iy>+1)..........  OK
ld a,(<ix,iy>+1)..............  OK
ld <ixh,ixl,iyh,iyl>,nn.......  OK
ld <bcdehla>,<bcdehla>........  OK
ld <bcdexya>,<bcdexya>........  OK
ld a,(nnnn) / ld (nnnn),a.....  OK
ldd<r> (1)....................  OK
ldd<r> (2)....................  OK
ldi<r> (1)....................  OK
ldi<r> (2)....................  OK
neg...........................  OK
<rrd,rld>.....................  OK
<rlca,rrca,rla,rra>...........  OK
shf/rot (<ix,iy>+1)...........  ERROR **** crc expected:710034cb found:cb127686
shf/rot <b,c,d,e,h,l,(hl),a>..  ERROR **** crc expected:a4255833 found:b5821b2b
<set,res> n,<bcdehl(hl)a>.....  OK
<set,res> n,(<ix,iy>+1).......  OK
ld (<ix,iy>+1),<b,c,d,e>......  OK
ld (<ix,iy>+1),<h,l>..........  OK
ld (<ix,iy>+1),a..............  OK
ld (<bc,de>),a................  OK
Tests complete�

TIME END 18:25
----------------------------------------------------------------------------- 


http://www.seasip.info/Cpm/bdosfunc.html


https://github.com/NF6X/zmac


ftp://ftp.lip6.fr/pub/linux/sunsite/utils/compress/!INDEX.short.html

http://sgate.emt.bme.hu/patai/publications/z80guide/part3.html

http://zxm.speccy.cz/data/Z80%20Bits.html


http://rvbelzen.tripod.com/z80prgtemp/z80prg03.htm

http://wikiti.brandonw.net/index.php?title=Category:Z80_Routines

http://www.z80cpu.eu/mirrors/www.autometer.de/unix4fun/z80pack/index.html

------

Before write cache: 38 seconds assembly time on ESP for SED80 1de29be using "a:z80asm sed80/AF"
With 4K write cache: 17 seconds 
With 4K write cache: 7.5 seconds

-------

http://bbs.espressif.com/viewtopic.php?t=1183

Another useful technique can be found in the ESP8266-Arduino linker script. The excerpt below 
comes from esp8266/Arduino on GitHub:

Code: Select all
  .irom0.text : ALIGN(4)
  {
    _irom0_text_start = ABSOLUTE(.);
    *core_esp8266_*.o(.literal*, .text*)
    *spiffs*.o(.literal*, .text*)
    *.cpp.o(.literal*, .text*)
    *libm.a:(.literal .text .literal.* .text.*)
    *libsmartconfig.a:(.literal .text .literal.* .text.*)
    *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
    _irom0_text_end = ABSOLUTE(.);
    _flash_code_end = ABSOLUTE(.);
  } >irom0_0_seg :irom0_0_phdr

Note, particularly, the fourth and seventh lines. The fourth line causes all of the core 
esp8266/Arduino code .literal and .text sections to be put in .irom0.text. This accomplishes 
exactly the same purpose as does using objcopy to rename the sections. (The fifth line does 
the same for SPIFFS code.) The seventh line causes all .literal and .text sections in the 
libm.a to be put in .irom0.text. This works around a problem where using sqrt() in an application 
would cause the cache RAM size to be exceeded.

-------