colorlight_i9plus

Using LiteX and OpenXC7 on the ColorLight i9+ platform

Getting a ColorLight i9+ Module

• Xilinx XC7A50T FPGA RISC-V Development Board Colorlight i9+ Module on AliExpress.com
• Make sure to buy at least one "Bundle: i9 Plus Ext Board", so you get the CH347 programming interface mentioned below.
• Please refer to wuxx/Colorlight-FPGA-Projects for technical details and FPGA pinout.

Example Projects

• Blinky: Simple verilog example code blinking activity LED connected to pin A18. Please follow the video instructions for compiling bitstream on Windows using Podman containers.
• RISCV Serial: LiteX example using a VexRiscV CPU - implementing a serial console BIOS. Please check the video instructions for compiling the bitstream using GitHub Codespaces in the Cloud.

Hardware Overview

• FPGA: XC7A50T-FGG484 Xilinx Artix-7 Series FPGAs Data Sheet
• SDRAM: M12L64322A 8MB SDRAM (512K x 32 Bit x 4 Banks)
• SPI Flash: MX25L128 16MB
• Ethernet PHY: 1Gb Ethernet PHY Broadcom B50612D x 2

Build OpenOCD for programming ColorLight i9+ using CH347 on Linux

OpenOCD, a versatile tool providing on-chip programming and debugging support, can be used for programming the ColorLight i9+ platform, particularly with the CH347 chip. This guide will take you through the steps to build and configure OpenOCD for this specific use case.

To set up OpenOCD for the CH347 chip on the ColorLight i9+ platform, follow these steps:

# Clone the OpenOCD repository
git clone https://github.com/meriac/openocd

# Navigate to the cloned repository
cd openocd

# Initialize the build configuration
./bootstrap 

# Configure the build specifically for CH347, while disabling warnings as errors
./configure --enable-ch347 --disable-werror

# Compile the source code using multiple threads for faster build
make -j

# Install OpenOCD to the system
sudo make install

Ensure you have all necessary dependencies installed before proceeding with the build. For any issues or detailed documentation, refer to the OpenOCD GitHub repository or the official OpenOCD documentation.

Programming ColorLight i9+ using CH347 on Linux using OpenOCD

After installing OpenOCD in the previous step, you can use the following commands for programming ColorLight i9+ modules:

• ch347prog-sram: For temporarily programming a bitstream file during development.
• ch347prog-flash: For permanently programming a bitstream file.
• ch347prog-probe: For detecting the device and the connected flash memory.

Ensure non-root users can use OpenOCD

To enable non-administrative access to the CH347 chip, it's important to set up a udev rule. After installing this rule, you'll need to reconnect the CH347 USB device for the changes to take effect. Use the following command to install the CH347 udev rule:

sudo install openocd/99-wch-ch347.rules /etc/udev/rules.d/

You might need to create a new user group named plugdev in Linux and add the currently logged in user to this group, you would use the groupadd and usermod commands. Here's how you can do it:

1. Create the plugdev Group: You need to have superuser (root) privileges to create a new group. Use the groupadd command to create the new group:

sudo groupadd plugdev

1. Add the Current User to the plugdev Group: The $USER environment variable in Linux represents the username of the currently logged in user. You can use this variable with the usermod command to add the user to the plugdev group:

sudo usermod -a -G plugdev $USER

• -a stands for append. It is used to add the user to the group without removing them from other groups.
• -G specifies the group name to which the user is being added.

After running these commands, the currently logged in user will be a member of the plugdev group. Note that you might need to log out and log back in for the group change to take effect - or even reboot on some systems.

Deepdive: Understanding the CH347 Chip

• Interfaces and Modes:

  • Provides UART, I2C, and SPI synchronous serial ports, plus a JTAG interface via USB.
  • UART mode includes two high-speed serial ports with RS485 support and hardware flow control.

• Features:

  • 480Mbps high-speed USB device interface.
  • Built-in EEPROM for configurable parameters.
  • Supports 3.3V power supply and housed in a RoHS compliant TSSOP-20 package.

• JTAG Interface:

  • Provides JTAG interface supporting high-speed USB data transfer.
  • Operates a range of devices like CPU, DSP, FPGA, CPLD, and MCU.

• UART Capabilities:

  • Emulates standard UART interface, fully compatible with Windows serial applications.
  • Supports baud rates from 1200bps to 9Mbps, with full duplex and buffer capabilities.

This guide and overview of the CH347 chip's capabilities should provide a solid foundation for using LiteX and OpenXC7 on the ColorLight i9+ platform.