Skip to content

Commit

Permalink
Ready tests for 6.9 version (#6465)
Browse files Browse the repository at this point in the history
In experimenting with bumping the max shader model version in the mesh
nodes branch, many unrelated tests started failing due to being
overly-sensitive to ordering, particularly for metadata. This uses
regular expressions or order-independent checks to make these tests more
robust so they will be able to handle the change to 6.9 when it comes to
main, whatever form that takes.

Followup to #6432
  • Loading branch information
pow2clk authored Oct 14, 2024
1 parent 080aeb7 commit 26d7dd9
Show file tree
Hide file tree
Showing 4 changed files with 130 additions and 101 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -59,11 +59,11 @@ struct RECORD1

// FCGLMD-DAG: !{void (%"struct.DispatchNodeInputRecord<RECORD>"*)* @node_DispatchNodeInputRecord, i32 15, i32 1024, i32 1, i32 1, i32 1, i1 false, !"node_DispatchNodeInputRecord", i32 0, !"", i32 0, i32 -1, i32 64, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 97, i32 0, i32 16, i32 0, i32 0, i32 0, i32 4}

// MD: !{void ()* @node_DispatchNodeInputRecord, !"node_DispatchNodeInputRecord", null, null, ![[DispatchNodeInput:[0-9]+]]}
// MD: ![[DispatchNodeInput]] = !{i32 8, i32 15, i32 13, i32 1, i32 15, !{{[0-9]+}}, i32 16, i32 -1, i32 18, !{{[0-9]+}}, i32 20, ![[EntryInputs:[0-9]+]], i32 4, !{{[0-9]+}}, i32 5, !{{[0-9]+}}}
// MD: ![[EntryInputs]] = !{![[EntryInputs0:[0-9]+]]}
// MD: ![[EntryInputs0]] = !{i32 1, i32 97, i32 2, ![[EntryInputs0Record:[0-9]+]]}
// MD: ![[EntryInputs0Record]] = !{i32 0, i32 16, i32 2, i32 4}
// MD-DAG: !{void ()* @node_DispatchNodeInputRecord, !"node_DispatchNodeInputRecord", null, null, ![[DispatchNodeInput:[0-9]+]]}
// MD-DAG: ![[DispatchNodeInput]] = !{i32 8, i32 15, i32 13, i32 1, i32 15, !{{[0-9]+}}, i32 16, i32 -1, i32 18, !{{[0-9]+}}, i32 20, ![[EntryInputs:[0-9]+]], i32 4, !{{[0-9]+}}, i32 5, !{{[0-9]+}}}
// MD-DAG: ![[EntryInputs]] = !{![[EntryInputs0:[0-9]+]]}
// MD-DAG: ![[EntryInputs0]] = !{i32 1, i32 97, i32 2, ![[EntryInputs0Record:[0-9]+]]}
// MD-DAG: ![[EntryInputs0Record]] = !{i32 0, i32 16, i32 2, i32 4}

[Shader("node")]
[NumThreads(1024,1,1)]
Expand All @@ -78,10 +78,10 @@ void node_DispatchNodeInputRecord(DispatchNodeInputRecord<RECORD> input)

// FCGLMD-DAG: !{void (%struct.EmptyNodeInput*)* @node_EmptyNodeInput, i32 15, i32 2, i32 1, i32 1, i32 2, i1 true, !"node_EmptyNodeInput", i32 0, !"", i32 0, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 9, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0}

// MD: !{void ()* @node_EmptyNodeInput, !"node_EmptyNodeInput", null, null, ![[EmptyNodeInput:[0-9]+]]}
// MD: ![[EmptyNodeInput]] = !{i32 8, i32 15, i32 13, i32 2, i32 14, i1 true, i32 15, !{{[0-9]+}}, i32 16, i32 -1, i32 20, ![[EntryInputs:[0-9]+]], i32 4, !{{[0-9]+}}, i32 5, !{{[0-9]+}}}
// MD: ![[EntryInputs]] = !{![[EntryInputs0:[0-9]+]]}
// MD: ![[EntryInputs0]] = !{i32 1, i32 9}
// MD-DAG: !{void ()* @node_EmptyNodeInput, !"node_EmptyNodeInput", null, null, ![[EmptyNodeInput:[0-9]+]]}
// MD-DAG: ![[EmptyNodeInput]] = !{i32 8, i32 15, i32 13, i32 2, i32 14, i1 true, i32 15, !{{[0-9]+}}, i32 16, i32 -1, i32 20, ![[EntryInputs:[0-9]+]], i32 4, !{{[0-9]+}}, i32 5, !{{[0-9]+}}}
// MD-DAG: ![[EntryInputs]] = !{![[EntryInputs0:[0-9]+]]}
// MD-DAG: ![[EntryInputs0]] = !{i32 1, i32 9}

[Shader("node")]
[NodeLaunch("coalescing")]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ void node085_thread_emptynodeinput(EmptyNodeInput input)

// Metadata for node
// ------------------------------------------------------------------
// CHECK: = !{void ()* @node085_thread_emptynodeinput, !"node085_thread_emptynodeinput", null, null, [[ATTRS:![0-9]+]]}
// CHECK-DAG: = !{void ()* @node085_thread_emptynodeinput, !"node085_thread_emptynodeinput", null, null, [[ATTRS:![0-9]+]]}

// Metadata for node attributes
// Arg #1: ShaderKind Tag (8)
Expand All @@ -39,16 +39,13 @@ void node085_thread_emptynodeinput(EmptyNodeInput input)
// Arg #n: NodeInputs Tag (20)
// Arg #n+1: NodeInputs (metadata)
// ------------------------------------------------------------------
// CHECK: [[ATTRS]] = !{
// CHECK-SAME: i32 8, i32 15, i32 13, i32 2,
// CHECK-SAME: i32 20, [[NODE_IN:![0-9]+]]
// CHECK-SAME: }
// CHECK-DAG: [[ATTRS]] = !{{{.*}}i32 8, i32 15, i32 13, i32 2,{{.*}}i32 20, [[NODE_IN:![0-9]+]]{{.*}}}

// NodeInputs
// Arg #1: NodeIOKind Tag (1)
// Arg #2: EmptyNodeInput (9)
// Arg #3: NodeInputMaxRecordArraySize Tag (2)
// Arg #4: MaxRecordArraySize = 1
// ------------------------------------------------------------------
// CHECK: [[NODE_IN]] = !{[[INPUT0:![0-9]+]]}
// CHECK: [[INPUT0]] = !{i32 1, i32 9}
// CHECK-DAG: [[NODE_IN]] = !{[[INPUT0:![0-9]+]]}
// CHECK-DAG: [[INPUT0]] = !{i32 1, i32 9}
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@ void node02()

// expected-note@+2 {{entry function defined here}}
[Shader("vertex")]
float4 vs(float2 a :A) :SV_POSTION {
float4 vs(float2 a :A) :SV_Position {
float r = 0;
if (1>3)
// expected-error@+1 {{Intrinsic CalculateLevelOfDetail potentially used by 'vs' requires derivatives - only available in pixel, compute, amplification, mesh, or broadcast node shaders}}
Expand Down
Loading

0 comments on commit 26d7dd9

Please sign in to comment.