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Add SMMU Sbsa support #1085

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eeshanl
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@eeshanl eeshanl commented Dec 13, 2024 •
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DO NOT MERGE until qemu 9.1.50 is supported and https://windowspartners.visualstudio.com/MSCoreUEFI/_git/tf-a_mirror?version=GBeeshan_smmu has been integrated into TFA.

  • Configure SMMU config HOB in SbsaPlatformPeiLib
  • Update SbsaQemuAcpiDxe to use ArmMonitor calls to work with updated qemu version 9.1.50

Description

This change adds SMMU/IOMMU support to mu_tiano_platforms. Actual SMMU driver can be found in ArmPkg.

For details on how to complete these options and their meaning refer to CONTRIBUTING.md.

  • Impacts functionality?
  • Impacts security?
  • Breaking change?
  • Includes tests?
  • Includes documentation?

How This Was Tested

Tested on Qemu with mu_tiano_platforms

Integration Instructions

This change relies on:

@github-actions github-actions bot added the impact:non-functional Does not have a functional impact label Dec 13, 2024
@eeshanl eeshanl mentioned this pull request Dec 13, 2024
Merged
6 tasks
@github-actions github-actions bot added the impact:security Has a security impact label Dec 14, 2024
@eeshanl eeshanl self-assigned this Dec 19, 2024
eeshanl added a commit to microsoft/mu_silicon_arm_tiano that referenced this pull request Jan 14, 2025
@eeshanl
Add SMMU Dxe Driver (#320)
bba6299 
## Description

Adds SMMUV3 DXE driver to enable DMA remapping through the IOMMU
protocol.

- Consume SMMU config HOB
- Add IORT
- Configure SMMU, stream table, cmd/event queues
- Configure SMMU page tables
- Add IoMmu protocol
- Enable SMMU for stage 2 translation & DMA remapping

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [ ] Breaking change?
- [ ] Includes tests?
- [x] Includes documentation?
- [ ] Backport to release branch?

## How This Was Tested

Tested in Qemu with mu_tiano_platforms:
- Tested UEFI functionality with SMMU/IOMMU enabled.
- Booted to OS while SMMU/IOMMU enabled.

## Integration Instructions

To integrate with mu_tiano_platforms the following is also required:
- TFA v2.11+ or
<https://windowspartners.visualstudio.com/MSCoreUEFI/_git/tf-a_mirror?version=GBeeshan_smmu>
- Qemu version v9.1.50+ <https://gitlab.com/qemu-project/qemu>
- mu_tiano_platforms -
microsoft/mu_tiano_platforms#1085
@eeshanl eeshanl force-pushed the smmu_platform branch 3 times, most recently from bc3288d to 87a8a91 Compare January 15, 2025 07:38
@eeshanl
Add SMMU Sbsa support
0cf9fb1 
- Configure SMMU config HOB in SbsaPlatformPeiLib
- Update SbsaQemuAcpiDxe to use ArmMonitor calls to work with updated qemu
version 9.1.50
- Relies on cherry-pick 42925c15bee09162c6dfc8c2204843ffac6201c1 in Silicon/Arm/TFA
@eeshanl eeshanl mentioned this pull request Apr 3, 2025
Merged
6 tasks
eeshanl added a commit to microsoft/mu_silicon_arm_tiano that referenced this pull request Apr 9, 2025
@eeshanl
[SQUASH ON REBASE] Add support for N SMMU's and dynamically parse any…
474f1e7 
… IORT config (#360)

## Description

Supports N number of SMMU's
Dynamically parses any generic IORT structure and configures the SMMU's
accordingly

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [x] Breaking change?
- [ ] Includes tests?
- [ ] Includes documentation?
- [ ] Backport to release branch?

## How This Was Tested

Tested on an ARM surface platform and QEMU SBSA.

See microsoft/mu_tiano_platforms#1085 for
platform side changes.

## Integration Instructions

N/A
@makubacki
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Note: @kuqin12 is working on the QEMU 10 update that is needed for this.

eeshanl added a commit to eeshanl/mu_silicon_arm_tiano that referenced this pull request Jun 6, 2025
@eeshanl
Add SMMU Dxe Driver (microsoft#320)
1294cfe 
Adds SMMUV3 DXE driver to enable DMA remapping through the IOMMU
protocol.

- Consume SMMU config HOB
- Add IORT
- Configure SMMU, stream table, cmd/event queues
- Configure SMMU page tables
- Add IoMmu protocol
- Enable SMMU for stage 2 translation & DMA remapping

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [ ] Breaking change?
- [ ] Includes tests?
- [x] Includes documentation?
- [ ] Backport to release branch?

Tested in Qemu with mu_tiano_platforms:
- Tested UEFI functionality with SMMU/IOMMU enabled.
- Booted to OS while SMMU/IOMMU enabled.

To integrate with mu_tiano_platforms the following is also required:
- TFA v2.11+ or
<https://windowspartners.visualstudio.com/MSCoreUEFI/_git/tf-a_mirror?version=GBeeshan_smmu>
- Qemu version v9.1.50+ <https://gitlab.com/qemu-project/qemu>
- mu_tiano_platforms -
microsoft/mu_tiano_platforms#1085

[SQUASH ON REBASE] SmmuDxe updates and bug fixes (microsoft#354)

Bug fix for command queue address not being aligned properly.
Bug fix for event queue consumption.
Dynamically sets starting level of translation for paging from IDR5.OAS
on the smmu.
Improve logging on error.
Safety improvements on updating page table entries in the IoMmu
protocol.

- [x] Impacts functionality?
- [x] Impacts security?
- [ ] Breaking change?
- [ ] Includes tests?
- [ ] Includes documentation?
- [ ] Backport to release branch?

Tested on QEMU SBSA platform as well as a physical ARM surface platform

N/A

[SQUASH ON REBASE] Add support for N SMMU's and dynamically parse any IORT config (microsoft#360)

Supports N number of SMMU's
Dynamically parses any generic IORT structure and configures the SMMU's
accordingly

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [x] Breaking change?
- [ ] Includes tests?
- [ ] Includes documentation?
- [ ] Backport to release branch?

Tested on an ARM surface platform and QEMU SBSA.

See microsoft/mu_tiano_platforms#1085 for
platform side changes.

N/A

[SQUASH ON REBASE] Support Concatenated Translation Tables (microsoft#367)

Fix alignment for page table root to be aligned to the size of maximum
number of allowed concatenated page tables, 16.
For the case where the address width is too large to for the VA bits to
fit within a 9-bit width for the root level, we can extend the level
index bits.
This corresponds to how many page tables can be concatenated. Up to 4
bits of extension are allowed, meaning a total of 16 concatenated
tables.

See: [DDI0487L_a_a-profile_architecture_reference_manual
section](https://developer.arm.com/documentation/ddi0487/latest/)
Section D8.2.2 on Concatenated Translation Tables

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [ ] Breaking change?
- [ ] Includes tests?
- [ ] Includes documentation?
- [ ] Backport to release branch?

Tested on QEMU SBSA as well as a physical arm device.

N/A

Add RMR support for IORT and SmmuDxe IoMmu mappings (microsoft#374)

Add RMR support for IORT and SmmuDxe IoMmu mappings
Parses IORT for RMR node memory range descriptors
Maps them to the SMMU page tables to be used by the IoMmu protocol

Updates TLIBI operation from TLIBI ALL to TLIBI S2 IPA, now invalidates
TLB for InputAddress to Stage 2 SMMU.

Due to an issue seen while testing on a physical arm platform, we see a
0x13 F_PERMISSION fault from the smmu when not setting both r/w bits.
For now, temporarily setting both RW bits in IoMmuSetAttribute
TODO: microsoft#375 Debug
this issue and revert this permissions change.

For details on how to complete these options and their meaning refer to
[CONTRIBUTING.md](https://github.com/microsoft/mu/blob/HEAD/CONTRIBUTING.md).

- [x] Impacts functionality?
- [x] Impacts security?
- [ ] Breaking change?
- [ ] Includes tests?
- [ ] Includes documentation?
- [ ] Backport to release branch?

Tested on QEMU SBSA and physical arm platform

N/A

Update SMMU_CONFIG HOB structure to allow platform to enable/disable individual SMMU's

Allows the platform to toggle translation/bypass (enable/disable) on any SMMU within the IORT during pre-boot.

platform_test
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