Fix PLL timeout value and clear RCC structs

Author: ramielkhatibPQS

stm32f2/stm32f2_hal.c

@@ -17,7 +17,7 @@ void platform_init(void)
 	//HAL_Init();
 
 #if defined(USE_INTERNAL_CLK)
-     RCC_OscInitTypeDef RCC_OscInitStruct;
+     RCC_OscInitTypeDef RCC_OscInitStruct = {0};
      RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
      RCC_OscInitStruct.HSEState       = RCC_HSE_OFF;
      RCC_OscInitStruct.HSIState       = RCC_HSI_ON;
@@ -29,15 +29,15 @@ void platform_init(void)
 	 RCC_OscInitStruct.PLL.PLLQ       = 7;  // divisor for RNG, USB and SDIO
      HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
-     RCC_ClkInitTypeDef RCC_ClkInitStruct;
+     RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
      RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
      RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSI;
      RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
      RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
      RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
      HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_ACR_LATENCY_0WS); // wait states not needed for < 30MHz
 #elif defined(USE_PLL)
-	RCC_OscInitTypeDef RCC_OscInitStruct;
+	RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
 	RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
 	RCC_OscInitStruct.HSIState       = RCC_HSI_ON;  // HSI is needed for the RNG
@@ -51,7 +51,7 @@ void platform_init(void)
         for(;;);
     }
 
-	RCC_ClkInitTypeDef RCC_ClkInitStruct;
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 	RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 	RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
 	RCC_ClkInitStruct.AHBCLKDivider  = HSE_AHBCLKDIV_HVALUE;
@@ -61,7 +61,7 @@ void platform_init(void)
     FLASH->ACR |= 0b111 << 8; //enable ART acceleration
 
 #else
-	RCC_OscInitTypeDef RCC_OscInitStruct;
+	RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
 	RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
 	RCC_OscInitStruct.HSIState       = RCC_HSI_ON;  // HSI is needed for the RNG
@@ -75,7 +75,7 @@ void platform_init(void)
         for(;;);
     }
 
-	RCC_ClkInitTypeDef RCC_ClkInitStruct;
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 	RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 	RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSE;
 	RCC_ClkInitStruct.AHBCLKDivider  = HSE_AHBCLKDIV_HVALUE;

stm32f2/stm32f2xx_hal_rcc_ex.h

@@ -395,7 +395,7 @@ void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit);
   * @brief RCC registers bit address in the alias region
   * @{
   */
-#define PLL_TIMEOUT_VALUE          ((uint32_t)100)  /* 100 ms */
+#define PLL_TIMEOUT_VALUE          ((uint32_t)1E6 * 2U)  /* 2 ms */
 /**
   * @}
   */

stm32f4/stm32f4_hal.c

@@ -32,7 +32,7 @@ void platform_init(void)
 #endif
 
 #if defined(USE_INTERNAL_CLK)
-     RCC_OscInitTypeDef RCC_OscInitStruct;
+     RCC_OscInitTypeDef RCC_OscInitStruct = {0};
      RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
      RCC_OscInitStruct.HSEState       = RCC_HSE_OFF;
      RCC_OscInitStruct.HSIState       = RCC_HSI_ON;
@@ -44,15 +44,15 @@ void platform_init(void)
 	 RCC_OscInitStruct.PLL.PLLQ       = 7;  // divisor for RNG, USB and SDIO
      HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
-     RCC_ClkInitTypeDef RCC_ClkInitStruct;
+     RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
      RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
      RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSI;
      RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
      RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
      RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
      HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_ACR_LATENCY_0WS); // wait states not needed for < 30MHz
 #elif defined(USE_PLL)
-	RCC_OscInitTypeDef RCC_OscInitStruct;
+	RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
 	RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
 	RCC_OscInitStruct.HSIState       = RCC_HSI_ON;  // HSI is needed for the RNG
@@ -66,7 +66,7 @@ void platform_init(void)
         for(;;);
     }
 
-	RCC_ClkInitTypeDef RCC_ClkInitStruct;
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 	RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 	RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
 	RCC_ClkInitStruct.AHBCLKDivider  = HSE_AHBCLKDIV_HVALUE;
@@ -76,7 +76,7 @@ void platform_init(void)
     FLASH->ACR |= 0b111 << 8; //enable ART acceleration
 
 #else
-	RCC_OscInitTypeDef RCC_OscInitStruct;
+	RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
 	RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
 	RCC_OscInitStruct.HSIState       = RCC_HSI_ON;  // HSI is needed for the RNG
@@ -90,7 +90,7 @@ void platform_init(void)
         for(;;);
     }
 
-	RCC_ClkInitTypeDef RCC_ClkInitStruct;
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 	RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 	RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_HSE;
 	RCC_ClkInitStruct.AHBCLKDivider  = HSE_AHBCLKDIV_HVALUE;

stm32f4/stm32f4xx_hal_rcc_ex.h

@@ -6826,7 +6826,7 @@ void HAL_RCCEx_SelectLSEMode(uint8_t Mode);
 #define RCC_CFGR_MCO2EN_BB         (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32U) + (RCC_MCO2EN_BIT_NUMBER * 4U))
 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
 
-#define PLL_TIMEOUT_VALUE          1E6 * 2U  /* 2 ms */
+#define PLL_TIMEOUT_VALUE          ((uint32_t)1E6 * 2U)  /* 2 ms */
 /**
   * @}
   */