Unable to make openOCD and GDB work

[parisaeliasi]

Hi,
I am using CW340 board and when I run
./bazelisk.sh run //third_party/openocd --
-f "util/openocd/board/cw340_ftdi.cfg"
-c "adapter speed 500; transport select jtag; reset_config trst_only"
-f util/openocd/target/lowrisc-earlgrey.cfg
I still get:
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: riscv.tap: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: dtmcontrol is 0. Check JTAG connectivity/board power.
Warn : target riscv.tap.0 examination failed
Info : starting gdb server for riscv.tap.0 on 3333
Info : Listening on port 3333 for gdb connections

I already run:
./bazel-bin/sw/host/opentitantool/opentitantool --logging info
--exec "gpio write TAP_STRAP0 false"
--exec "gpio write TAP_STRAP1 true"
no-op
Without error and with Command result: success.
However, when I check the value of TAP_STRAP0 I still have true. Perhaps something (not the software) is overwriting it. I am unable to find a solution to the issue.
The second issue is regarding OpenTitan. Do they remove the support for GDB for CW340? When installing the RISC-V toolchain, gdb is no longer installed, as it has been removed from the get-toolchain.py file. I can see only gcc there.

[colinoflynn]

Hello - I was going to say check with OpenTitan, I see there is an issue related at lowRISC/opentitan#26852 which hopefully can answer about GDB.

For strapping & similar - is this with the Hyperdebug board (the STM32 nucleo board)? One thing to check is the strapping jumpers are set to use the Nucleo board. Blue shows location for Nucleo strapping:

However from memory the FTDI can also control the strapping pins, let me check the config file.

[colinoflynn]

OK - so yes the FTDI can also control the strapping pins: https://github.com/lowRISC/opentitan/blob/master/util/openocd/board/cw340_ftdi.cfg#L32

So the jumpers if set to "FTDI" mode should also work I think (you could try using that setting as well).

For using the FTDI JTAG port, you'll need to make sure the JTAG cable goes from the FTDI to OT/FPGA (J10 to J13). I think the board ships by default running J13 to J12 (HyperDebug). Here is another poor MS-Paint drawing showing the two connections: