@@ -57,20 +57,13 @@ proc toStrTuple*(tag: TagPtr): string =
5757 var res = (nptr:tag.nptr, idx:tag.idx)
5858 return $res
5959
60- proc fetchAddSlot(tag: TagPtr; w: uint ): uint =
61- ## A convenience to fetchAdd the node's slot.
62- if tag == 0:
63- raise AssertionDefect.newException "tagptr was empty"
64- else:
65- result = fetchAddSlot(tag.node, idx tag, w)
66-
67- proc fetchTail(queue: LoonyQueue, moorder: MemoryOrder = moRelaxed): TagPtr =
60+ proc fetchTail(queue: LoonyQueue): TagPtr =
6861 ## get the TagPtr of the tail (nptr: NodePtr, idx: uint16 )
69- TagPtr load(queue.tail, order = moorder )
62+ TagPtr load(queue.tail, order = moRelaxed )
7063
71- proc fetchHead(queue: LoonyQueue, moorder: MemoryOrder = moRelaxed ): TagPtr =
64+ proc fetchHead(queue: LoonyQueue): TagPtr =
7265 ## get the TagPtr of the head (nptr: NodePtr, idx: uint16 )
73- TagPtr load(queue.head, order = moorder )
66+ TagPtr load(queue.head, order = moRelaxed )
7467
7568proc fetchCurrTail(queue: LoonyQueue): NodePtr {.used.} =
7669 # get the NodePtr of the current tail
@@ -80,20 +73,20 @@ proc fetchCurrTail(queue: LoonyQueue): NodePtr {.used.} =
8073# imported std/atomics or we export atomics.
8174# For the sake of not polluting the users namespace I have changed these into procs.
8275# Atomic inc of idx in (nptr: NodePtr, idx: uint16 )
83- proc fetchIncTail(queue: LoonyQueue, moorder: MemoryOrder = moAcquire ): TagPtr =
84- cast[TagPtr](queue.tail.fetchAdd(1, order = moorder ))
85- proc fetchIncHead(queue: LoonyQueue, moorder: MemoryOrder = moAcquire ): TagPtr =
86- cast[TagPtr](queue.head.fetchAdd(1, order = moorder ))
76+ proc fetchIncTail(queue: LoonyQueue): TagPtr =
77+ cast[TagPtr](queue.tail.fetchAdd(1, order = moAcquire ))
78+ proc fetchIncHead(queue: LoonyQueue): TagPtr =
79+ cast[TagPtr](queue.head.fetchAdd(1, order = moAcquire ))
8780
88- proc compareAndSwapTail(queue: LoonyQueue, expect: var uint , swap: uint | TagPtr): bool =
89- queue.tail.compareExchange(expect, swap)
81+ proc compareAndSwapTail(queue: LoonyQueue; expect: var uint ; swap: uint | TagPtr): bool =
82+ queue.tail.compareExchange(expect, swap, moRelease, moRelaxed )
9083
91- proc compareAndSwapHead(queue: LoonyQueue, expect: var uint , swap: uint | TagPtr): bool =
92- queue.head.compareExchange(expect, swap)
84+ proc compareAndSwapHead(queue: LoonyQueue; expect: var uint ; swap: uint | TagPtr): bool =
85+ queue.head.compareExchange(expect, swap, moRelease, moRelaxed )
9386
94- proc compareAndSwapCurrTail(queue: LoonyQueue, expect: var uint ,
87+ proc compareAndSwapCurrTail(queue: LoonyQueue; expect: var uint ;
9588 swap: uint | TagPtr): bool {.used.} =
96- queue.currTail.compareExchange(expect, swap)
89+ queue.currTail.compareExchange(expect, swap, moRelease, moRelaxed )
9790
9891proc `=destroy`*[T](x: var LoonyQueueImpl[T]) =
9992 ## Destroy is completely operated on the basis that no other threads are
@@ -191,7 +184,7 @@ proc advTail[T](queue: LoonyQueue[T]; pel: uint; tag: TagPtr): AdvTail =
191184 result = AdvOnly
192185 break done
193186 # Get current tails next node
194- var next = origTail. fetchNext()
187+ var next = fetchNext(origTail, moRelaxed )
195188 if cast[ptr Node](next).isNil():
196189 # Prepare the new node with our element in it
197190 var node = allocNode pel
@@ -242,7 +235,7 @@ proc advHead(queue: LoonyQueue; curr, h, t: var TagPtr): AdvHead =
242235 incrDeqCount h.node
243236 QueueEmpty
244237 else:
245- var next = fetchNext h.nptr
238+ var next = fetchNext( h.nptr, moAcquire)
246239 # Equivalent to (nptr: NodePtr, idx: idx+=1)
247240 curr += 1
248241 block done:
@@ -297,12 +290,12 @@ proc pushImpl[T](queue: LoonyQueue[T], el: sink T,
297290 atomicThreadFence(ATOMIC_RELEASE)
298291 while true:
299292 # Enq proc begins with incr the index of node in TagPtr
300- var tag = fetchIncTail(queue )
293+ var tag = queue. fetchIncTail()
301294 if likely(tag.idx < N):
302295 # FAST PATH OPERATION - 99% of push will enter here; we want the minimal
303296 # amount of necessary operations in this path.
304297 # Perform a FAA on our reserved slot which should be 0'd.
305- let prev = tag.fetchAddSlot pel
298+ let prev = fetchAddSlot( tag.node, tag.idx, pel, moAcquire)
306299 case prev
307300 of 0, RESUME:
308301 break # the slot was empty; we're good to go
@@ -353,17 +346,17 @@ proc isEmptyImpl(head, tail: TagPtr): bool =
353346proc isEmpty*(queue: LoonyQueue): bool =
354347 ## This operation should only be used by internal code. The response for this
355348 ## operation is not precise.
356- let head = fetchHead queue
357- let tail = fetchTail queue
349+ let head = queue.fetchHead()
350+ let tail = queue.fetchTail()
358351 isEmptyImpl(head, tail)
359352
360353proc popImpl[T](queue: LoonyQueue[T]; forcedCoherence: static bool = false): T =
361354 assert not queue.isNil(), "The queue has not been initialised"
362355 while true:
363356 # Before incr the deq index, init check performed to determine if queue is empty.
364357 # Ensure head is loaded last to keep mem hot
365- var tail = fetchTail queue
366- var curr = fetchHead queue
358+ var tail = queue.fetchTail()
359+ var curr = queue.fetchHead()
367360 if isEmptyImpl(curr, tail):
368361 # Queue was empty; nil can be caught in cps w/ "while cont.running"
369362 when T is ref or T is ptr :
@@ -374,7 +367,7 @@ proc popImpl[T](queue: LoonyQueue[T]; forcedCoherence: static bool = false): T =
374367 var head = queue.fetchIncHead()
375368 if likely(head.idx < N):
376369 # FAST PATH OPS
377- var prev = head.fetchAddSlot READER
370+ var prev = fetchAddSlot( head.node, head.idx, READER, moRelease)
378371 # Last slot in a node - init reclaim proc; if WRITER bit set then upper bits
379372 # contain a valid pointer to an enqd el that can be returned (see enqueue)
380373 if not unlikely((prev and SLOTMASK) == 0):
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