diff --git a/base/runtime/default_allocators_general.odin b/base/runtime/default_allocators_general.odin index 64af6c90455..46ad7e878a5 100644 --- a/base/runtime/default_allocators_general.odin +++ b/base/runtime/default_allocators_general.odin @@ -6,7 +6,7 @@ when ODIN_DEFAULT_TO_NIL_ALLOCATOR { } else when ODIN_DEFAULT_TO_PANIC_ALLOCATOR { default_allocator_proc :: panic_allocator_proc default_allocator :: panic_allocator -} else when ODIN_OS != .Orca && (ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32) { +} else when ODIN_OS != .Orca && (ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm64) { default_allocator :: default_wasm_allocator default_allocator_proc :: wasm_allocator_proc } else { diff --git a/base/runtime/entry_wasm.odin b/base/runtime/entry_wasm.odin index 52bb0e07219..7c0572790cb 100644 --- a/base/runtime/entry_wasm.odin +++ b/base/runtime/entry_wasm.odin @@ -1,5 +1,5 @@ #+private -#+build wasm32, wasm64p32 +#+build wasm32, wasm64p32, wasm64 #+no-instrumentation package runtime diff --git a/base/runtime/internal.odin b/base/runtime/internal.odin index 0e674aca89a..16775076bf0 100644 --- a/base/runtime/internal.odin +++ b/base/runtime/internal.odin @@ -4,7 +4,7 @@ package runtime import "base:intrinsics" @(private="file") -IS_WASM :: ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 +IS_WASM :: ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm64 @(private) RUNTIME_LINKAGE :: "strong" when ( diff --git a/base/runtime/procs.odin b/base/runtime/procs.odin index 002a6501f59..8fbfc3ece6c 100644 --- a/base/runtime/procs.odin +++ b/base/runtime/procs.odin @@ -25,12 +25,12 @@ when ODIN_NO_CRT && ODIN_OS == .Windows { RtlMoveMemory(dst, src, len) return dst } -} else when ODIN_NO_CRT || (ODIN_OS != .Orca && (ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32)) { +} else when ODIN_NO_CRT || (ODIN_OS != .Orca && (ODIN_ARCH == .wasm32 || ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm64)) { // NOTE: on wasm, calls to these procs are generated (by LLVM) with type `i32` instead of `int`. // // NOTE: `#any_int` is also needed, because calls that we generate (and package code) // will be using `int` and need to be converted. - int_t :: i32 when ODIN_ARCH == .wasm64p32 else int + int_t :: i32 when ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm64 else int @(link_name="memset", linkage="strong", require) memset :: proc "c" (ptr: rawptr, val: i32, #any_int len: int_t) -> rawptr { diff --git a/base/runtime/procs_wasm.odin b/base/runtime/procs_wasm.odin index 7e03656caa9..b7261776faa 100644 --- a/base/runtime/procs_wasm.odin +++ b/base/runtime/procs_wasm.odin @@ -1,4 +1,4 @@ -#+build wasm32, wasm64p32 +#+build wasm32, wasm64p32, wasm64 package runtime @(private="file") diff --git a/base/runtime/wasm_allocator.odin b/base/runtime/wasm_allocator.odin index 325b1d4fad5..9605f07ff2d 100644 --- a/base/runtime/wasm_allocator.odin +++ b/base/runtime/wasm_allocator.odin @@ -1,4 +1,4 @@ -#+build wasm32, wasm64p32 +#+build wasm32, wasm64p32, wasm64 package runtime import "base:intrinsics" diff --git a/core/mem/mutex_allocator.odin b/core/mem/mutex_allocator.odin index 7361016c39a..50aa06dcbc8 100644 --- a/core/mem/mutex_allocator.odin +++ b/core/mem/mutex_allocator.odin @@ -1,4 +1,4 @@ -#+build !freestanding, wasm32, wasm64p32 +#+build !freestanding, wasm32, wasm64p32, wasm64 package mem import "core:sync" diff --git a/core/mem/tracking_allocator.odin b/core/mem/tracking_allocator.odin index 01080075e7c..ae3fe1f3294 100644 --- a/core/mem/tracking_allocator.odin +++ b/core/mem/tracking_allocator.odin @@ -1,4 +1,4 @@ -#+build !freestanding, wasm32, wasm64p32 +#+build !freestanding, wasm32, wasm64p32, wasm64 package mem import "base:runtime" diff --git a/core/sync/futex_wasm.odin b/core/sync/futex_wasm.odin index 16e69ca74e8..8eef0d988dd 100644 --- a/core/sync/futex_wasm.odin +++ b/core/sync/futex_wasm.odin @@ -1,5 +1,5 @@ #+private -#+build wasm32, wasm64p32 +#+build wasm32, wasm64p32, wasm64 package sync import "base:intrinsics" diff --git a/core/sync/primitives_wasm.odin b/core/sync/primitives_wasm.odin index 8906d96beab..ed5832621ec 100644 --- a/core/sync/primitives_wasm.odin +++ b/core/sync/primitives_wasm.odin @@ -1,5 +1,5 @@ #+private -#+build wasm32, wasm64p32 +#+build wasm32, wasm64p32, wasm64 package sync _current_thread_id :: proc "contextless" () -> int { diff --git a/core/sys/wasm/js/dom.odin b/core/sys/wasm/js/dom.odin index 902dfc941ca..7ec8c824451 100644 --- a/core/sys/wasm/js/dom.odin +++ b/core/sys/wasm/js/dom.odin @@ -1,4 +1,4 @@ -#+build js wasm32, js wasm64p32 +#+build js wasm32, js wasm64p32, js wasm64 package wasm_js_interface foreign import dom_lib "odin_dom" diff --git a/core/sys/wasm/js/events.odin b/core/sys/wasm/js/events.odin index f5a47c06b91..f1a32e67bd3 100644 --- a/core/sys/wasm/js/events.odin +++ b/core/sys/wasm/js/events.odin @@ -1,4 +1,4 @@ -#+build js wasm32, js wasm64p32 +#+build js wasm32, js wasm64p32, js wasm64 package wasm_js_interface foreign import dom_lib "odin_dom" diff --git a/core/sys/wasm/js/general.odin b/core/sys/wasm/js/general.odin index 22bb08e2b5b..55f7c9c4b90 100644 --- a/core/sys/wasm/js/general.odin +++ b/core/sys/wasm/js/general.odin @@ -1,4 +1,4 @@ -#+build js wasm32, js wasm64p32 +#+build js wasm32, js wasm64p32, js wasm64 package wasm_js_interface foreign import "odin_env" diff --git a/core/sys/wasm/js/memory_js.odin b/core/sys/wasm/js/memory_js.odin index 8232cd0c90f..1a2230d5f21 100644 --- a/core/sys/wasm/js/memory_js.odin +++ b/core/sys/wasm/js/memory_js.odin @@ -1,4 +1,4 @@ -#+build js wasm32, js wasm64p32 +#+build js wasm32, js wasm64p32, js wasm64 package wasm_js_interface import "core:mem" diff --git a/src/build_settings.cpp b/src/build_settings.cpp index 7a0952583a9..8b638b317b8 100644 --- a/src/build_settings.cpp +++ b/src/build_settings.cpp @@ -58,6 +58,7 @@ enum TargetArchKind : u16 { TargetArch_arm64, TargetArch_wasm32, TargetArch_wasm64p32, + TargetArch_wasm64, TargetArch_riscv64, TargetArch_COUNT, @@ -71,6 +72,7 @@ gb_global String target_arch_names[TargetArch_COUNT] = { str_lit("arm64"), str_lit("wasm32"), str_lit("wasm64p32"), + str_lit("wasm64"), str_lit("riscv64"), }; @@ -150,6 +152,7 @@ gb_global TargetEndianKind target_endians[TargetArch_COUNT] = { TargetEndian_Little, TargetEndian_Little, TargetEndian_Little, + TargetEndian_Little, }; #ifndef ODIN_VERSION_RAW @@ -821,6 +824,15 @@ gb_global TargetMetrics target_wasi_wasm64p32 = { }; +// TODO: freestanding_wasm64 +gb_global TargetMetrics target_js_wasm64 = { + TargetOs_js, + TargetArch_wasm64, + 8, 8, 8, 16, + str_lit("wasm64-js-js"), +}; +// TODO: wasi_wasm64 + gb_global TargetMetrics target_freestanding_amd64_sysv = { TargetOs_freestanding, @@ -898,6 +910,10 @@ gb_global NamedTargetMetrics named_targets[] = { { str_lit("js_wasm64p32"), &target_js_wasm64p32 }, { str_lit("wasi_wasm64p32"), &target_wasi_wasm64p32 }, + // TODO: freestanding_wasm64 + { str_lit("js_wasm64"), &target_js_wasm64 }, + // TODO: wasi_wasm64 + { str_lit("freestanding_amd64_sysv"), &target_freestanding_amd64_sysv }, { str_lit("freestanding_amd64_win64"), &target_freestanding_amd64_win64 }, @@ -1039,6 +1055,7 @@ gb_internal bool is_arch_wasm(void) { switch (build_context.metrics.arch) { case TargetArch_wasm32: case TargetArch_wasm64p32: + case TargetArch_wasm64: return true; } return false; @@ -1936,9 +1953,9 @@ gb_internal void init_build_context(TargetMetrics *cross_target, Subtarget subta // link_flags = gb_string_appendc(link_flags, "--export-all "); // link_flags = gb_string_appendc(link_flags, "--export-table "); - // if (bc->metrics.arch == TargetArch_wasm64) { - // link_flags = gb_string_appendc(link_flags, "-mwasm64 "); - // } + if (bc->metrics.arch == TargetArch_wasm64) { + link_flags = gb_string_appendc(link_flags, "-mwasm64 "); + } if (bc->metrics.os != TargetOs_orca) { link_flags = gb_string_appendc(link_flags, "--allow-undefined "); } diff --git a/src/build_settings_microarch.cpp b/src/build_settings_microarch.cpp index 0755aa62d4e..daee06776fd 100644 --- a/src/build_settings_microarch.cpp +++ b/src/build_settings_microarch.cpp @@ -19,6 +19,8 @@ gb_global String target_microarch_list[TargetArch_COUNT] = { str_lit("bleeding-edge,generic,lime1,mvp"), // TargetArch_wasm64p32: str_lit("bleeding-edge,generic,lime1,mvp"), + // TargetArch_wasm64: + str_lit("bleeding-edge,generic,lime1,mvp"), // TargetArch_riscv64: str_lit("andes-45-series,andes-a25,andes-a45,andes-ax25,andes-ax45,andes-ax45mpv,andes-n45,andes-nx45,generic,generic-ooo,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-p870,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,sifive-x390,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-kunminghu,xiangshan-nanhu"), }; @@ -39,6 +41,8 @@ gb_global String target_features_list[TargetArch_COUNT] = { str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call,wide-arithmetic"), // TargetArch_wasm64p32: str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call,wide-arithmetic"), + // TargetArch_wasm64: + str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,memory64,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call,wide-arithmetic"), // TargetArch_riscv64: str_lit("32bit,64bit,a,andes45,auipc-addi-fusion,b,c,conditional-cmv-fusion,d,disable-latency-sched-heuristic,dlen-factor-2,e,exact-asm,experimental,experimental-p,experimental-rvm23u32,experimental-smctr,experimental-ssctr,experimental-svukte,experimental-xqccmp,experimental-xqcia,experimental-xqciac,experimental-xqcibi,experimental-xqcibm,experimental-xqcicli,experimental-xqcicm,experimental-xqcics,experimental-xqcicsr,experimental-xqciint,experimental-xqciio,experimental-xqcilb,experimental-xqcili,experimental-xqcilia,experimental-xqcilo,experimental-xqcilsm,experimental-xqcisim,experimental-xqcisls,experimental-xqcisync,experimental-xrivosvisni,experimental-xrivosvizip,experimental-xsfmclic,experimental-xsfsclic,experimental-zalasr,experimental-zicfilp,experimental-zicfiss,experimental-zvbc32e,experimental-zvkgs,experimental-zvqdotq,f,forced-atomics,h,i,ld-add-fusion,log-vrgather,lui-addi-fusion,m,mips-p8700,no-default-unroll,no-sink-splat-operands,no-trailing-seq-cst-fence,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,optimized-nf5-segment-load-store,optimized-nf6-segment-load-store,optimized-nf7-segment-load-store,optimized-nf8-segment-load-store,optimized-zero-stride-load,predictable-select-expensive,prefer-vsetvli-over-read-vlenb,prefer-w-inst,q,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,rva20s64,rva20u64,rva22s64,rva22u64,rva23s64,rva23u64,rvb23s64,rvb23u64,rvi20u32,rvi20u64,save-restore,sdext,sdtrig,sha,shcounterenw,shgatpa,shifted-zextw-fusion,shlcofideleg,short-forward-branch-opt,shtvala,shvsatpa,shvstvala,shvstvecd,sifive7,smaia,smcdeleg,smcntrpmf,smcsrind,smdbltrp,smepmp,smmpm,smnpm,smrnmi,smstateen,ssaia,ssccfg,ssccptr,sscofpmf,sscounterenw,sscsrind,ssdbltrp,ssnpm,sspm,ssqosid,ssstateen,ssstrict,sstc,sstvala,sstvecd,ssu64xl,supm,svade,svadu,svbare,svinval,svnapot,svpbmt,svvptc,tagged-globals,unaligned-scalar-mem,unaligned-vector-mem,use-postra-scheduler,v,ventana-veyron,vl-dependent-latency,vxrm-pipeline-flush,xandesbfhcvt,xandesperf,xandesvbfhcvt,xandesvdot,xandesvpackfph,xandesvsintload,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xmipscbop,xmipscmov,xmipslsp,xsfcease,xsfmm128t,xsfmm16t,xsfmm32a16f,xsfmm32a32f,xsfmm32a8f,xsfmm32a8i,xsfmm32t,xsfmm64a64f,xsfmm64t,xsfmmbase,xsfvcp,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xsifivecdiscarddlone,xsifivecflushdlone,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,xwchc,za128rs,za64rs,zaamo,zabha,zacas,zalrsc,zama16b,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zclsd,zcmop,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfbfmin,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccamoc,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zilsd,zimop,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,ztso,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"), }; @@ -59,6 +63,8 @@ gb_global int target_microarch_counts[TargetArch_COUNT] = { 4, // TargetArch_wasm64p32: 4, + // TargetArch_wasm64: + 4, // TargetArch_riscv64: 51, }; @@ -523,6 +529,11 @@ gb_global MicroarchFeatureList microarch_features_list[] = { { str_lit("generic"), str_lit("bulk-memory,bulk-memory-opt,call-indirect-overlong,multivalue,mutable-globals,nontrapping-fptoint,reference-types,sign-ext") }, { str_lit("lime1"), str_lit("bulk-memory-opt,call-indirect-overlong,extended-const,multivalue,mutable-globals,nontrapping-fptoint,sign-ext") }, { str_lit("mvp"), str_lit("") }, + // TargetArch_wasm64: + { str_lit("bleeding-edge"), str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,memory64,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call") }, + { str_lit("generic"), str_lit("bulk-memory,bulk-memory-opt,call-indirect-overlong,memory64,multivalue,mutable-globals,nontrapping-fptoint,reference-types,sign-ext") }, + { str_lit("lime1"), str_lit("bulk-memory-opt,call-indirect-overlong,extended-const,memory64,multivalue,mutable-globals,nontrapping-fptoint,sign-ext") }, + { str_lit("mvp"), str_lit("memory64") }, // TargetArch_riscv64: { str_lit("andes-45-series"), str_lit("andes45,no-default-unroll,short-forward-branch-opt,use-postra-scheduler") }, { str_lit("andes-a25"), str_lit("32bit,a,c,d,f,i,m,xandesperf,zaamo,zalrsc,zca,zicsr,zifencei,zmmul") }, @@ -593,6 +604,8 @@ gb_global String target_microarch_list[TargetArch_COUNT] = { str_lit("bleeding-edge,generic,lime1,mvp"), // TargetArch_wasm64p32: str_lit("bleeding-edge,generic,lime1,mvp"), + // TargetArch_wasm64: + str_lit("bleeding-edge,generic,lime1,mvp"), // TargetArch_riscv64: str_lit("generic,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-nanhu"), }; @@ -633,6 +646,8 @@ gb_global int target_microarch_counts[TargetArch_COUNT] = { 4, // TargetArch_wasm64p32: 4, + // TargetArch_wasm64: + 4, // TargetArch_riscv64: 39, }; @@ -1088,6 +1103,11 @@ gb_global MicroarchFeatureList microarch_features_list[] = { { str_lit("generic"), str_lit("bulk-memory,bulk-memory-opt,call-indirect-overlong,multivalue,mutable-globals,nontrapping-fptoint,reference-types,sign-ext") }, { str_lit("lime1"), str_lit("bulk-memory-opt,call-indirect-overlong,extended-const,multivalue,mutable-globals,nontrapping-fptoint,sign-ext") }, { str_lit("mvp"), str_lit("") }, + // TargetArch_wasm64: + { str_lit("bleeding-edge"), str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,memory64,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call") }, + { str_lit("generic"), str_lit("bulk-memory,bulk-memory-opt,call-indirect-overlong,memory64,multivalue,mutable-globals,nontrapping-fptoint,reference-types,sign-ext") }, + { str_lit("lime1"), str_lit("bulk-memory-opt,call-indirect-overlong,extended-const,memory64,multivalue,mutable-globals,nontrapping-fptoint,sign-ext") }, + { str_lit("mvp"), str_lit("memory64") }, // TargetArch_riscv64: { str_lit("generic"), str_lit("64bit,i,optimized-nf2-segment-load-store") }, { str_lit("generic-rv32"), str_lit("32bit,i,optimized-nf2-segment-load-store") }, @@ -1146,6 +1166,8 @@ gb_global String target_microarch_list[TargetArch_COUNT] = { str_lit("bleeding-edge,generic,mvp"), // TargetArch_wasm64p32: str_lit("bleeding-edge,generic,mvp"), + // TargetArch_wasm64: + str_lit("bleeding-edge,generic,mvp"), // TargetArch_riscv64: str_lit("generic,generic-rv32,generic-rv64,rocket,rocket-rv32,rocket-rv64,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p670,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,syntacore-scr1-base,syntacore-scr1-max,veyron-v1,xiangshan-nanhu"), }; @@ -1166,6 +1188,8 @@ gb_global String target_features_list[TargetArch_COUNT] = { str_lit("atomics,bulk-memory,exception-handling,extended-const,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call"), // TargetArch_wasm64p32: str_lit("atomics,bulk-memory,exception-handling,extended-const,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call"), + // TargetArch_wasm64: + str_lit("atomics,bulk-memory,exception-handling,extended-const,memory64,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call"), // TargetArch_riscv64: str_lit("32bit,64bit,a,auipc-addi-fusion,c,conditional-cmv-fusion,d,dlen-factor-2,e,experimental,experimental-zacas,experimental-zcmop,experimental-zfbfmin,experimental-zicfilp,experimental-zicfiss,experimental-zimop,experimental-ztso,experimental-zvfbfmin,experimental-zvfbfwma,f,fast-unaligned-access,forced-atomics,h,i,ld-add-fusion,lui-addi-fusion,m,no-default-unroll,no-optimized-zero-stride-load,no-rvc-hints,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,save-restore,seq-cst-trailing-fence,shifted-zextw-fusion,short-forward-branch-opt,sifive7,smaia,smepmp,ssaia,svinval,svnapot,svpbmt,tagged-globals,unaligned-scalar-mem,use-postra-scheduler,v,ventana-veyron,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xsfvcp,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,za128rs,za64rs,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"), }; @@ -1186,6 +1210,8 @@ gb_global int target_microarch_counts[TargetArch_COUNT] = { 3, // TargetArch_wasm64p32: 3, + // TargetArch_wasm64: + 3, // TargetArch_riscv64: 26, }; @@ -1618,6 +1644,10 @@ gb_global MicroarchFeatureList microarch_features_list[] = { { str_lit("bleeding-edge"), str_lit("atomics,bulk-memory,mutable-globals,nontrapping-fptoint,sign-ext,simd128,tail-call") }, { str_lit("generic"), str_lit("mutable-globals,sign-ext") }, { str_lit("mvp"), str_lit("") }, + // TargetArch_wasm64: + { str_lit("bleeding-edge"), str_lit("atomics,bulk-memory,memory64,mutable-globals,nontrapping-fptoint,sign-ext,simd128,tail-call") }, + { str_lit("generic"), str_lit("memory64,mutable-globals,sign-ext") }, + { str_lit("mvp"), str_lit("memory64") }, // TargetArch_riscv64: { str_lit("generic"), str_lit("64bit") }, { str_lit("generic-rv32"), str_lit("32bit") }, diff --git a/src/checker.cpp b/src/checker.cpp index 8b3638c9de1..3abb983ebf3 100644 --- a/src/checker.cpp +++ b/src/checker.cpp @@ -1166,6 +1166,7 @@ gb_internal void init_universal(void) { {"arm64", TargetArch_arm64}, {"wasm32", TargetArch_wasm32}, {"wasm64p32", TargetArch_wasm64p32}, + {"wasm64", TargetArch_wasm64}, {"riscv64", TargetArch_riscv64}, }; diff --git a/src/llvm_abi.cpp b/src/llvm_abi.cpp index ec7c63b1acc..7f33c72ff3c 100644 --- a/src/llvm_abi.cpp +++ b/src/llvm_abi.cpp @@ -1932,6 +1932,8 @@ gb_internal LB_ABI_INFO(lb_get_abi_info_internal) { return lbAbiWasm::abi_info(m, arg_types, arg_count, return_type, return_is_defined, return_is_tuple, calling_convention, original_type); case TargetArch_wasm64p32: return lbAbiWasm::abi_info(m, arg_types, arg_count, return_type, return_is_defined, return_is_tuple, calling_convention, original_type); + case TargetArch_wasm64: + return lbAbiWasm::abi_info(m, arg_types, arg_count, return_type, return_is_defined, return_is_tuple, calling_convention, original_type); case TargetArch_riscv64: return lbAbiRiscv64::abi_info(m, arg_types, arg_count, return_type, return_is_defined, return_is_tuple, calling_convention, original_type); } diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp index 7742fb39dca..f44b253f2c8 100644 --- a/src/llvm_backend.cpp +++ b/src/llvm_backend.cpp @@ -2986,6 +2986,7 @@ gb_internal bool lb_generate_code(lbGenerator *gen) { break; case TargetArch_wasm32: case TargetArch_wasm64p32: + case TargetArch_wasm64: LLVMInitializeWebAssemblyTargetInfo(); LLVMInitializeWebAssemblyTarget(); LLVMInitializeWebAssemblyTargetMC(); diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp index 187c3459581..98743afd739 100644 --- a/src/llvm_backend_expr.cpp +++ b/src/llvm_backend_expr.cpp @@ -568,6 +568,7 @@ gb_internal bool lb_is_matrix_simdable(Type *t) { case TargetArch_i386: case TargetArch_wasm32: case TargetArch_wasm64p32: + case TargetArch_wasm64: return false; } } diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp index 890556a61bb..f5e37601e56 100644 --- a/src/llvm_backend_proc.cpp +++ b/src/llvm_backend_proc.cpp @@ -1795,7 +1795,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn use_hardware_runtime_swizzle = false; break; } - } else if (build_context.metrics.arch == TargetArch_wasm32 || build_context.metrics.arch == TargetArch_wasm64p32) { + } else if (build_context.metrics.arch == TargetArch_wasm32 || build_context.metrics.arch == TargetArch_wasm64p32 || build_context.metrics.arch == TargetArch_wasm64) { // WebAssembly: Use swizzle (only supports 16-byte vectors) if (count == 16) { intrinsic_name = "llvm.wasm.swizzle"; @@ -3829,34 +3829,71 @@ gb_internal lbValue lb_build_builtin_proc(lbProcedure *p, Ast *expr, TypeAndValu case BuiltinProc_wasm_memory_grow: { + bool is_wasm64 = build_context.metrics.arch == TargetArch_wasm64; char const *name = "llvm.wasm.memory.grow"; - LLVMTypeRef types[1] = { - lb_type(p->module, t_i32), - }; + + if (is_wasm64) { + // WASM64 uses i64 for memory operations + LLVMTypeRef types[1] = { + lb_type(p->module, t_i64), + }; - LLVMValueRef args[2] = {}; - args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_uintptr).value; - args[1] = lb_emit_conv(p, lb_build_expr(p, ce->args[1]), t_uintptr).value; + LLVMValueRef args[2] = {}; + args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_i32).value; // memory index is still i32 + args[1] = lb_emit_conv(p, lb_build_expr(p, ce->args[1]), t_i64).value; // page count is i64 - lbValue res = {}; - res.type = t_i32; - res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); - return lb_emit_conv(p, res, tv.type); + lbValue res = {}; + res.type = t_i64; + res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); + return lb_emit_conv(p, res, tv.type); + } else { + // WASM32 uses i32 for memory operations + LLVMTypeRef types[1] = { + lb_type(p->module, t_i32), + }; + + LLVMValueRef args[2] = {}; + args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_i32).value; + args[1] = lb_emit_conv(p, lb_build_expr(p, ce->args[1]), t_i32).value; + + lbValue res = {}; + res.type = t_i32; + res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); + return lb_emit_conv(p, res, tv.type); + } } case BuiltinProc_wasm_memory_size: { + bool is_wasm64 = build_context.metrics.arch == TargetArch_wasm64; char const *name = "llvm.wasm.memory.size"; - LLVMTypeRef types[1] = { - lb_type(p->module, t_i32), - }; + + if (is_wasm64) { + // WASM64 uses i64 for memory operations + LLVMTypeRef types[1] = { + lb_type(p->module, t_i64), + }; - LLVMValueRef args[1] = {}; - args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_uintptr).value; + LLVMValueRef args[1] = {}; + args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_i32).value; // memory index is still i32 - lbValue res = {}; - res.type = t_i32; - res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); - return lb_emit_conv(p, res, tv.type); + lbValue res = {}; + res.type = t_i64; + res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); + return lb_emit_conv(p, res, tv.type); + } else { + // WASM32 uses i32 for memory operations + LLVMTypeRef types[1] = { + lb_type(p->module, t_i32), + }; + + LLVMValueRef args[1] = {}; + args[0] = lb_emit_conv(p, lb_build_expr(p, ce->args[0]), t_i32).value; + + lbValue res = {}; + res.type = t_i32; + res.value = lb_call_intrinsic(p, name, args, gb_count_of(args), types, gb_count_of(types)); + return lb_emit_conv(p, res, tv.type); + } } case BuiltinProc_wasm_memory_atomic_wait32: diff --git a/src/llvm_backend_utility.cpp b/src/llvm_backend_utility.cpp index c7b4170e9ec..8a262b995ff 100644 --- a/src/llvm_backend_utility.cpp +++ b/src/llvm_backend_utility.cpp @@ -1855,6 +1855,7 @@ gb_internal lbValue lb_emit_mul_add(lbProcedure *p, lbValue a, lbValue b, lbValu case TargetArch_i386: case TargetArch_wasm32: case TargetArch_wasm64p32: + case TargetArch_wasm64: is_possible = false; break; }