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[XLA:CPU] Support limiting LLVM codegen in Aarch64 and other new x86 instructions #17758

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penpornk opened this issue Sep 30, 2024 · 0 comments
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CPU Related to XLA on CPU enhancement New feature or request

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@penpornk
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PR #17722 supports limiting the CPU ISA that LLVM will codegen. It currently only supports x86 ISAs from SSE4_2 up to AMX_FP16 and imposes a strict ordering (SSE4_2 < AVX < ... < AMX_FP16). We should

  1. Add Aarch64 support too.
  2. Investigate if we need to support AVX10 and it would go in the mix with other x86 instructions.
@penpornk penpornk added enhancement New feature or request CPU Related to XLA on CPU labels Sep 30, 2024
@penpornk penpornk self-assigned this Sep 30, 2024
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