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There is a qibo/src/qibo/transpiler/optimizer.py Lines 11 to 12 in 14b62c4 |
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@alecandido, I have circuit with 3 logical registers
q0,q1,q2and I have some connectivity graph with let's say 5 physical qubits (not necessary continuous). How can I do initial mapping without setting wire_names explicitly?I tried
but it asserts
which I believe is too strict since I should be able to close smaller circuit into bigger QPU
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