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BUG IN ORIGINAL arlet 6502.v: D flag js not properly initialised on r… test #45: Commit 37eed14 pushed by rejunity
October 25, 2024 19:59 2m 24s main
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October 25, 2024 19:59 2m 24s
test 3 frames test #44: Commit 27ac7f1 pushed by rejunity
October 24, 2024 21:41 2m 29s main
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October 24, 2024 21:41 2m 29s
Track only top test #43: Commit 6096483 pushed by rejunity
October 24, 2024 21:40 1m 23s main
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October 24, 2024 21:40 1m 23s
test 1++ frame test #42: Commit 5a6a23d pushed by rejunity
October 24, 2024 21:14 1m 55s main
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October 24, 2024 21:14 1m 55s
Also track PC reg test #41: Commit 9582f1f pushed by rejunity
October 24, 2024 21:09 49s main
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October 24, 2024 21:09 49s
test 800*64*2 cycles (but reduce number of tracked signals) test #40: Commit 6361753 pushed by rejunity
October 24, 2024 21:07 42s main
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October 24, 2024 21:07 42s
test 800*56 cycles (until the first WSYNC) test #39: Commit fc4e173 pushed by rejunity
October 24, 2024 20:28 42s main
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October 24, 2024 20:28 42s
test 400 cycles test #38: Commit e14c248 pushed by rejunity
October 24, 2024 19:48 41s main
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October 24, 2024 19:48 41s
test 800*64*2 cycles test #37: Commit f7c2e85 pushed by rejunity
October 24, 2024 15:52 42s main
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October 24, 2024 15:52 42s
Proper reset for audio counters & output flip-flop. test #36: Commit 1740599 pushed by rejunity
October 24, 2024 15:52 44s main
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October 24, 2024 15:52 44s
Temporarily disabled dithering and audio to see why GDS fails. test #35: Commit 5d2935e pushed by rejunity
October 24, 2024 12:01 41s main
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October 24, 2024 12:01 41s
BUG IN ORIGINAL arlet 6502.v: WE has held HIGH during RESET sequence … test #34: Commit 162c005 pushed by rejunity
October 24, 2024 10:00 46s main
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October 24, 2024 10:00 46s
audio_l and audio_r are being driven constantly. test #33: Commit f8aba68 pushed by rejunity
October 24, 2024 09:34 40s main
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October 24, 2024 09:34 40s
Small readability improvement test #32: Commit 68e1194 pushed by rejunity
October 23, 2024 23:30 47s main
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October 23, 2024 23:30 47s
Clear address_bus_r register on reset test #31: Commit 8e2a700 pushed by rejunity
October 23, 2024 23:30 47s main
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October 23, 2024 23:30 47s
Various PWM methods for dithering 128 colors via 6 bpp. test #30: Commit 3ef2c3e pushed by rejunity
October 22, 2024 10:40 54s main
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October 22, 2024 10:40 54s
PWM audio output test #29: Commit 46adc53 pushed by rejunity
October 14, 2024 22:11 41s main
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October 14, 2024 22:11 41s
Scanline RAM design suggested by Ravenslofty test #28: Commit c2f5836 pushed by rejunity
October 13, 2024 20:10 1m 5s main
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October 13, 2024 20:10 1m 5s
Split scanline into a pair of 128 + 32 element RAMs to see if it is b… test #27: Commit 95dd717 pushed by rejunity
October 13, 2024 19:30 52s main
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October 13, 2024 19:30 52s
Make scanline 255 elements to make synthesis happy. test #26: Commit d482af1 pushed by rejunity
October 13, 2024 19:21 42s main
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October 13, 2024 19:21 42s
Scanline 160 pixels by 7 bit test #25: Commit 607c4c7 pushed by rejunity
October 11, 2024 11:26 51s main
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October 11, 2024 11:26 51s
OL2: shorter GL_TEST test #24: Commit eafddbd pushed by rejunity
October 11, 2024 11:22 50s main
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October 11, 2024 11:22 50s
OL1: pong test #23: Commit e8c3565 pushed by rejunity
October 10, 2024 20:05 3m 41s main
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October 10, 2024 20:05 3m 41s
OL2: pong test #22: Commit 826a3b6 pushed by rejunity
October 10, 2024 20:03 3m 38s main
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October 10, 2024 20:03 3m 38s
OL1 test #21: Commit 8cf2564 pushed by rejunity
October 10, 2024 20:03 3m 42s main
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October 10, 2024 20:03 3m 42s