How to use relaxedpriv in abstractcs?

[shengqilong]

This optional bit controls whether program buffer and abstract memory accesses are performed with the exact and full set 
of permission checks that apply based on the current architectural state of the hart performing the access, or with a relaxed 
set of permission checks (e.g. PMP restrictions are ignored). The details of the latter are implementation-specific.

How to understand the above passage, and how should relaxedpriv be used specifically?

[pdonahue-ventana]

The bit is provided for implementations that (for whatever reason) cannot apply PMP or other checks on PB and abstract memory accesses. It's optional and I would expect that almost everyone only supports relaxedpriv=0. Note that Sdsec will require that relaxedpriv=1 must not be supported.

[shengqilong]

Can you give an example for which specific situations for “other checks on PB”

[shengqilong]

Is this referring to the access check for PB itself, or the permission check for instruction execution within PB?

[pdonahue-ventana]

"program buffer and abstract memory accesses" is intended to mean "program buffer memory accesses and abstract memory accesses" and it refers to loads and stores in the PB. The definition of relaxedpriv=0 is clear: Loads and stores must access memory just as if you're in M-mode (but also considering mprven and maybe something else that I'm forgetting right now). That is the only allowed behavior in the ratified 0.13 debug spec. The definition of relaxedpriv=1 is implementation-defined but some sort of privilege (permissions for PMP, Smepmp, the proposed Sspmp, Sv32/39/48/57, maybe PMA, etc.) is not going to be checked.

I think that the entirety of the discussion on relaxedpriv is here: https://lists.riscv.org/g/tech-debug/topic/75549024