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Hi,
As in the description of stip, the Smode timer interrupt pending bit can only be set and clear by Mmode. In a linux system, the S mode timer interrupt will be delegate to S mode, but Smode does not have the permission clear the stip, that would make the system stuck in the timer interrupt servive program. so, what's the consideration of not giving the write permission to S mode
The text was updated successfully, but these errors were encountered:
In the normal use case, the timer-interrupt handler will schedule a new timer interrupt, which should clear STIP. In all other cases, it should suffice to clear STIE instead. You can see this thread for a more thorough discussion: riscv-software-src/riscv-pk#108
Hi,
As in the description of stip, the Smode timer interrupt pending bit can only be set and clear by Mmode. In a linux system, the S mode timer interrupt will be delegate to S mode, but Smode does not have the permission clear the stip, that would make the system stuck in the timer interrupt servive program. so, what's the consideration of not giving the write permission to S mode
The text was updated successfully, but these errors were encountered: