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Simplify getPendingSet() interrupt handling #616

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Timmmm opened this issue Nov 13, 2024 · 0 comments · Fixed by #644
Closed

Simplify getPendingSet() interrupt handling #616

Timmmm opened this issue Nov 13, 2024 · 0 comments · Fixed by #644
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refactor Code clean up

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@Timmmm
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Timmmm commented Nov 13, 2024

As noted by @KotorinMinami the getPendingSet() function can be simplified quite a lot now that N is gone:

function getPendingSet(priv : Privilege) -> option((xlenbits, Privilege)) = {
  assert(extensionEnabled(Ext_S) | mideleg == zeros());

  let pending_m = mip.bits & mie.bits & ~(mideleg);
  let pending_s = mip.bits & mie.bits & mideleg;

  let mIE = (priv == Machine & mstatus[MIE] == 0b1) | priv == User | priv == Supervisor;
  let sIE = (priv == Supervisor & mstatus[SIE] == 0b1)) | priv == User;

  if     mIE & (pending_m != zeros()) then Some((pending_m, Machine))
  else if sIE & (pending_s != zeros()) then Some((pending_s, Supervisor))
  else None()
}

(not tested!)

@Timmmm Timmmm added the refactor Code clean up label Nov 13, 2024
Timmmm added a commit to Timmmm/sail-riscv that referenced this issue Dec 16, 2024
Since the N extension has been removed, getPendingSet can be greatly simplified. This is functionally the same as the previous code but a lot shorter and easier to understand.

Fixes riscv#616
Timmmm added a commit to Timmmm/sail-riscv that referenced this issue Dec 16, 2024
Since the N extension has been removed, getPendingSet can be greatly simplified. This is functionally the same as the previous code but a lot shorter and easier to understand.

Fixes riscv#616
Timmmm added a commit to Timmmm/sail-riscv that referenced this issue Jan 2, 2025
Since the N extension has been removed, getPendingSet can be greatly simplified. This is functionally the same as the previous code but a lot shorter and easier to understand.

Fixes riscv#616
@Timmmm Timmmm closed this as completed in 2c70fa6 Jan 9, 2025
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