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Add new Tier-3 targets: loongarch32-unknown-none*
MCP: rust-lang/compiler-team#865
1 parent 27f8efb commit 38d69c3

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30 files changed

+149
-33
lines changed

30 files changed

+149
-33
lines changed

‎compiler/rustc_codegen_gcc/example/alloc_system.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
// add fast paths for low alignment values.
99
#[cfg(any(target_arch = "x86",
1010
target_arch = "arm",
11+
target_arch = "loongarch32",
1112
target_arch = "m68k",
1213
target_arch = "mips",
1314
target_arch = "mips32r6",

‎compiler/rustc_codegen_llvm/src/asm.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -251,7 +251,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
251251
InlineAsmArch::Nvptx64 => {}
252252
InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {}
253253
InlineAsmArch::Hexagon => {}
254-
InlineAsmArch::LoongArch64 => {
254+
InlineAsmArch::LoongArch32 | InlineAsmArch::LoongArch64 => {
255255
constraints.extend_from_slice(&[
256256
"~{$fcc0}".to_string(),
257257
"~{$fcc1}".to_string(),

‎compiler/rustc_codegen_ssa/src/back/link/raw_dylib.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,7 @@ fn create_elf_raw_dylib_stub(sess: &Session, soname: &str, symbols: &[DllImport]
287287
(Architecture::X86_64, None) => elf::EM_X86_64,
288288
(Architecture::X86_64_X32, None) => elf::EM_X86_64,
289289
(Architecture::Hexagon, None) => elf::EM_HEXAGON,
290+
(Architecture::LoongArch32, None) => elf::EM_LOONGARCH,
290291
(Architecture::LoongArch64, None) => elf::EM_LOONGARCH,
291292
(Architecture::M68k, None) => elf::EM_68K,
292293
(Architecture::Mips, None) => elf::EM_MIPS,

‎compiler/rustc_codegen_ssa/src/back/metadata.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -348,7 +348,7 @@ pub(super) fn elf_e_flags(architecture: Architecture, sess: &Session) -> u32 {
348348

349349
e_flags
350350
}
351-
Architecture::LoongArch64 => {
351+
Architecture::LoongArch32 | Architecture::LoongArch64 => {
352352
// Source: https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc#e_flags-identifies-abi-type-and-version
353353
let mut e_flags: u32 = elf::EF_LARCH_OBJABI_V1;
354354

‎compiler/rustc_target/src/asm/mod.rs

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -226,6 +226,7 @@ pub enum InlineAsmArch {
226226
RiscV64,
227227
Nvptx64,
228228
Hexagon,
229+
LoongArch32,
229230
LoongArch64,
230231
Mips,
231232
Mips64,
@@ -260,6 +261,7 @@ impl FromStr for InlineAsmArch {
260261
"powerpc" => Ok(Self::PowerPC),
261262
"powerpc64" => Ok(Self::PowerPC64),
262263
"hexagon" => Ok(Self::Hexagon),
264+
"loongarch32" => Ok(Self::LoongArch32),
263265
"loongarch64" => Ok(Self::LoongArch64),
264266
"mips" | "mips32r6" => Ok(Self::Mips),
265267
"mips64" | "mips64r6" => Ok(Self::Mips64),
@@ -365,7 +367,9 @@ impl InlineAsmReg {
365367
Self::PowerPC(PowerPCInlineAsmReg::parse(name)?)
366368
}
367369
InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmReg::parse(name)?),
368-
InlineAsmArch::LoongArch64 => Self::LoongArch(LoongArchInlineAsmReg::parse(name)?),
370+
InlineAsmArch::LoongArch32 | InlineAsmArch::LoongArch64 => {
371+
Self::LoongArch(LoongArchInlineAsmReg::parse(name)?)
372+
}
369373
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
370374
Self::Mips(MipsInlineAsmReg::parse(name)?)
371375
}
@@ -652,7 +656,9 @@ impl InlineAsmRegClass {
652656
Self::PowerPC(PowerPCInlineAsmRegClass::parse(name)?)
653657
}
654658
InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmRegClass::parse(name)?),
655-
InlineAsmArch::LoongArch64 => Self::LoongArch(LoongArchInlineAsmRegClass::parse(name)?),
659+
InlineAsmArch::LoongArch32 | InlineAsmArch::LoongArch64 => {
660+
Self::LoongArch(LoongArchInlineAsmRegClass::parse(name)?)
661+
}
656662
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
657663
Self::Mips(MipsInlineAsmRegClass::parse(name)?)
658664
}
@@ -860,7 +866,7 @@ pub fn allocatable_registers(
860866
hexagon::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
861867
map
862868
}
863-
InlineAsmArch::LoongArch64 => {
869+
InlineAsmArch::LoongArch32 | InlineAsmArch::LoongArch64 => {
864870
let mut map = loongarch::regclass_map();
865871
loongarch::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
866872
map
@@ -992,7 +998,7 @@ impl InlineAsmClobberAbi {
992998
"C" | "system" => Ok(InlineAsmClobberAbi::Avr),
993999
_ => Err(&["C", "system"]),
9941000
},
995-
InlineAsmArch::LoongArch64 => match name {
1001+
InlineAsmArch::LoongArch32 | InlineAsmArch::LoongArch64 => match name {
9961002
"C" | "system" => Ok(InlineAsmClobberAbi::LoongArch),
9971003
_ => Err(&["C", "system"]),
9981004
},

‎compiler/rustc_target/src/callconv/mod.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -648,7 +648,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
648648
"amdgpu" => amdgpu::compute_abi_info(cx, self),
649649
"arm" => arm::compute_abi_info(cx, self),
650650
"avr" => avr::compute_abi_info(self),
651-
"loongarch64" => loongarch::compute_abi_info(cx, self),
651+
"loongarch32" | "loongarch64" => loongarch::compute_abi_info(cx, self),
652652
"m68k" => m68k::compute_abi_info(self),
653653
"csky" => csky::compute_abi_info(self),
654654
"mips" | "mips32r6" => mips::compute_abi_info(cx, self),
@@ -691,7 +691,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
691691
match &*spec.arch {
692692
"x86" => x86::compute_rust_abi_info(cx, self),
693693
"riscv32" | "riscv64" => riscv::compute_rust_abi_info(cx, self),
694-
"loongarch64" => loongarch::compute_rust_abi_info(cx, self),
694+
"loongarch32" | "loongarch64" => loongarch::compute_rust_abi_info(cx, self),
695695
"aarch64" => aarch64::compute_rust_abi_info(cx, self),
696696
_ => {}
697697
};

‎compiler/rustc_target/src/spec/mod.rs

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Original file line numberDiff line numberDiff line change
@@ -1981,6 +1981,8 @@ supported_targets! {
19811981

19821982
("sparc-unknown-none-elf", sparc_unknown_none_elf),
19831983

1984+
("loongarch32-unknown-none", loongarch32_unknown_none),
1985+
("loongarch32-unknown-none-softfloat", loongarch32_unknown_none_softfloat),
19841986
("loongarch64-unknown-none", loongarch64_unknown_none),
19851987
("loongarch64-unknown-none-softfloat", loongarch64_unknown_none_softfloat),
19861988

@@ -3502,6 +3504,7 @@ impl Target {
35023504
"msp430" => (Architecture::Msp430, None),
35033505
"hexagon" => (Architecture::Hexagon, None),
35043506
"bpf" => (Architecture::Bpf, None),
3507+
"loongarch32" => (Architecture::LoongArch32, None),
35053508
"loongarch64" => (Architecture::LoongArch64, None),
35063509
"csky" => (Architecture::Csky, None),
35073510
"arm64ec" => (Architecture::Aarch64, Some(object::SubArchitecture::Arm64EC)),

‎compiler/rustc_target/src/spec/targets/loongarch32_unknown_none.rs

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
use crate::spec::{
2+
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata, TargetOptions,
3+
};
4+
5+
pub(crate) fn target() -> Target {
6+
Target {
7+
llvm_target: "loongarch32-unknown-none".into(),
8+
metadata: TargetMetadata {
9+
description: Some("Freestanding/bare-metal LoongArch32".into()),
10+
tier: Some(3),
11+
host_tools: Some(false),
12+
std: Some(false),
13+
},
14+
pointer_width: 32,
15+
data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
16+
arch: "loongarch32".into(),
17+
options: TargetOptions {
18+
cpu: "generic".into(),
19+
features: "+f,+d".into(),
20+
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
21+
linker: Some("rust-lld".into()),
22+
llvm_abiname: "ilp32d".into(),
23+
max_atomic_width: Some(32),
24+
relocation_model: RelocModel::Static,
25+
panic_strategy: PanicStrategy::Abort,
26+
..Default::default()
27+
},
28+
}
29+
}

‎compiler/rustc_target/src/spec/targets/loongarch32_unknown_none_softfloat.rs

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
use crate::spec::{
2+
Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetMetadata, TargetOptions,
3+
};
4+
5+
pub(crate) fn target() -> Target {
6+
Target {
7+
llvm_target: "loongarch32-unknown-none".into(),
8+
metadata: TargetMetadata {
9+
description: Some("Freestanding/bare-metal LoongArch32 softfloat".into()),
10+
tier: Some(3),
11+
host_tools: Some(false),
12+
std: Some(false),
13+
},
14+
pointer_width: 32,
15+
data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
16+
arch: "loongarch32".into(),
17+
options: TargetOptions {
18+
cpu: "generic".into(),
19+
features: "-f,-d".into(),
20+
abi: "softfloat".into(),
21+
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
22+
linker: Some("rust-lld".into()),
23+
llvm_abiname: "ilp32s".into(),
24+
max_atomic_width: Some(32),
25+
relocation_model: RelocModel::Static,
26+
panic_strategy: PanicStrategy::Abort,
27+
..Default::default()
28+
},
29+
}
30+
}

‎compiler/rustc_target/src/target_features.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -846,7 +846,7 @@ impl Target {
846846
"wasm32" | "wasm64" => WASM_FEATURES,
847847
"bpf" => BPF_FEATURES,
848848
"csky" => CSKY_FEATURES,
849-
"loongarch64" => LOONGARCH_FEATURES,
849+
"loongarch32" | "loongarch64" => LOONGARCH_FEATURES,
850850
"s390x" => IBMZ_FEATURES,
851851
"sparc" | "sparc64" => SPARC_FEATURES,
852852
"m68k" => M68K_FEATURES,
@@ -860,7 +860,7 @@ impl Target {
860860
"aarch64" | "arm64ec" => AARCH64_FEATURES_FOR_CORRECT_VECTOR_ABI,
861861
"arm" => ARM_FEATURES_FOR_CORRECT_VECTOR_ABI,
862862
"powerpc" | "powerpc64" => POWERPC_FEATURES_FOR_CORRECT_VECTOR_ABI,
863-
"loongarch64" => LOONGARCH_FEATURES_FOR_CORRECT_VECTOR_ABI,
863+
"loongarch32" | "loongarch64" => LOONGARCH_FEATURES_FOR_CORRECT_VECTOR_ABI,
864864
"riscv32" | "riscv64" => RISCV_FEATURES_FOR_CORRECT_VECTOR_ABI,
865865
"wasm32" | "wasm64" => WASM_FEATURES_FOR_CORRECT_VECTOR_ABI,
866866
"s390x" => S390X_FEATURES_FOR_CORRECT_VECTOR_ABI,
@@ -1034,7 +1034,7 @@ impl Target {
10341034
_ => unreachable!(),
10351035
}
10361036
}
1037-
"loongarch64" => {
1037+
"loongarch32" | "loongarch64" => {
10381038
// LoongArch handles ABI in a very sane way, being fully explicit via `llvm_abiname`
10391039
// about what the intended ABI is.
10401040
match &*self.llvm_abiname {

‎library/core/Cargo.toml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,8 @@ debug_typeid = []
2929
[lints.rust.unexpected_cfgs]
3030
level = "warn"
3131
check-cfg = [
32+
# #[cfg(bootstrap)] loongarch32
33+
'cfg(target_arch, values("loongarch32"))',
3234
'cfg(no_fp_fmt_parse)',
3335
# core use #[path] imports to portable-simd `core_simd` crate
3436
# and to stdarch `core_arch` crate which messes-up with Cargo list

‎library/core/src/sync/atomic.rs

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,7 @@
178178
//!
179179
//! | `target_arch` | Size limit |
180180
//! |---------------|---------|
181-
//! | `x86`, `arm`, `mips`, `mips32r6`, `powerpc`, `riscv32`, `sparc`, `hexagon` | 4 bytes |
181+
//! | `x86`, `arm`, `loongarch32`, `mips`, `mips32r6`, `powerpc`, `riscv32`, `sparc`, `hexagon` | 4 bytes |
182182
//! | `x86_64`, `aarch64`, `loongarch64`, `mips64`, `mips64r6`, `powerpc64`, `riscv64`, `sparc64`, `s390x` | 8 bytes |
183183
//!
184184
//! Atomics loads that are larger than this limit as well as atomic loads with ordering other
@@ -349,8 +349,12 @@ pub type Atomic<T> = <T as AtomicPrimitive>::AtomicInner;
349349
// This list should only contain architectures which have word-sized atomic-or/
350350
// atomic-and instructions but don't natively support byte-sized atomics.
351351
#[cfg(target_has_atomic = "8")]
352-
const EMULATE_ATOMIC_BOOL: bool =
353-
cfg!(any(target_arch = "riscv32", target_arch = "riscv64", target_arch = "loongarch64"));
352+
const EMULATE_ATOMIC_BOOL: bool = cfg!(any(
353+
target_arch = "riscv32",
354+
target_arch = "riscv64",
355+
target_arch = "loongarch32",
356+
target_arch = "loongarch64"
357+
));
354358

355359
/// A boolean type which can be safely shared between threads.
356360
///

‎library/std/Cargo.toml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,8 @@ test = true
157157
[lints.rust.unexpected_cfgs]
158158
level = "warn"
159159
check-cfg = [
160+
# #[cfg(bootstrap)] loongarch32
161+
'cfg(target_arch, values("loongarch32"))',
160162
# std use #[path] imports to portable-simd `std_float` crate
161163
# and to the `backtrace` crate which messes-up with Cargo list
162164
# of declared features, we therefor expect any feature cfg

‎library/std/src/env.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1046,6 +1046,7 @@ pub mod consts {
10461046
/// * `"sparc"`
10471047
/// * `"sparc64"`
10481048
/// * `"hexagon"`
1049+
/// * `"loongarch32"`
10491050
/// * `"loongarch64"`
10501051
///
10511052
/// </details>

‎library/std/src/os/linux/raw.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -231,6 +231,7 @@ mod arch {
231231
}
232232

233233
#[cfg(any(
234+
target_arch = "loongarch32",
234235
target_arch = "loongarch64",
235236
target_arch = "mips64",
236237
target_arch = "mips64r6",

‎library/std/src/sys/alloc/mod.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ const MIN_ALIGN: usize = if cfg!(any(
1717
target_arch = "arm",
1818
target_arch = "m68k",
1919
target_arch = "csky",
20+
target_arch = "loongarch32",
2021
target_arch = "mips",
2122
target_arch = "mips32r6",
2223
target_arch = "powerpc",

‎library/std/src/sys/personality/gcc.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ const UNWIND_DATA_REG: (i32, i32) = (0, 1); // R0, R1
8686
#[cfg(any(target_arch = "riscv64", target_arch = "riscv32"))]
8787
const UNWIND_DATA_REG: (i32, i32) = (10, 11); // x10, x11
8888

89-
#[cfg(target_arch = "loongarch64")]
89+
#[cfg(any(target_arch = "loongarch32", target_arch = "loongarch64"))]
9090
const UNWIND_DATA_REG: (i32, i32) = (4, 5); // a0, a1
9191

9292
// The following code is based on GCC's C and C++ personality routines. For reference, see:

‎library/unwind/Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,4 +37,4 @@ system-llvm-libunwind = []
3737

3838
[lints.rust.unexpected_cfgs]
3939
level = "warn"
40-
check-cfg = ['cfg(emscripten_wasm_eh)']
40+
check-cfg = ['cfg(emscripten_wasm_eh)', 'cfg(target_arch, values("loongarch32"))']

‎library/unwind/src/libunwind.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,7 @@ pub const unwinder_private_data_size: usize = 2;
8181
#[cfg(all(target_arch = "hexagon", target_os = "linux"))]
8282
pub const unwinder_private_data_size: usize = 35;
8383

84-
#[cfg(target_arch = "loongarch64")]
84+
#[cfg(any(target_arch = "loongarch32", target_arch = "loongarch64"))]
8585
pub const unwinder_private_data_size: usize = 2;
8686

8787
#[repr(C)]

‎src/bootstrap/bootstrap.py

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -394,6 +394,7 @@ def default_build_triple(verbose):
394394
"i686": "i686",
395395
"i686-AT386": "i686",
396396
"i786": "i686",
397+
"loongarch32": "loongarch32",
397398
"loongarch64": "loongarch64",
398399
"m68k": "m68k",
399400
"csky": "csky",

‎src/bootstrap/src/core/sanity.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,8 @@ pub struct Finder {
3434
// Targets can be removed from this list once they are present in the stage0 compiler (usually by updating the beta compiler of the bootstrap).
3535
const STAGE0_MISSING_TARGETS: &[&str] = &[
3636
// just a dummy comment so the list doesn't get onelined
37+
"loongarch32-unknown-none",
38+
"loongarch32-unknown-none-softfloat",
3739
];
3840

3941
/// Minimum version threshold for libstdc++ required when using prebuilt LLVM

‎src/doc/rustc/src/platform-support.md

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -324,6 +324,8 @@ target | std | host | notes
324324
[`i686-win7-windows-msvc`](platform-support/win7-windows-msvc.md) | ✓ | | 32-bit Windows 7 support [^x86_32-floats-return-ABI] [^win32-msvc-alignment]
325325
[`i686-wrs-vxworks`](platform-support/vxworks.md) | ✓ | | [^x86_32-floats-return-ABI]
326326
[`loongarch64-unknown-linux-ohos`](platform-support/openharmony.md) | ✓ | | LoongArch64 OpenHarmony
327+
[`loongarch32-unknown-none`](platform-support/loongarch-none.md) | * | LoongArch32 Bare-metal (ILP32D ABI)
328+
[`loongarch32-unknown-none-softfloat`](platform-support/loongarch-none.md) | * | LoongArch32 Bare-metal (ILP32S ABI)
327329
[`m68k-unknown-linux-gnu`](platform-support/m68k-unknown-linux-gnu.md) | ? | | Motorola 680x0 Linux
328330
[`m68k-unknown-none-elf`](platform-support/m68k-unknown-none-elf.md) | | | Motorola 680x0
329331
`mips-unknown-linux-gnu` | ✓ | ✓ | MIPS Linux (kernel 4.4, glibc 2.23)

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