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Freax13Freax13
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Revert "Merge pull request #529 from adavis628/master"
This reverts commit ffe34b0, reversing changes made to a675195.
1 parent f01a291 commit 0413fc6

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4 files changed

+26
-149
lines changed

4 files changed

+26
-149
lines changed

‎src/registers/model_specific.rs

-89
Original file line numberDiff line numberDiff line change
@@ -67,10 +67,6 @@ pub struct UCet;
6767
#[derive(Debug)]
6868
pub struct SCet;
6969

70-
/// IA32_PAT: Page Attribute Table.
71-
#[derive(Debug)]
72-
pub struct Pat;
73-
7470
/// IA32_APIC_BASE: status and location of the local APIC
7571
///
7672
/// IA32_APIC_BASE must be supported on the CPU, otherwise, a general protection exception will occur. Support can be detected using the `cpuid` instruction.
@@ -122,22 +118,6 @@ impl SCet {
122118
pub const MSR: Msr = Msr(0x6A2);
123119
}
124120

125-
impl Pat {
126-
/// The underlying model specific register.
127-
pub const MSR: Msr = Msr(0x277);
128-
/// The default PAT configuration following a power up or reset of the processor.
129-
pub const DEFAULT: [PatMemoryType; 8] = [
130-
PatMemoryType::WriteBack,
131-
PatMemoryType::WriteThrough,
132-
PatMemoryType::Uncacheable,
133-
PatMemoryType::StrongUncacheable,
134-
PatMemoryType::WriteBack,
135-
PatMemoryType::WriteThrough,
136-
PatMemoryType::Uncacheable,
137-
PatMemoryType::StrongUncacheable,
138-
];
139-
}
140-
141121
impl ApicBase {
142122
/// The underlying model specific register.
143123
pub const MSR: Msr = Msr(0x1B);
@@ -192,43 +172,6 @@ bitflags! {
192172
}
193173
}
194174

195-
#[derive(PartialEq, Eq, PartialOrd, Ord, Hash, Debug, Clone, Copy)]
196-
/// Memory types used in the [PAT](Pat).
197-
#[repr(u8)]
198-
pub enum PatMemoryType {
199-
/// Uncacheable (UC).
200-
StrongUncacheable = 0x00,
201-
/// Uses a write combining (WC) cache policy.
202-
WriteCombining = 0x01,
203-
/// Uses a write through (WT) cache policy.
204-
WriteThrough = 0x04,
205-
/// Uses a write protected (WP) cache policy.
206-
WriteProtected = 0x05,
207-
/// Uses a write back (WB) cache policy.
208-
WriteBack = 0x06,
209-
/// Same as strong uncacheable, but can be overridden to be write combining by MTRRs (UC-).
210-
Uncacheable = 0x07,
211-
}
212-
impl PatMemoryType {
213-
/// Converts from bits, returning `None` if the value is invalid.
214-
pub const fn from_bits(bits: u8) -> Option<Self> {
215-
match bits {
216-
0x00 => Some(Self::StrongUncacheable),
217-
0x01 => Some(Self::WriteCombining),
218-
0x04 => Some(Self::WriteThrough),
219-
0x05 => Some(Self::WriteProtected),
220-
0x06 => Some(Self::WriteBack),
221-
0x07 => Some(Self::Uncacheable),
222-
_ => None,
223-
}
224-
}
225-
226-
/// Gets the underlying bits.
227-
pub const fn bits(self) -> u8 {
228-
self as u8
229-
}
230-
}
231-
232175
bitflags! {
233176
/// Flags for the Advanced Programmable Interrupt Controler Base Register.
234177
#[repr(transparent)]
@@ -724,38 +667,6 @@ mod x86_64 {
724667
}
725668
}
726669

727-
impl Pat {
728-
/// Reads IA32_PAT.
729-
///
730-
/// The PAT must be supported on the CPU, otherwise a general protection exception will
731-
/// occur. Support can be detected using the `cpuid` instruction.
732-
#[inline]
733-
pub fn read() -> [PatMemoryType; 8] {
734-
unsafe { Self::MSR.read() }
735-
.to_ne_bytes()
736-
.map(|bits| PatMemoryType::from_bits(bits).unwrap())
737-
}
738-
739-
/// Writes IA32_PAT.
740-
///
741-
/// The PAT must be supported on the CPU, otherwise a general protection exception will
742-
/// occur. Support can be detected using the `cpuid` instruction.
743-
///
744-
/// # Safety
745-
///
746-
/// All affected pages must be flushed from the TLB. Processor caches may also need to be
747-
/// flushed. Additionally, all pages that map to a given frame must have the same memory
748-
/// type.
749-
#[inline]
750-
pub unsafe fn write(table: [PatMemoryType; 8]) {
751-
let bits = u64::from_ne_bytes(table.map(PatMemoryType::bits));
752-
let mut msr = Self::MSR;
753-
unsafe {
754-
msr.write(bits);
755-
}
756-
}
757-
}
758-
759670
impl ApicBase {
760671
/// Reads the IA32_APIC_BASE MSR.
761672
#[inline]

‎src/structures/paging/mapper/mapped_page_table.rs

+2-10
Original file line numberDiff line numberDiff line change
@@ -421,8 +421,7 @@ impl<P: PageTableFrameMapping> Mapper<Size4KiB> for MappedPageTable<'_, P> {
421421

422422
let frame = p1_entry.frame().map_err(|err| match err {
423423
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
424-
#[allow(deprecated)]
425-
FrameError::HugeFrame => unreachable!(),
424+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
426425
})?;
427426

428427
p1_entry.set_unused();
@@ -712,9 +711,6 @@ impl<P: PageTableFrameMapping> PageTableWalker<P> {
712711
&self,
713712
entry: &'b PageTableEntry,
714713
) -> Result<&'b PageTable, PageTableWalkError> {
715-
if entry.flags().contains(PageTableFlags::HUGE_PAGE) {
716-
return Err(PageTableWalkError::MappedToHugePage);
717-
}
718714
let page_table_ptr = self
719715
.page_table_frame_mapping
720716
.frame_to_pointer(entry.frame()?);
@@ -733,9 +729,6 @@ impl<P: PageTableFrameMapping> PageTableWalker<P> {
733729
&self,
734730
entry: &'b mut PageTableEntry,
735731
) -> Result<&'b mut PageTable, PageTableWalkError> {
736-
if entry.flags().contains(PageTableFlags::HUGE_PAGE) {
737-
return Err(PageTableWalkError::MappedToHugePage);
738-
}
739732
let page_table_ptr = self
740733
.page_table_frame_mapping
741734
.frame_to_pointer(entry.frame()?);
@@ -839,8 +832,7 @@ impl From<FrameError> for PageTableWalkError {
839832
#[inline]
840833
fn from(err: FrameError) -> Self {
841834
match err {
842-
#[allow(deprecated)]
843-
FrameError::HugeFrame => unreachable!(),
835+
FrameError::HugeFrame => PageTableWalkError::MappedToHugePage,
844836
FrameError::FrameNotPresent => PageTableWalkError::NotMapped,
845837
}
846838
}

‎src/structures/paging/mapper/recursive_page_table.rs

+10-35
Original file line numberDiff line numberDiff line change
@@ -322,13 +322,9 @@ impl Mapper<Size1GiB> for RecursivePageTable<'_> {
322322
let p4 = &mut self.p4;
323323
let p4_entry = &p4[page.p4_index()];
324324

325-
if p4_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
326-
return Err(UnmapError::ParentEntryHugePage);
327-
}
328325
p4_entry.frame().map_err(|err| match err {
329326
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
330-
#[allow(deprecated)]
331-
FrameError::HugeFrame => unreachable!(),
327+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
332328
})?;
333329

334330
let p3 = unsafe { &mut *(p3_ptr(page, self.recursive_index)) };
@@ -445,24 +441,16 @@ impl Mapper<Size2MiB> for RecursivePageTable<'_> {
445441
) -> Result<(PhysFrame<Size2MiB>, MapperFlush<Size2MiB>), UnmapError> {
446442
let p4 = &mut self.p4;
447443
let p4_entry = &p4[page.p4_index()];
448-
if p4_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
449-
return Err(UnmapError::ParentEntryHugePage);
450-
}
451444
p4_entry.frame().map_err(|err| match err {
452445
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
453-
#[allow(deprecated)]
454-
FrameError::HugeFrame => unreachable!(),
446+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
455447
})?;
456448

457449
let p3 = unsafe { &mut *(p3_ptr(page, self.recursive_index)) };
458450
let p3_entry = &p3[page.p3_index()];
459-
if p3_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
460-
return Err(UnmapError::ParentEntryHugePage);
461-
}
462451
p3_entry.frame().map_err(|err| match err {
463452
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
464-
#[allow(deprecated)]
465-
FrameError::HugeFrame => unreachable!(),
453+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
466454
})?;
467455

468456
let p2 = unsafe { &mut *(p2_ptr(page, self.recursive_index)) };
@@ -608,44 +596,31 @@ impl Mapper<Size4KiB> for RecursivePageTable<'_> {
608596
) -> Result<(PhysFrame<Size4KiB>, MapperFlush<Size4KiB>), UnmapError> {
609597
let p4 = &mut self.p4;
610598
let p4_entry = &p4[page.p4_index()];
611-
if p4_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
612-
return Err(UnmapError::ParentEntryHugePage);
613-
}
614599
p4_entry.frame().map_err(|err| match err {
615600
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
616-
#[allow(deprecated)]
617-
FrameError::HugeFrame => unreachable!(),
601+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
618602
})?;
619603

620604
let p3 = unsafe { &mut *(p3_ptr(page, self.recursive_index)) };
621605
let p3_entry = &p3[page.p3_index()];
622-
if p3_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
623-
return Err(UnmapError::ParentEntryHugePage);
624-
}
625606
p3_entry.frame().map_err(|err| match err {
626607
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
627-
#[allow(deprecated)]
628-
FrameError::HugeFrame => unreachable!(),
608+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
629609
})?;
630610

631611
let p2 = unsafe { &mut *(p2_ptr(page, self.recursive_index)) };
632612
let p2_entry = &p2[page.p2_index()];
633-
if p2_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
634-
return Err(UnmapError::ParentEntryHugePage);
635-
}
636613
p2_entry.frame().map_err(|err| match err {
637614
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
638-
#[allow(deprecated)]
639-
FrameError::HugeFrame => unreachable!(),
615+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
640616
})?;
641617

642618
let p1 = unsafe { &mut *(p1_ptr(page, self.recursive_index)) };
643619
let p1_entry = &mut p1[page.p1_index()];
644620

645621
let frame = p1_entry.frame().map_err(|err| match err {
646622
FrameError::FrameNotPresent => UnmapError::PageNotMapped,
647-
#[allow(deprecated)]
648-
FrameError::HugeFrame => unreachable!(),
623+
FrameError::HugeFrame => UnmapError::ParentEntryHugePage,
649624
})?;
650625

651626
p1_entry.set_unused();
@@ -843,6 +818,9 @@ impl Translate for RecursivePageTable<'_> {
843818
if p1_entry.is_unused() {
844819
return TranslateResult::NotMapped;
845820
}
821+
if p1_entry.flags().contains(PageTableFlags::HUGE_PAGE) {
822+
panic!("level 1 entry has huge page bit set")
823+
}
846824

847825
let frame = match PhysFrame::from_start_address(p1_entry.addr()) {
848826
Ok(frame) => frame,
@@ -912,9 +890,6 @@ impl CleanUp for RecursivePageTable<'_> {
912890
!(level == PageTableLevel::Four && *i == recursive_index.into())
913891
})
914892
{
915-
if entry.flags().contains(PageTableFlags::HUGE_PAGE) {
916-
continue;
917-
}
918893
if let Ok(frame) = entry.frame() {
919894
let start = VirtAddr::forward_checked_impl(
920895
table_addr,

‎src/structures/paging/page_table.rs

+14-15
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@ use bitflags::bitflags;
1515
pub enum FrameError {
1616
/// The entry does not have the `PRESENT` flag set, so it isn't currently mapped to a frame.
1717
FrameNotPresent,
18-
#[deprecated = "`HugeFrame` is no longer returned by the `frame` method"]
19-
/// The entry does have the `HUGE_PAGE` flag set.
18+
/// The entry does have the `HUGE_PAGE` flag set. The `frame` method has a standard 4KiB frame
19+
/// as return type, so a huge frame can't be returned.
2020
HugeFrame,
2121
}
2222

@@ -63,12 +63,16 @@ impl PageTableEntry {
6363
/// Returns the following errors:
6464
///
6565
/// - `FrameError::FrameNotPresent` if the entry doesn't have the `PRESENT` flag set.
66+
/// - `FrameError::HugeFrame` if the entry has the `HUGE_PAGE` flag set (for huge pages the
67+
/// `addr` function must be used)
6668
#[inline]
6769
pub fn frame(&self) -> Result<PhysFrame, FrameError> {
68-
if self.flags().contains(PageTableFlags::PRESENT) {
69-
Ok(PhysFrame::containing_address(self.addr()))
70-
} else {
70+
if !self.flags().contains(PageTableFlags::PRESENT) {
7171
Err(FrameError::FrameNotPresent)
72+
} else if self.flags().contains(PageTableFlags::HUGE_PAGE) {
73+
Err(FrameError::HugeFrame)
74+
} else {
75+
Ok(PhysFrame::containing_address(self.addr()))
7276
}
7377
}
7478

@@ -82,6 +86,7 @@ impl PageTableEntry {
8286
/// Map the entry to the specified physical frame with the specified flags.
8387
#[inline]
8488
pub fn set_frame(&mut self, frame: PhysFrame, flags: PageTableFlags) {
89+
assert!(!flags.contains(PageTableFlags::HUGE_PAGE));
8590
self.set_addr(frame.start_address(), flags)
8691
}
8792

@@ -123,21 +128,17 @@ bitflags! {
123128
/// Controls whether accesses from userspace (i.e. ring 3) are permitted.
124129
const USER_ACCESSIBLE = 1 << 2;
125130
/// If this bit is set, a “write-through” policy is used for the cache, else a “write-back”
126-
/// policy is used. This referred to as the page-level write-through (PWT) bit.
131+
/// policy is used.
127132
const WRITE_THROUGH = 1 << 3;
128-
/// Disables caching for the pointed entry if it is cacheable. This referred to as the
129-
/// page-level cache disable (PCD) bit.
133+
/// Disables caching for the pointed entry is cacheable.
130134
const NO_CACHE = 1 << 4;
131135
/// Set by the CPU when the mapped frame or page table is accessed.
132136
const ACCESSED = 1 << 5;
133137
/// Set by the CPU on a write to the mapped frame.
134138
const DIRTY = 1 << 6;
135-
/// Specifies that the entry maps a huge frame instead of a page table. This is the same bit
136-
/// as `PAT_4KIB_PAGE`.
139+
/// Specifies that the entry maps a huge frame instead of a page table. Only allowed in
140+
/// P2 or P3 tables.
137141
const HUGE_PAGE = 1 << 7;
138-
/// This is the PAT bit for page table entries that point to 4KiB pages. This is the same
139-
/// bit as `HUGE_PAGE`.
140-
const PAT_4KIB_PAGE = 1 << 7;
141142
/// Indicates that the mapping is present in all address spaces, so it isn't flushed from
142143
/// the TLB on an address space switch.
143144
const GLOBAL = 1 << 8;
@@ -147,8 +148,6 @@ bitflags! {
147148
const BIT_10 = 1 << 10;
148149
/// Available to the OS, can be used to store additional data, e.g. custom flags.
149150
const BIT_11 = 1 << 11;
150-
/// This is the PAT bit for page table entries that point to huge pages.
151-
const PAT_HUGE_PAGE = 1 << 12;
152151
/// Available to the OS, can be used to store additional data, e.g. custom flags.
153152
const BIT_52 = 1 << 52;
154153
/// Available to the OS, can be used to store additional data, e.g. custom flags.

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