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fix(rt): avoid compilation of multiple architecture support functions in the same chip SoC feature
On Rust documents both the functions are kept, however. Signed-off-by: Zhouqi Jiang <[email protected]>
1 parent 08ed2af commit 098f702

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2 files changed

+8
-9
lines changed

2 files changed

+8
-9
lines changed

allwinner-rt/src/arch/andes_a27l2.rs

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
/// Jump over head data to executable code.
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///
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/// TODO Andes start code.
4-
#[cfg(feature = "v821")]
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#[cfg_attr(
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any(all(feature = "v821", target_arch = "riscv64"), doc),
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unsafe(link_section = ".text.entry")
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)]
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#[unsafe(naked)]
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#[unsafe(link_section = ".text.entry")]
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pub unsafe extern "C" fn start() -> ! {
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const STACK_SIZE: usize = 8 * 1024;
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#[unsafe(link_section = ".bss.uninit")]

allwinner-rt/src/arch/thead_c906.rs

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,11 @@
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///
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/// NOTE: `mxstatus` is a custom T-Head register. Do not confuse with `mstatus`.
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/// It allows for configuring special eXtensions. See further below for details.
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#[cfg(any(all(feature = "d1", target_arch = "riscv64"), doc))]
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#[cfg_attr(
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any(all(feature = "d1", target_arch = "riscv64"), doc),
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unsafe(link_section = ".text.entry")
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)]
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#[unsafe(naked)]
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#[unsafe(link_section = ".text.entry")]
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pub unsafe extern "C" fn thead_c906_start() -> ! {
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use super::riscv_fpu::init_floating_point;
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use crate::main;
@@ -60,11 +62,6 @@ pub unsafe extern "C" fn thead_c906_start() -> ! {
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)
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}
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#[cfg(not(any(all(feature = "d1", target_arch = "riscv64"), doc)))]
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pub unsafe extern "C" fn thead_c906_start() -> ! {
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unimplemented!()
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}
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/// Stop a T-Head C906 core.
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#[unsafe(naked)]
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pub unsafe extern "C" fn thead_c906_halt() -> ! {

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