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debug.c
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debug.c
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/* Copyright(c) 2019-2020 Realtek Corporation
*/
#include "coex.h"
#include "debug.h"
#include "fw.h"
#include "mac.h"
#include "ps.h"
#include "reg.h"
#include "sar.h"
#ifdef CONFIG_RTW89_DEBUGMSG
unsigned int rtw89_debug_mask;
EXPORT_SYMBOL(rtw89_debug_mask);
module_param_named(debug_mask, rtw89_debug_mask, uint, 0644);
MODULE_PARM_DESC(debug_mask, "Debugging mask");
#endif
#ifdef CONFIG_RTW89_DEBUGFS
struct rtw89_debugfs_priv {
struct rtw89_dev *rtwdev;
int (*cb_read)(struct seq_file *m, void *v);
ssize_t (*cb_write)(struct file *filp, const char __user *buffer,
size_t count, loff_t *loff);
union {
u32 cb_data;
struct {
u32 addr;
u8 len;
} read_reg;
struct {
u32 addr;
u32 mask;
u8 path;
} read_rf;
struct {
u8 ss_dbg:1;
u8 dle_dbg:1;
u8 dmac_dbg:1;
u8 cmac_dbg:1;
u8 dbg_port:1;
} dbgpkg_en;
struct {
u32 start;
u32 len;
u8 sel;
} mac_mem;
};
};
static int rtw89_debugfs_single_show(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
return debugfs_priv->cb_read(m, v);
}
static ssize_t rtw89_debugfs_single_write(struct file *filp,
const char __user *buffer,
size_t count, loff_t *loff)
{
struct rtw89_debugfs_priv *debugfs_priv = filp->private_data;
return debugfs_priv->cb_write(filp, buffer, count, loff);
}
static ssize_t rtw89_debugfs_seq_file_write(struct file *filp,
const char __user *buffer,
size_t count, loff_t *loff)
{
struct seq_file *seqpriv = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = seqpriv->private;
return debugfs_priv->cb_write(filp, buffer, count, loff);
}
static int rtw89_debugfs_single_open(struct inode *inode, struct file *filp)
{
return single_open(filp, rtw89_debugfs_single_show, inode->i_private);
}
static int rtw89_debugfs_close(struct inode *inode, struct file *filp)
{
return 0;
}
static const struct file_operations file_ops_single_r = {
.owner = THIS_MODULE,
.open = rtw89_debugfs_single_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static const struct file_operations file_ops_common_rw = {
.owner = THIS_MODULE,
.open = rtw89_debugfs_single_open,
.release = single_release,
.read = seq_read,
.llseek = seq_lseek,
.write = rtw89_debugfs_seq_file_write,
};
static const struct file_operations file_ops_single_w = {
.owner = THIS_MODULE,
.write = rtw89_debugfs_single_write,
.open = simple_open,
.release = rtw89_debugfs_close,
};
static ssize_t
rtw89_debug_priv_read_reg_select(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct seq_file *m = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
u32 addr, len;
int num;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%x %x", &addr, &len);
if (num != 2) {
rtw89_info(rtwdev, "invalid format: <addr> <len>\n");
return -EINVAL;
}
debugfs_priv->read_reg.addr = addr;
debugfs_priv->read_reg.len = len;
rtw89_info(rtwdev, "select read %d bytes from 0x%08x\n", len, addr);
return count;
}
static int rtw89_debug_priv_read_reg_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
u32 addr, data;
u8 len;
len = debugfs_priv->read_reg.len;
addr = debugfs_priv->read_reg.addr;
switch (len) {
case 1:
data = rtw89_read8(rtwdev, addr);
break;
case 2:
data = rtw89_read16(rtwdev, addr);
break;
case 4:
data = rtw89_read32(rtwdev, addr);
break;
default:
rtw89_info(rtwdev, "invalid read reg len %d\n", len);
return -EINVAL;
}
seq_printf(m, "get %d bytes at 0x%08x=0x%08x\n", len, addr, data);
return 0;
}
static ssize_t rtw89_debug_priv_write_reg_set(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct rtw89_debugfs_priv *debugfs_priv = filp->private_data;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
u32 addr, val, len;
int num;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%x %x %x", &addr, &val, &len);
if (num != 3) {
rtw89_info(rtwdev, "invalid format: <addr> <val> <len>\n");
return -EINVAL;
}
switch (len) {
case 1:
rtw89_info(rtwdev, "reg write8 0x%08x: 0x%02x\n", addr, val);
rtw89_write8(rtwdev, addr, (u8)val);
break;
case 2:
rtw89_info(rtwdev, "reg write16 0x%08x: 0x%04x\n", addr, val);
rtw89_write16(rtwdev, addr, (u16)val);
break;
case 4:
rtw89_info(rtwdev, "reg write32 0x%08x: 0x%08x\n", addr, val);
rtw89_write32(rtwdev, addr, (u32)val);
break;
default:
rtw89_info(rtwdev, "invalid read write len %d\n", len);
break;
}
return count;
}
static ssize_t
rtw89_debug_priv_read_rf_select(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct seq_file *m = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
u32 addr, mask;
u8 path;
int num;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%hhd %x %x", &path, &addr, &mask);
if (num != 3) {
rtw89_info(rtwdev, "invalid format: <path> <addr> <mask>\n");
return -EINVAL;
}
if (path >= rtwdev->chip->rf_path_num) {
rtw89_info(rtwdev, "wrong rf path\n");
return -EINVAL;
}
debugfs_priv->read_rf.addr = addr;
debugfs_priv->read_rf.mask = mask;
debugfs_priv->read_rf.path = path;
rtw89_info(rtwdev, "select read rf path %d from 0x%08x\n", path, addr);
return count;
}
static int rtw89_debug_priv_read_rf_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
u32 addr, data, mask;
u8 path;
addr = debugfs_priv->read_rf.addr;
mask = debugfs_priv->read_rf.mask;
path = debugfs_priv->read_rf.path;
data = rtw89_read_rf(rtwdev, path, addr, mask);
seq_printf(m, "path %d, rf register 0x%08x=0x%08x\n", path, addr, data);
return 0;
}
static ssize_t rtw89_debug_priv_write_rf_set(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct rtw89_debugfs_priv *debugfs_priv = filp->private_data;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
u32 addr, val, mask;
u8 path;
int num;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%hhd %x %x %x", &path, &addr, &mask, &val);
if (num != 4) {
rtw89_info(rtwdev, "invalid format: <path> <addr> <mask> <val>\n");
return -EINVAL;
}
if (path >= rtwdev->chip->rf_path_num) {
rtw89_info(rtwdev, "wrong rf path\n");
return -EINVAL;
}
rtw89_info(rtwdev, "path %d, rf register write 0x%08x=0x%08x (mask = 0x%08x)\n",
path, addr, val, mask);
rtw89_write_rf(rtwdev, path, addr, mask, val);
return count;
}
static int rtw89_debug_priv_rf_reg_dump_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
const struct rtw89_chip_info *chip = rtwdev->chip;
u32 addr, offset, data;
u8 path;
for (path = 0; path < chip->rf_path_num; path++) {
seq_printf(m, "RF path %d:\n\n", path);
for (addr = 0; addr < 0x100; addr += 4) {
seq_printf(m, "0x%08x: ", addr);
for (offset = 0; offset < 4; offset++) {
data = rtw89_read_rf(rtwdev, path,
addr + offset, RFREG_MASK);
seq_printf(m, "0x%05x ", data);
}
seq_puts(m, "\n");
}
seq_puts(m, "\n");
}
return 0;
}
struct txpwr_ent {
const char *txt;
u8 len;
};
struct txpwr_map {
const struct txpwr_ent *ent;
u8 size;
u32 addr_from;
u32 addr_to;
};
#define __GEN_TXPWR_ENT2(_t, _e0, _e1) \
{ .len = 2, .txt = _t "\t- " _e0 " " _e1 }
#define __GEN_TXPWR_ENT4(_t, _e0, _e1, _e2, _e3) \
{ .len = 4, .txt = _t "\t- " _e0 " " _e1 " " _e2 " " _e3 }
#define __GEN_TXPWR_ENT8(_t, _e0, _e1, _e2, _e3, _e4, _e5, _e6, _e7) \
{ .len = 8, .txt = _t "\t- " \
_e0 " " _e1 " " _e2 " " _e3 " " \
_e4 " " _e5 " " _e6 " " _e7 }
static const struct txpwr_ent __txpwr_ent_byr[] = {
__GEN_TXPWR_ENT4("CCK ", "1M ", "2M ", "5.5M ", "11M "),
__GEN_TXPWR_ENT4("LEGACY ", "6M ", "9M ", "12M ", "18M "),
__GEN_TXPWR_ENT4("LEGACY ", "24M ", "36M ", "48M ", "54M "),
/* 1NSS */
__GEN_TXPWR_ENT4("MCS_1NSS ", "MCS0 ", "MCS1 ", "MCS2 ", "MCS3 "),
__GEN_TXPWR_ENT4("MCS_1NSS ", "MCS4 ", "MCS5 ", "MCS6 ", "MCS7 "),
__GEN_TXPWR_ENT4("MCS_1NSS ", "MCS8 ", "MCS9 ", "MCS10", "MCS11"),
__GEN_TXPWR_ENT4("HEDCM_1NSS", "MCS0 ", "MCS1 ", "MCS3 ", "MCS4 "),
/* 2NSS */
__GEN_TXPWR_ENT4("MCS_2NSS ", "MCS0 ", "MCS1 ", "MCS2 ", "MCS3 "),
__GEN_TXPWR_ENT4("MCS_2NSS ", "MCS4 ", "MCS5 ", "MCS6 ", "MCS7 "),
__GEN_TXPWR_ENT4("MCS_2NSS ", "MCS8 ", "MCS9 ", "MCS10", "MCS11"),
__GEN_TXPWR_ENT4("HEDCM_2NSS", "MCS0 ", "MCS1 ", "MCS3 ", "MCS4 "),
};
static_assert((ARRAY_SIZE(__txpwr_ent_byr) * 4) ==
(R_AX_PWR_BY_RATE_MAX - R_AX_PWR_BY_RATE + 4));
static const struct txpwr_map __txpwr_map_byr = {
.ent = __txpwr_ent_byr,
.size = ARRAY_SIZE(__txpwr_ent_byr),
.addr_from = R_AX_PWR_BY_RATE,
.addr_to = R_AX_PWR_BY_RATE_MAX,
};
static const struct txpwr_ent __txpwr_ent_lmt[] = {
/* 1TX */
__GEN_TXPWR_ENT2("CCK_1TX_20M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("CCK_1TX_40M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("OFDM_1TX ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_2 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_3 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_4 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_5 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_6 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_20M_7 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_2 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_3 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_80M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_80M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_160M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_0p5", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_1TX_40M_2p5", "NON_BF", "BF"),
/* 2TX */
__GEN_TXPWR_ENT2("CCK_2TX_20M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("CCK_2TX_40M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("OFDM_2TX ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_2 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_3 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_4 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_5 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_6 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_20M_7 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_2 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_3 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_80M_0 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_80M_1 ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_160M ", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_0p5", "NON_BF", "BF"),
__GEN_TXPWR_ENT2("MCS_2TX_40M_2p5", "NON_BF", "BF"),
};
static_assert((ARRAY_SIZE(__txpwr_ent_lmt) * 2) ==
(R_AX_PWR_LMT_MAX - R_AX_PWR_LMT + 4));
static const struct txpwr_map __txpwr_map_lmt = {
.ent = __txpwr_ent_lmt,
.size = ARRAY_SIZE(__txpwr_ent_lmt),
.addr_from = R_AX_PWR_LMT,
.addr_to = R_AX_PWR_LMT_MAX,
};
static const struct txpwr_ent __txpwr_ent_lmt_ru[] = {
/* 1TX */
__GEN_TXPWR_ENT8("1TX", "RU26__0", "RU26__1", "RU26__2", "RU26__3",
"RU26__4", "RU26__5", "RU26__6", "RU26__7"),
__GEN_TXPWR_ENT8("1TX", "RU52__0", "RU52__1", "RU52__2", "RU52__3",
"RU52__4", "RU52__5", "RU52__6", "RU52__7"),
__GEN_TXPWR_ENT8("1TX", "RU106_0", "RU106_1", "RU106_2", "RU106_3",
"RU106_4", "RU106_5", "RU106_6", "RU106_7"),
/* 2TX */
__GEN_TXPWR_ENT8("2TX", "RU26__0", "RU26__1", "RU26__2", "RU26__3",
"RU26__4", "RU26__5", "RU26__6", "RU26__7"),
__GEN_TXPWR_ENT8("2TX", "RU52__0", "RU52__1", "RU52__2", "RU52__3",
"RU52__4", "RU52__5", "RU52__6", "RU52__7"),
__GEN_TXPWR_ENT8("2TX", "RU106_0", "RU106_1", "RU106_2", "RU106_3",
"RU106_4", "RU106_5", "RU106_6", "RU106_7"),
};
static_assert((ARRAY_SIZE(__txpwr_ent_lmt_ru) * 8) ==
(R_AX_PWR_RU_LMT_MAX - R_AX_PWR_RU_LMT + 4));
static const struct txpwr_map __txpwr_map_lmt_ru = {
.ent = __txpwr_ent_lmt_ru,
.size = ARRAY_SIZE(__txpwr_ent_lmt_ru),
.addr_from = R_AX_PWR_RU_LMT,
.addr_to = R_AX_PWR_RU_LMT_MAX,
};
static u8 __print_txpwr_ent(struct seq_file *m, const struct txpwr_ent *ent,
const u8 *buf, const u8 cur)
{
char *fmt;
switch (ent->len) {
case 2:
fmt = "%s\t| %3d, %3d,\tdBm\n";
seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1]);
return 2;
case 4:
fmt = "%s\t| %3d, %3d, %3d, %3d,\tdBm\n";
seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1],
buf[cur + 2], buf[cur + 3]);
return 4;
case 8:
fmt = "%s\t| %3d, %3d, %3d, %3d, %3d, %3d, %3d, %3d,\tdBm\n";
seq_printf(m, fmt, ent->txt, buf[cur], buf[cur + 1],
buf[cur + 2], buf[cur + 3], buf[cur + 4],
buf[cur + 5], buf[cur + 6], buf[cur + 7]);
return 8;
default:
return 0;
}
}
static int __print_txpwr_map(struct seq_file *m, struct rtw89_dev *rtwdev,
const struct txpwr_map *map)
{
u8 fct = rtwdev->chip->txpwr_factor_mac;
u8 *buf, cur, i;
u32 val, addr;
int ret;
buf = vzalloc(map->addr_to - map->addr_from + 4);
if (!buf)
return -ENOMEM;
for (addr = map->addr_from; addr <= map->addr_to; addr += 4) {
ret = rtw89_mac_txpwr_read32(rtwdev, RTW89_PHY_0, addr, &val);
if (ret)
val = MASKDWORD;
cur = addr - map->addr_from;
for (i = 0; i < 4; i++, val >>= 8)
buf[cur + i] = FIELD_GET(MASKBYTE0, val) >> fct;
}
for (cur = 0, i = 0; i < map->size; i++)
cur += __print_txpwr_ent(m, &map->ent[i], buf, cur);
vfree(buf);
return 0;
}
#define case_REGD(_regd) \
case RTW89_ ## _regd: \
seq_puts(m, #_regd "\n"); \
break
static void __print_regd(struct seq_file *m, struct rtw89_dev *rtwdev)
{
u8 band = rtwdev->hal.current_band_type;
u8 regd = rtw89_regd_get(rtwdev, band);
switch (regd) {
default:
seq_printf(m, "UNKNOWN: %d\n", regd);
break;
case_REGD(WW);
case_REGD(ETSI);
case_REGD(FCC);
case_REGD(MKK);
case_REGD(NA);
case_REGD(IC);
case_REGD(KCC);
case_REGD(NCC);
case_REGD(CHILE);
case_REGD(ACMA);
case_REGD(MEXICO);
case_REGD(UKRAINE);
case_REGD(CN);
}
}
#undef case_REGD
static int rtw89_debug_priv_txpwr_table_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
int ret = 0;
mutex_lock(&rtwdev->mutex);
rtw89_leave_ps_mode(rtwdev);
seq_puts(m, "[Regulatory] ");
__print_regd(m, rtwdev);
seq_puts(m, "[SAR]\n");
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0)
rtw89_print_sar(m, rtwdev);
#endif
seq_puts(m, "\n[TX power byrate]\n");
ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_byr);
if (ret)
goto err;
seq_puts(m, "\n[TX power limit]\n");
ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_lmt);
if (ret)
goto err;
seq_puts(m, "\n[TX power limit_ru]\n");
ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_lmt_ru);
if (ret)
goto err;
err:
mutex_unlock(&rtwdev->mutex);
return ret;
}
static ssize_t
rtw89_debug_priv_mac_reg_dump_select(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct seq_file *m = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
int sel;
int ret;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
ret = kstrtoint(buf, 0, &sel);
if (ret)
return ret;
if (sel < RTW89_DBG_SEL_MAC_00 || sel > RTW89_DBG_SEL_RFC) {
rtw89_info(rtwdev, "invalid args: %d\n", sel);
return -EINVAL;
}
debugfs_priv->cb_data = sel;
rtw89_info(rtwdev, "select mac page dump %d\n", debugfs_priv->cb_data);
return count;
}
#define RTW89_MAC_PAGE_SIZE 0x100
static int rtw89_debug_priv_mac_reg_dump_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
enum rtw89_debug_mac_reg_sel reg_sel = debugfs_priv->cb_data;
u32 start, end;
u32 i, j, k, page;
u32 val;
switch (reg_sel) {
case RTW89_DBG_SEL_MAC_00:
seq_puts(m, "Debug selected MAC page 0x00\n");
start = 0x000;
end = 0x014;
break;
case RTW89_DBG_SEL_MAC_40:
seq_puts(m, "Debug selected MAC page 0x40\n");
start = 0x040;
end = 0x07f;
break;
case RTW89_DBG_SEL_MAC_80:
seq_puts(m, "Debug selected MAC page 0x80\n");
start = 0x080;
end = 0x09f;
break;
case RTW89_DBG_SEL_MAC_C0:
seq_puts(m, "Debug selected MAC page 0xc0\n");
start = 0x0c0;
end = 0x0df;
break;
case RTW89_DBG_SEL_MAC_E0:
seq_puts(m, "Debug selected MAC page 0xe0\n");
start = 0x0e0;
end = 0x0ff;
break;
case RTW89_DBG_SEL_BB:
seq_puts(m, "Debug selected BB register\n");
start = 0x100;
end = 0x17f;
break;
case RTW89_DBG_SEL_IQK:
seq_puts(m, "Debug selected IQK register\n");
start = 0x180;
end = 0x1bf;
break;
case RTW89_DBG_SEL_RFC:
seq_puts(m, "Debug selected RFC register\n");
start = 0x1c0;
end = 0x1ff;
break;
default:
seq_puts(m, "Selected invalid register page\n");
return -EINVAL;
}
for (i = start; i <= end; i++) {
page = i << 8;
for (j = page; j < page + RTW89_MAC_PAGE_SIZE; j += 16) {
seq_printf(m, "%08xh : ", 0x18600000 + j);
for (k = 0; k < 4; k++) {
val = rtw89_read32(rtwdev, j + (k << 2));
seq_printf(m, "%08x ", val);
}
seq_puts(m, "\n");
}
}
return 0;
}
static ssize_t
rtw89_debug_priv_mac_mem_dump_select(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct seq_file *m = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
u32 sel, start_addr, len;
int num;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%x %x %x", &sel, &start_addr, &len);
if (num != 3) {
rtw89_info(rtwdev, "invalid format: <sel> <start> <len>\n");
return -EINVAL;
}
debugfs_priv->mac_mem.sel = sel;
debugfs_priv->mac_mem.start = start_addr;
debugfs_priv->mac_mem.len = len;
rtw89_info(rtwdev, "select mem %d start %d len %d\n",
sel, start_addr, len);
return count;
}
static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = {
[RTW89_MAC_MEM_SHARED_BUF] = SHARED_BUF_BASE_ADDR,
[RTW89_MAC_MEM_DMAC_TBL] = DMAC_TBL_BASE_ADDR,
[RTW89_MAC_MEM_SHCUT_MACHDR] = SHCUT_MACHDR_BASE_ADDR,
[RTW89_MAC_MEM_STA_SCHED] = STA_SCHED_BASE_ADDR,
[RTW89_MAC_MEM_RXPLD_FLTR_CAM] = RXPLD_FLTR_CAM_BASE_ADDR,
[RTW89_MAC_MEM_SECURITY_CAM] = SECURITY_CAM_BASE_ADDR,
[RTW89_MAC_MEM_WOW_CAM] = WOW_CAM_BASE_ADDR,
[RTW89_MAC_MEM_CMAC_TBL] = CMAC_TBL_BASE_ADDR,
[RTW89_MAC_MEM_ADDR_CAM] = ADDR_CAM_BASE_ADDR,
[RTW89_MAC_MEM_BA_CAM] = BA_CAM_BASE_ADDR,
[RTW89_MAC_MEM_BCN_IE_CAM0] = BCN_IE_CAM0_BASE_ADDR,
[RTW89_MAC_MEM_BCN_IE_CAM1] = BCN_IE_CAM1_BASE_ADDR,
};
static void rtw89_debug_dump_mac_mem(struct seq_file *m,
struct rtw89_dev *rtwdev,
u8 sel, u32 start_addr, u32 len)
{
u32 base_addr, start_page, residue;
u32 i, j, p, pages;
u32 dump_len, remain;
u32 val;
remain = len;
pages = len / MAC_MEM_DUMP_PAGE_SIZE + 1;
start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
base_addr = mac_mem_base_addr_table[sel];
base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
for (p = 0; p < pages; p++) {
dump_len = min_t(u32, remain, MAC_MEM_DUMP_PAGE_SIZE);
rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, base_addr);
for (i = R_AX_INDIR_ACCESS_ENTRY + residue;
i < R_AX_INDIR_ACCESS_ENTRY + dump_len;) {
seq_printf(m, "%08xh:", i);
for (j = 0;
j < 4 && i < R_AX_INDIR_ACCESS_ENTRY + dump_len;
j++, i += 4) {
val = rtw89_read32(rtwdev, i);
seq_printf(m, " %08x", val);
remain -= 4;
}
seq_puts(m, "\n");
}
base_addr += MAC_MEM_DUMP_PAGE_SIZE;
}
}
static int
rtw89_debug_priv_mac_mem_dump_get(struct seq_file *m, void *v)
{
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
mutex_lock(&rtwdev->mutex);
rtw89_leave_ps_mode(rtwdev);
rtw89_debug_dump_mac_mem(m, rtwdev,
debugfs_priv->mac_mem.sel,
debugfs_priv->mac_mem.start,
debugfs_priv->mac_mem.len);
mutex_unlock(&rtwdev->mutex);
return 0;
}
static ssize_t
rtw89_debug_priv_mac_dbg_port_dump_select(struct file *filp,
const char __user *user_buf,
size_t count, loff_t *loff)
{
struct seq_file *m = (struct seq_file *)filp->private_data;
struct rtw89_debugfs_priv *debugfs_priv = m->private;
struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
char buf[32];
size_t buf_size;
int sel, set;
int num;
bool enable;
buf_size = min(count, sizeof(buf) - 1);
if (copy_from_user(buf, user_buf, buf_size))
return -EFAULT;
buf[buf_size] = '\0';
num = sscanf(buf, "%d %d", &sel, &set);
if (num != 2) {
rtw89_info(rtwdev, "invalid format: <sel> <set>\n");
return -EINVAL;
}
enable = set == 0 ? false : true;
switch (sel) {
case 0:
debugfs_priv->dbgpkg_en.ss_dbg = enable;
break;
case 1:
debugfs_priv->dbgpkg_en.dle_dbg = enable;
break;
case 2:
debugfs_priv->dbgpkg_en.dmac_dbg = enable;
break;
case 3:
debugfs_priv->dbgpkg_en.cmac_dbg = enable;
break;
case 4:
debugfs_priv->dbgpkg_en.dbg_port = enable;
break;
default:
rtw89_info(rtwdev, "invalid args: sel %d set %d\n", sel, set);
return -EINVAL;
}
rtw89_info(rtwdev, "%s debug port dump %d\n",
enable ? "Enable" : "Disable", sel);
return count;
}
static int rtw89_debug_mac_dump_ss_dbg(struct rtw89_dev *rtwdev,
struct seq_file *m)
{
return 0;
}
static int rtw89_debug_mac_dump_dle_dbg(struct rtw89_dev *rtwdev,
struct seq_file *m)
{
#define DLE_DFI_DUMP(__type, __target, __sel) \
({ \
u32 __ctrl; \
u32 __reg_ctrl = R_AX_##__type##_DBG_FUN_INTF_CTL; \
u32 __reg_data = R_AX_##__type##_DBG_FUN_INTF_DATA; \
u32 __data, __val32; \
int __ret; \
\
__ctrl = FIELD_PREP(B_AX_##__type##_DFI_TRGSEL, \
DLE_DFI_TYPE_##__target) | \
FIELD_PREP(B_AX_##__type##_DFI_ADDR, __sel) | \
B_AX_WDE_DFI_ACTIVE; \
rtw89_write32(rtwdev, __reg_ctrl, __ctrl); \
__ret = read_poll_timeout(rtw89_read32, __val32, \
!(__val32 & B_AX_##__type##_DFI_ACTIVE), \
1000, 50000, false, \
rtwdev, __reg_ctrl); \
if (__ret) { \
rtw89_err(rtwdev, "failed to dump DLE %s %s %d\n", \
#__type, #__target, __sel); \
return __ret; \
} \
\
__data = rtw89_read32(rtwdev, __reg_data); \
__data; \
})
#define DLE_DFI_FREE_PAGE_DUMP(__m, __type) \
({ \
u32 __freepg, __pubpg; \
u32 __freepg_head, __freepg_tail, __pubpg_num; \
\
__freepg = DLE_DFI_DUMP(__type, FREEPG, 0); \
__pubpg = DLE_DFI_DUMP(__type, FREEPG, 1); \
__freepg_head = FIELD_GET(B_AX_DLE_FREE_HEADPG, __freepg); \
__freepg_tail = FIELD_GET(B_AX_DLE_FREE_TAILPG, __freepg); \
__pubpg_num = FIELD_GET(B_AX_DLE_PUB_PGNUM, __pubpg); \
seq_printf(__m, "[%s] freepg head: %d\n", \
#__type, __freepg_head); \
seq_printf(__m, "[%s] freepg tail: %d\n", \
#__type, __freepg_tail); \
seq_printf(__m, "[%s] pubpg num : %d\n", \
#__type, __pubpg_num); \
})
#define case_QUOTA(__m, __type, __id) \
case __type##_QTAID_##__id: \
val32 = DLE_DFI_DUMP(__type, QUOTA, __type##_QTAID_##__id); \
rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, val32); \
use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, val32); \
seq_printf(__m, "[%s][%s] rsv_pgnum: %d\n", \
#__type, #__id, rsv_pgnum); \
seq_printf(__m, "[%s][%s] use_pgnum: %d\n", \
#__type, #__id, use_pgnum); \
break
u32 quota_id;
u32 val32;
u16 rsv_pgnum, use_pgnum;
int ret;
ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL);
if (ret) {
seq_puts(m, "[DLE] : DMAC not enabled\n");
return ret;
}
DLE_DFI_FREE_PAGE_DUMP(m, WDE);
DLE_DFI_FREE_PAGE_DUMP(m, PLE);
for (quota_id = 0; quota_id <= WDE_QTAID_CPUIO; quota_id++) {
switch (quota_id) {
case_QUOTA(m, WDE, HOST_IF);
case_QUOTA(m, WDE, WLAN_CPU);
case_QUOTA(m, WDE, DATA_CPU);
case_QUOTA(m, WDE, PKTIN);
case_QUOTA(m, WDE, CPUIO);
}
}
for (quota_id = 0; quota_id <= PLE_QTAID_CPUIO; quota_id++) {
switch (quota_id) {
case_QUOTA(m, PLE, B0_TXPL);
case_QUOTA(m, PLE, B1_TXPL);
case_QUOTA(m, PLE, C2H);
case_QUOTA(m, PLE, H2C);
case_QUOTA(m, PLE, WLAN_CPU);
case_QUOTA(m, PLE, MPDU);
case_QUOTA(m, PLE, CMAC0_RX);
case_QUOTA(m, PLE, CMAC1_RX);
case_QUOTA(m, PLE, CMAC1_BBRPT);
case_QUOTA(m, PLE, WDRLS);
case_QUOTA(m, PLE, CPUIO);
}
}
return 0;
#undef case_QUOTA
#undef DLE_DFI_DUMP
#undef DLE_DFI_FREE_PAGE_DUMP
}
static int rtw89_debug_mac_dump_dmac_dbg(struct rtw89_dev *rtwdev,
struct seq_file *m)
{
int ret;
ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL);
if (ret) {
seq_puts(m, "[DMAC] : DMAC not enabled\n");
return ret;
}
seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR));
seq_printf(m, "[0]R_AX_WDRLS_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR));
seq_printf(m, "[1]R_AX_SEC_ERR_IMR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_SEC_ERR_IMR_ISR));
seq_printf(m, "[2.1]R_AX_MPDU_TX_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR));
seq_printf(m, "[2.2]R_AX_MPDU_RX_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR));
seq_printf(m, "[3]R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR));
seq_printf(m, "[4]R_AX_WDE_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR));
seq_printf(m, "[5.1]R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR));
seq_printf(m, "[5.2]R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n",
rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1));
seq_printf(m, "[6]R_AX_PLE_ERR_FLAG_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR));
seq_printf(m, "[7]R_AX_PKTIN_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR));
seq_printf(m, "[8.1]R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR));
seq_printf(m, "[8.2]R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR));
seq_printf(m, "[8.3]R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR));
seq_printf(m, "[10]R_AX_CPUIO_ERR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR));
seq_printf(m, "[11.1]R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR));
seq_printf(m, "[11.2]R_AX_BBRPT_CHINFO_ERR_IMR_ISR=0x%08x\n",
rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR_ISR));