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1 | 1 | /*
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2 |
| - Copyright (c) TOKITA Hiroshi. All right reserved. |
| 2 | + * SPI Master library for Arduino Zero. |
| 3 | + * Copyright (c) 2015 Arduino LLC |
| 4 | + * |
| 5 | + * This library is free software; you can redistribute it and/or |
| 6 | + * modify it under the terms of the GNU Lesser General Public |
| 7 | + * License as published by the Free Software Foundation; either |
| 8 | + * version 2.1 of the License, or (at your option) any later version. |
| 9 | + * |
| 10 | + * This library is distributed in the hope that it will be useful, |
| 11 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | + * Lesser General Public License for more details. |
| 14 | + * |
| 15 | + * You should have received a copy of the GNU Lesser General Public |
| 16 | + * License along with this library; if not, write to the Free Software |
| 17 | + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | + */ |
3 | 19 |
|
4 |
| - This library is free software; you can redistribute it and/or |
5 |
| - modify it under the terms of the GNU Lesser General Public |
6 |
| - License as published by the Free Software Foundation; either |
7 |
| - version 2.1 of the License, or (at your option) any later version. |
| 20 | +#include "SPI.h" |
| 21 | +#include "variant.h" |
8 | 22 |
|
9 |
| - This library is distributed in the hope that it will be useful, |
10 |
| - but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 |
| - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
12 |
| - See the GNU Lesser General Public License for more details. |
| 23 | +#ifndef SPI_CLOCK |
| 24 | +#define SPI_CLOCK SystemCoreClock |
| 25 | +#endif |
13 | 26 |
|
14 |
| - You should have received a copy of the GNU Lesser General Public |
15 |
| - License along with this library; if not, write to the Free Software |
16 |
| - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
17 |
| -*/ |
| 27 | +const SPISettings DEFAULT_SPI_SETTINGS = SPISettings(); |
18 | 28 |
|
19 |
| -#include "platform.h" |
| 29 | +SPIClass::SPIClass(struct spi_device* _spi) |
| 30 | + : spi(_spi) |
| 31 | + , divider(SPI_CLOCK/DEFAULT_SPI_SETTINGS.clock) |
| 32 | + , bitOrder(DEFAULT_SPI_SETTINGS.bitOrder) |
| 33 | + , dataMode(DEFAULT_SPI_SETTINGS.dataMode) |
| 34 | + , initialized(false) |
| 35 | +{ |
| 36 | + DBG_PRINTF("SPIClass::SPIClass\r\n"); |
| 37 | +} |
20 | 38 |
|
21 |
| -#ifndef PLATFORM_SPI_HEADER |
| 39 | +void SPIClass::begin() |
| 40 | +{ |
| 41 | + init(); |
22 | 42 |
|
23 |
| -/* TODO implement */ |
| 43 | + divider = SPI_CLOCK/DEFAULT_SPI_SETTINGS.clock; |
| 44 | + bitOrder = DEFAULT_SPI_SETTINGS.bitOrder; |
| 45 | + dataMode = DEFAULT_SPI_SETTINGS.dataMode; |
| 46 | + |
| 47 | + config(DEFAULT_SPI_SETTINGS); |
| 48 | +} |
| 49 | + |
| 50 | +void SPIClass::init() |
| 51 | +{ |
| 52 | + DBG_PRINTF("SystemCoreClock %d\r\n", SystemCoreClock); |
| 53 | + DBG_PRINTF("DEFAULT_SPI_SETTINGS.clock %d\r\n", DEFAULT_SPI_SETTINGS.clock); |
| 54 | + if (initialized) |
| 55 | + return; |
| 56 | + |
| 57 | + spi->init(spi->devinfo); |
| 58 | + initialized = true; |
| 59 | +} |
| 60 | + |
| 61 | +void SPIClass::config(SPISettings settings) |
| 62 | +{ |
| 63 | + spi->configure(spi->devinfo, |
| 64 | + settings.bitOrder == MSBFIRST ? 1 : 0, |
| 65 | + settings.dataMode & 0x1 ? 1 : 0, |
| 66 | + settings.dataMode & 0x2 ? 0 : 1, |
| 67 | + settings.clock); |
| 68 | +} |
| 69 | + |
| 70 | +void SPIClass::end() |
| 71 | +{ |
| 72 | + spi->deinit(spi->devinfo); |
| 73 | + initialized = false; |
| 74 | +} |
| 75 | + |
| 76 | +#if 0 |
| 77 | +#ifndef interruptsStatus |
| 78 | +#define interruptsStatus() __interruptsStatus() |
| 79 | +static inline unsigned char __interruptsStatus(void) __attribute__((always_inline, unused)); |
| 80 | +static inline unsigned char __interruptsStatus(void) |
| 81 | +{ |
| 82 | + // See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/CHDBIBGJ.html |
| 83 | + return (__get_PRIMASK() ? 0 : 1); |
| 84 | +} |
| 85 | +#endif |
| 86 | +#endif |
| 87 | + |
| 88 | +void SPIClass::usingInterrupt(int interruptNumber) |
| 89 | +{ |
| 90 | + spi->mask_interrupt_on_transaction(spi->devinfo, interruptNumber); |
| 91 | +} |
| 92 | + |
| 93 | +void SPIClass::beginTransaction(SPISettings settings) |
| 94 | +{ |
| 95 | + config(settings); |
| 96 | + spi->start(spi->devinfo); |
| 97 | +} |
| 98 | + |
| 99 | +void SPIClass::endTransaction(void) |
| 100 | +{ |
| 101 | + spi->stop(spi->devinfo); |
| 102 | +} |
| 103 | + |
| 104 | +void SPIClass::setBitOrder(BitOrder order) |
| 105 | +{ |
| 106 | + bitOrder = order; |
| 107 | + if(initialized) |
| 108 | + config(SPISettings(SPI_CLOCK/divider, bitOrder, dataMode) ); |
| 109 | +} |
| 110 | + |
| 111 | +void SPIClass::setDataMode(uint8_t mode) |
| 112 | +{ |
| 113 | + dataMode = mode; |
| 114 | + if(initialized) |
| 115 | + config(SPISettings(SPI_CLOCK/divider, bitOrder, dataMode) ); |
| 116 | +} |
| 117 | + |
| 118 | +void SPIClass::setClockDivider(uint8_t div) |
| 119 | +{ |
| 120 | + divider = div; |
| 121 | + if(initialized) |
| 122 | + config(SPISettings(SPI_CLOCK/divider, bitOrder, dataMode) ); |
| 123 | +} |
| 124 | + |
| 125 | +byte SPIClass::transfer(uint8_t data) |
| 126 | +{ |
| 127 | + return spi->transfer(spi->devinfo, data); |
| 128 | +} |
| 129 | + |
| 130 | +uint16_t SPIClass::transfer16(uint16_t data) { |
| 131 | + union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } t; |
| 132 | + |
| 133 | + t.val = data; |
| 134 | + |
| 135 | + if (bitOrder == LSBFIRST) { |
| 136 | + t.lsb = transfer(t.lsb); |
| 137 | + t.msb = transfer(t.msb); |
| 138 | + } else { |
| 139 | + t.msb = transfer(t.msb); |
| 140 | + t.lsb = transfer(t.lsb); |
| 141 | + } |
| 142 | + |
| 143 | + return t.val; |
| 144 | +} |
| 145 | + |
| 146 | +void SPIClass::transfer(void *buf, size_t count) |
| 147 | +{ |
| 148 | + uint8_t *buffer = reinterpret_cast<uint8_t *>(buf); |
| 149 | + for (size_t i=0; i<count; i++) { |
| 150 | + *buffer = transfer(*buffer); |
| 151 | + buffer++; |
| 152 | + } |
| 153 | +} |
| 154 | + |
| 155 | +void SPIClass::attachInterrupt() { |
| 156 | + // Should be enableInterrupt() |
| 157 | +} |
| 158 | + |
| 159 | +void SPIClass::detachInterrupt() { |
| 160 | + // Should be disableInterrupt() |
| 161 | +} |
| 162 | + |
| 163 | +#if SPI_INTERFACES_COUNT > 0 |
| 164 | + SPIClass SPI(SPI_INTERFACE); |
| 165 | +#endif |
| 166 | +#if SPI_INTERFACES_COUNT > 1 |
| 167 | + SPIClass SPI1(SPI1_INTERFACE); |
| 168 | +#endif |
| 169 | +#if SPI_INTERFACES_COUNT > 2 |
| 170 | + SPIClass SPI2(SPI2_INTERFACE); |
| 171 | +#endif |
| 172 | +#if SPI_INTERFACES_COUNT > 3 |
| 173 | + SPIClass SPI2(SPI2_INTERFACE); |
| 174 | +#endif |
| 175 | +#if SPI_INTERFACES_COUNT > 4 |
| 176 | + SPIClass SPI3(SPI3_INTERFACE); |
| 177 | +#endif |
| 178 | +#if SPI_INTERFACES_COUNT > 5 |
| 179 | + SPIClass SPI4(SPI4_INTERFACE); |
| 180 | +#endif |
24 | 181 |
|
25 |
| -#endif // PLATFORM_SPI_HEADER |
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