From 81afd27879fd1a3ad587d4e72aeb512ce5c4a89c Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 2 May 2024 13:45:28 -0700 Subject: [PATCH 01/32] Create DPU-test-plan.md --- docs/testplan/DPU-test-plan.md | 874 +++++++++++++++++++++++++++++++++ 1 file changed, 874 insertions(+) create mode 100644 docs/testplan/DPU-test-plan.md diff --git a/docs/testplan/DPU-test-plan.md b/docs/testplan/DPU-test-plan.md new file mode 100644 index 00000000000..41f02ad2681 --- /dev/null +++ b/docs/testplan/DPU-test-plan.md @@ -0,0 +1,874 @@ +# Test plan for DPU Platform for Chassis + +- [Introduction](#introduction) +- [Scope](#scope) +- [Definitions and Abbreviations](#definitions-and-abbreviations) +- [Test Cases](#test-cases) + - [1.1 Check platform inventory](#11-check-platform-inventory) + - [1.2 Check platform voltage](#12-check-platform-voltage) + - [1.3 Check platform temperature](#13-check-platform-temperature) + - [1.4 Check dpu console](#14-check-dpu-console) + - [1.5 Check midplane ip address between NPU and DPU](#15-check-midplane-ip-address-between-NPU-and-DPU) + - [1.6 Check DPU shutdown and power up individually](#16-check-DPU-shutdown-and-power-up-individually) + - [1.7 Check removal of pcie link between npu and dpu](#17-check-removal-of-pcie-link-between-npu-and-dpu) + - [1.8 Check the NTP date and timezone between DPU and NPU](#18-check-the-ntp-date-and-timezone-between-dpu-and-npu) + - [1.9 Check the State of DPUs](#19-check-the-state-of-dpus) + - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) + - [1.11 Check reboot cause history](#111-check-reboot-cause-history) + - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) + +## Introduction + +The purpose is to test the functionality of DPU platform on SONiC switch DUT. +DPU platform is on in which switch is connected to dpu sleds via pcie link having two dpus per sled. + +## Scope + +The test is targeting a running SONiC system on each dpus. Purpose of the test is to verify a platform +related functionalities/features for each dpus from the switch itself. +For every test cases, all DPUs need to be powered on unless specified in any of the case. + +## Definitions and Abbreviations + +| **Term** | **Meaning** | +| ---------- | ---------------------------------------- | +| DPU | Data Processing Unit | +| NPU | Network Processing Unit | + + +## Objectives of Test Cases + +| | **Test Case** | **Intention** | +| ---------- | ---------- | ---------------------------------------- | +| 1.1 | Check platform inventory | To verify the DPU inventories shown in the cli | +| 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | +| 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | +| 1.4 | Check dpu console | To Verify console access for all DPUs | +| 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | +| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other dpus in same as well in other sleds are up | +| 1.7 | Check removal of pcie link between npu and dpu | To Verify the PCie hot plug functinality | +| 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | +| 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | +| 1.10 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | +| 1.11 | Check reboot cause history | To Verify reboot cause history cli | +| 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | + + +## Test Cases + + +### 1.1 Check Platform Inventory + +#### Steps + * Use command `show platform inventory` to get inventory + * Get the number of dpu modules from PMON APIs - get_num_modules() + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# show platform inventory + Name Product ID Version Serial Number Description + +Chassis + CHASSIS 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +Route Processors + RP0 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +Sled Cards + SLED0 8K-DPU400-2A 0.10 FLM2750036M Cisco 800 2xDPU Sled AMD Elba + SLED1 8K-DPU400-2A 0.10 FLM2750037E Cisco 800 2xDPU Sled AMD Elba + SLED2 8K-DPU400-2A 0.10 FLM27500389 Cisco 800 2xDPU Sled AMD Elba + SLED3 8K-DPU400-2A 0.10 FLM2750038M Cisco 800 2xDPU Sled AMD Elba + +Dpu Modules + DPU0 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750036M Pensando DSC + DPU1 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037M Pensando DSC + DPU2 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038E Pensando DSC + DPU3 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039E Pensando DSC + DPU4 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500389 Pensando DSC + DPU5 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500390 Pensando DSC + DPU6 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038M Pensando DSC + DPU7 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039M Pensando DSC + +Power Supplies + psutray + PSU0 UCSC-PSU1-2300W A0 DTM274202UB UCS 230000W AC-DC High Line RSP02 Power Supply + PSU1 -- not present + +Cooling Devices + fantray0 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray1 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray2 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray3 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + +FPDs + RP0/info.0 0.8.0-287 \_SB_.PC00.RP07.PXSX.INFO + RP0/info.1 0.4.7-122 \_SB_.PC00.RP01.PXSX.INFO + RP0/info.2 0.2.1-247 \_SB_.PC00.RP10.PXSX.INFO + RP0/info.50.auto 10.2.0-30 \_SB_.PC00.RP07.PXSX.P2PF + +``` +#### Pass/Fail Criteria + * Verify number of dpus from api and number of dpus shown in the cli output. + * Verify powered off dpus should display it as powered off. + * Verify all the serial numbers of the dpus that are powered on are unique. + + +### 1.2 Check platform voltage + +#### Steps + * Use command `show platform voltage` to get platform voltage + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# show platform voltage + Sensor Voltage High TH Low TH Crit High TH Crit Low TH Warning Timestamp +------------------------ --------- --------- -------- -------------- ------------- --------- ----------------- + A1V2_BB 1211 mV 1308 1092 1320 1080 False 20230619 11:31:08 + A1V8_BB 1810 mV 1962 1638 1980 1620 False 20230619 11:31:07 + A1V_BB 1008 mV 1090 910 1100 900 False 20230619 11:31:06 + A1V_CPU 1001 mV 1090 910 1100 900 False 20230619 11:31:51 + A1_2V_CPU 1209 mV 1308 1092 1320 1080 False 20230619 11:31:52 + A1_8V_CPU 1803 mV 1962 1638 1980 1620 False 20230619 11:31:51 + A2_5V_CPU 2517 mV 2725 2275 2750 2250 False 20230619 11:31:52 + A3P3V_CPU 3284 mV 3597 3003 3603 2970 False 20230619 11:31:53 + A3V3_BB 3298 mV 3597 3003 3630 2970 False 20230619 11:31:08 + GB_CORE_VIN_L1_BB 12000 mV 13800 10200 14400 9600 False 20230619 11:31:06 + GB_CORE_VOUT_L1_BB 824 mV N/A 614 918 608 False 20230619 11:31:50 + GB_P1V8_PLLVDD_BB 1812 mV 1962 1638 1980 1620 False 20230619 11:31:11 + GB_P1V8_VDDIO_BB 1815 mV 1962 1638 1980 1620 False 20230619 11:31:11 + GB_PCIE_VDDACK_BB 755 mV 818 683 825 675 False 20230619 11:31:12 + GB_PCIE_VDDH_BB 1208 mV 1308 1092 1320 1080 False 20230619 11:31:12 + P3_3V_BB 3330 mV 3597 3003 3630 2970 False 20230619 11:31:12 + P5V_BB 5069 mV 5450 4550 5500 4500 False 20230619 11:31:07 + P12V_CPU 12103 mV 13080 10920 13200 10800 False 20230619 11:31:54 + P12V_SLED1_VIN 12048 mV N/A N/A 12550 11560 False 20230619 11:31:13 + P12V_SLED2_VIN 12048 mV N/A N/A 12550 11560 False 20230619 11:31:13 + P12V_SLED3_VIN 12079 mV N/A N/A 12550 11560 False 20230619 11:31:13 + P12V_SLED4_VIN 12043 mV N/A N/A 12550 11560 False 20230619 11:31:13 + P12V_STBY_CPU 12103 mV 13080 10920 13200 10800 False 20230619 11:31:54 + P12V_U1_VR3_CPU 11890 mV 13800 10200 14400 9600 False 20230619 11:31:54 + P12V_U1_VR4_CPU 11890 mV N/A N/A N/A N/A False 20230619 11:31:54 + P12V_U1_VR5_CPU 11890 mV 13800 10200 14400 9600 False 20230619 11:31:54 + TI_3V3_L_VIN_BB 12015 mV N/A 10200 14400 9600 False 20230619 11:31:06 + TI_3V3_L_VOUT_L1_BB 3340 mV N/A 2839 4008 2672 False 20230619 11:31:13 + TI_3V3_R_VIN_BB 12078 mV N/A 10200 14400 9600 False 20230619 11:31:06 + TI_3V3_R_VOUT_L1_BB 3340 mV N/A 2839 4008 2672 False 20230619 11:31:13 + TI_GB_VDDA_VOUT_L2_BB 960 mV N/A 816 1152 768 False 20230619 11:31:13 + TI_GB_VDDCK_VIN_BB 12031 mV N/A 10200 14400 9600 False 20230619 11:31:06 + TI_GB_VDDCK_VOUT_L1_BB 1150 mV N/A 978 1380 920 False 20230619 11:31:13 + TI_GB_VDDS_VIN_BB 12046 mV N/A 10200 14400 9600 False 20230619 11:31:50 + TI_GB_VDDS_VOUT_L1_BB 750 mV N/A 638 900 600 False 20230619 11:31:12 + VP0P6_DDR0_VTT_DPU0 599 mV 630 570 642 558 False 20230619 11:31:55 + VP0P6_DDR0_VTT_DPU1 597 mV 630 570 642 558 False 20230619 11:31:56 + VP0P6_DDR0_VTT_DPU2 600 mV 630 570 642 558 False 20230619 11:31:58 + VP0P6_DDR0_VTT_DPU3 600 mV 630 570 642 558 False 20230619 11:31:59 + VP0P6_DDR0_VTT_DPU4 599 mV 630 570 642 558 False 20230619 11:32:01 + VP0P6_DDR0_VTT_DPU5 597 mV 630 570 642 558 False 20230619 11:31:02 + VP0P6_DDR0_VTT_DPU6 596 mV 630 570 642 558 False 20230619 11:31:04 + VP0P6_DDR0_VTT_DPU7 599 mV 630 570 642 558 False 20230619 11:31:05 + VP0P6_DDR1_VTT_DPU0 600 mV 630 570 642 558 False 20230619 11:31:56 + VP0P6_DDR1_VTT_DPU1 602 mV 630 570 642 558 False 20230619 11:31:57 + VP0P6_DDR1_VTT_DPU2 601 mV 630 570 642 558 False 20230619 11:31:58 + VP0P6_DDR1_VTT_DPU3 601 mV 630 570 642 558 False 20230619 11:32:00 + VP0P6_DDR1_VTT_DPU4 600 mV 630 570 642 558 False 20230619 11:31:02 + VP0P6_DDR1_VTT_DPU5 597 mV 630 570 642 558 False 20230619 11:31:03 + VP0P6_DDR1_VTT_DPU6 596 mV 630 570 642 558 False 20230619 11:31:04 + VP0P6_DDR1_VTT_DPU7 601 mV 630 570 642 558 False 20230619 11:31:06 + VP0P6_VTT_DIMM_CPU 597 mV 654 546 660 540 False 20230619 11:31:51 + VP0P8_AVDD_D6_DPU0 801 mV 840 760 856 744 False 20230619 11:31:16 + VP0P8_AVDD_D6_DPU1_ADC 806 mV 840 760 856 744 False 20230619 11:31:20 + VP0P8_AVDD_D6_DPU2 804 mV 840 760 856 744 False 20230619 11:31:25 + VP0P8_AVDD_D6_DPU3_ADC 805 mV 840 760 856 744 False 20230619 11:31:29 + VP0P8_AVDD_D6_DPU4 806 mV 840 760 856 744 False 20230619 11:31:34 + VP0P8_AVDD_D6_DPU5_ADC 801 mV 840 760 856 744 False 20230619 11:31:39 + VP0P8_AVDD_D6_DPU6 805 mV 840 760 856 744 False 20230619 11:31:44 + VP0P8_AVDD_D6_DPU7_ADC 806 mV 840 760 856 744 False 20230619 11:31:48 + VP0P8_NW_DPU0 803 mV 840 760 856 744 False 20230619 11:31:17 + VP0P8_NW_DPU1 804 mV 840 760 856 744 False 20230619 11:31:21 + VP0P8_NW_DPU2 803 mV 840 760 856 744 False 20230619 11:31:26 + VP0P8_NW_DPU3 804 mV 840 760 856 744 False 20230619 11:31:31 + VP0P8_NW_DPU4 805 mV 840 760 856 744 False 20230619 11:31:35 + VP0P8_NW_DPU5 801 mV 840 760 856 744 False 20230619 11:31:40 + VP0P8_NW_DPU6 801 mV 840 760 856 744 False 20230619 11:31:45 + VP0P8_NW_DPU7 804 mV 840 760 856 744 False 20230619 11:31:49 +VP0P8_PLL_AVDD_PCIE_DPU0 802 mV 840 760 856 744 False 20230619 11:31:56 +VP0P8_PLL_AVDD_PCIE_DPU1 804 mV 840 760 856 744 False 20230619 11:31:57 +VP0P8_PLL_AVDD_PCIE_DPU2 801 mV 840 760 856 744 False 20230619 11:31:59 +VP0P8_PLL_AVDD_PCIE_DPU3 802 mV 840 760 856 744 False 20230619 11:32:00 +VP0P8_PLL_AVDD_PCIE_DPU4 804 mV 840 760 856 744 False 20230619 11:31:02 +VP0P8_PLL_AVDD_PCIE_DPU5 800 mV 840 760 856 744 False 20230619 11:31:03 +VP0P8_PLL_AVDD_PCIE_DPU6 799 mV 840 760 856 744 False 20230619 11:31:05 +VP0P8_PLL_AVDD_PCIE_DPU7 802 mV 840 760 856 744 False 20230619 11:31:06 + VP0P9_AVDDH_D6_DPU0 906 mV 945 855 963 837 False 20230619 11:31:15 + VP0P9_AVDDH_D6_DPU1 908 mV 945 855 963 837 False 20230619 11:31:19 + VP0P9_AVDDH_D6_DPU2 907 mV 945 855 963 837 False 20230619 11:31:24 + VP0P9_AVDDH_D6_DPU3 908 mV 945 855 963 837 False 20230619 11:31:29 + VP0P9_AVDDH_D6_DPU4 910 mV 945 855 963 837 False 20230619 11:31:33 + VP0P9_AVDDH_D6_DPU5 911 mV 945 855 963 837 False 20230619 11:31:38 + VP0P9_AVDDH_D6_DPU6 908 mV 945 855 963 837 False 20230619 11:31:43 + VP0P9_AVDDH_D6_DPU7 907 mV 945 855 963 837 False 20230619 11:31:47 + VP0P9_AVDDH_PCIE_DPU0 901 mV 945 855 963 837 False 20230619 11:31:17 + VP0P9_AVDDH_PCIE_DPU1 903 mV 945 855 963 837 False 20230619 11:31:22 + VP0P9_AVDDH_PCIE_DPU2 901 mV 945 855 963 837 False 20230619 11:31:26 + VP0P9_AVDDH_PCIE_DPU3 903 mV 945 855 963 837 False 20230619 11:31:31 + VP0P9_AVDDH_PCIE_DPU4 902 mV 945 855 963 837 False 20230619 11:31:36 + VP0P9_AVDDH_PCIE_DPU5 901 mV 945 855 963 837 False 20230619 11:31:40 + VP0P9_AVDDH_PCIE_DPU6 902 mV 945 855 963 837 False 20230619 11:31:45 + VP0P9_AVDDH_PCIE_DPU7 903 mV 945 855 963 837 False 20230619 11:31:50 + VP0P75_PVDD_DPU0 752 mV 788 713 803 698 False 20230619 11:31:15 + VP0P75_PVDD_DPU1 756 mV 788 713 802 698 False 20230619 11:31:20 + VP0P75_PVDD_DPU2 756 mV 788 713 803 698 False 20230619 11:31:24 + VP0P75_PVDD_DPU3 755 mV 788 713 802 698 False 20230619 11:31:29 + VP0P75_PVDD_DPU4 756 mV 788 713 803 698 False 20230619 11:31:34 + VP0P75_PVDD_DPU5 757 mV 788 713 802 698 False 20230619 11:31:38 + VP0P75_PVDD_DPU6 756 mV 788 713 803 698 False 20230619 11:31:43 + VP0P75_PVDD_DPU7 756 mV 788 713 802 698 False 20230619 11:31:47 + VP0P75_RTVDD_DPU0 753 mV 788 713 803 698 False 20230619 11:31:14 + VP0P75_RTVDD_DPU1 755 mV 788 713 802 698 False 20230619 11:31:19 + VP0P75_RTVDD_DPU2 752 mV 788 713 803 698 False 20230619 11:31:24 + VP0P75_RTVDD_DPU3 755 mV 788 713 802 698 False 20230619 11:31:28 + VP0P75_RTVDD_DPU4 753 mV 788 713 803 698 False 20230619 11:31:33 + VP0P75_RTVDD_DPU5 757 mV 788 713 802 698 False 20230619 11:31:38 + VP0P75_RTVDD_DPU6 755 mV 788 713 803 698 False 20230619 11:31:42 + VP0P75_RTVDD_DPU7 753 mV 788 713 802 698 False 20230619 11:31:47 + VP0P82_AVDD_PCIE_DPU0 823 mV 861 779 877 763 False 20230619 11:31:18 + VP0P82_AVDD_PCIE_DPU1 823 mV 861 779 877 763 False 20230619 11:31:22 + VP0P82_AVDD_PCIE_DPU2 822 mV 861 779 877 763 False 20230619 11:31:27 + VP0P82_AVDD_PCIE_DPU3 822 mV 861 779 877 763 False 20230619 11:31:31 + VP0P82_AVDD_PCIE_DPU4 823 mV 861 779 877 763 False 20230619 11:31:36 + VP0P82_AVDD_PCIE_DPU5 820 mV 861 779 877 763 False 20230619 11:31:41 + VP0P82_AVDD_PCIE_DPU6 819 mV 861 779 877 763 False 20230619 11:31:45 + VP0P82_AVDD_PCIE_DPU7 824 mV 861 779 877 763 False 20230619 11:31:50 + VP0P85_VDD_MAC_DPU0 853 mV 893 808 910 791 False 20230619 11:31:14 + VP0P85_VDD_MAC_DPU1 854 mV 893 808 910 791 False 20230619 11:31:19 + VP0P85_VDD_MAC_DPU2 853 mV 893 808 910 791 False 20230619 11:31:23 + VP0P85_VDD_MAC_DPU3 856 mV 893 808 910 791 False 20230619 11:31:28 + VP0P85_VDD_MAC_DPU4 856 mV 893 808 910 791 False 20230619 11:31:33 + VP0P85_VDD_MAC_DPU5 856 mV 893 808 910 791 False 20230619 11:31:37 + VP0P85_VDD_MAC_DPU6 857 mV 893 808 910 791 False 20230619 11:31:42 + VP0P85_VDD_MAC_DPU7 852 mV 893 808 910 791 False 20230619 11:31:46 + VP1P0_PCH_CPU 870 mV N/A N/A 1242 562 False 20230619 11:31:54 + VP1P0_PCIE4_CPU 1000 mV 1070 930 1100 900 False 20230619 11:31:54 + VP1P2_DIMM_CPU 1200 mV 1284 1116 1320 1080 False 20230619 11:31:54 + VP1P2_TVDDH_DPU0 1205 mV 1260 1140 1284 1116 False 20230619 11:31:15 + VP1P2_TVDDH_DPU1_ADC 1214 mV 1268 1140 1284 1116 False 20230619 11:31:20 + VP1P2_TVDDH_DPU2 1211 mV 1260 1140 1284 1116 False 20230619 11:31:25 + VP1P2_TVDDH_DPU3_ADC 1210 mV 1268 1140 1284 1116 False 20230619 11:31:29 + VP1P2_TVDDH_DPU4 1211 mV 1260 1140 1284 1116 False 20230619 11:31:34 + VP1P2_TVDDH_DPU5_ADC 1209 mV 1268 1140 1284 1116 False 20230619 11:31:38 + VP1P2_TVDDH_DPU6 1215 mV 1260 1140 1284 1116 False 20230619 11:31:43 + VP1P2_TVDDH_DPU7_ADC 1210 mV 1268 1140 1284 1116 False 20230619 11:31:48 + VP1P05_CPU 1075 mV 1123 977 1155 945 False 20230619 11:31:54 + VP1P8_AOD_PLL_DPU0 1801 mV 1890 1710 1926 1674 False 20230619 11:31:14 + VP1P8_AOD_PLL_DPU1 1809 mV 1890 1710 1926 1674 False 20230619 11:31:18 + VP1P8_AOD_PLL_DPU2 1810 mV 1890 1710 1926 1674 False 20230619 11:31:23 + VP1P8_AOD_PLL_DPU3 1811 mV 1890 1710 1926 1674 False 20230619 11:31:28 + VP1P8_AOD_PLL_DPU4 1811 mV 1890 1710 1926 1674 False 20230619 11:31:32 + VP1P8_AOD_PLL_DPU5 1810 mV 1890 1710 1926 1674 False 20230619 11:31:37 + VP1P8_AOD_PLL_DPU6 1810 mV 1890 1710 1926 1674 False 20230619 11:31:42 + VP1P8_AOD_PLL_DPU7 1804 mV 1890 1710 1926 1674 False 20230619 11:31:46 + VP1P8_CPLD_SLED1 1800 mV 1890 1710 1926 1674 False 20230619 11:31:55 + VP1P8_CPLD_SLED2 1808 mV 1890 1710 1926 1674 False 20230619 11:31:58 + VP1P8_CPLD_SLED3 1805 mV 1890 1710 1926 1674 False 20230619 11:32:01 + VP1P8_CPLD_SLED4 1809 mV 1890 1710 1926 1674 False 20230619 11:31:04 + VP1P8_CPU 1800 mV 1962 1591 2016 1584 False 20230619 11:31:54 + VP1P8_NIC_DPU0 1803 mV 1890 1710 1926 1674 False 20230619 11:31:16 + VP1P8_NIC_DPU1 1812 mV 1890 1710 1926 1674 False 20230619 11:31:20 + VP1P8_NIC_DPU2 1797 mV 1890 1710 1926 1674 False 20230619 11:31:25 + VP1P8_NIC_DPU3 1810 mV 1890 1710 1926 1674 False 20230619 11:31:30 + VP1P8_NIC_DPU4 1804 mV 1890 1710 1926 1674 False 20230619 11:31:35 + VP1P8_NIC_DPU5 1802 mV 1890 1710 1926 1674 False 20230619 11:31:39 + VP1P8_NIC_DPU6 1808 mV 1890 1710 1926 1674 False 20230619 11:31:44 + VP1P8_NIC_DPU7 1811 mV 1890 1710 1926 1674 False 20230619 11:31:48 + VP1P8_SE_AOD_DPU0 1806 mV 1890 1710 1926 1674 False 20230619 11:31:13 + VP1P8_SE_AOD_DPU1 1811 mV 1890 1710 1926 1674 False 20230619 11:31:18 + VP1P8_SE_AOD_DPU2 1808 mV 1890 1710 1926 1674 False 20230619 11:31:23 + VP1P8_SE_AOD_DPU3 1809 mV 1890 1710 1926 1674 False 20230619 11:31:27 + VP1P8_SE_AOD_DPU4 1811 mV 1890 1710 1926 1674 False 20230619 11:31:32 + VP1P8_SE_AOD_DPU5 1813 mV 1890 1710 1926 1674 False 20230619 11:31:36 + VP1P8_SE_AOD_DPU6 1809 mV 1890 1710 1926 1674 False 20230619 11:31:41 + VP1P8_SE_AOD_DPU7 1806 mV 1890 1710 1926 1674 False 20230619 11:31:46 + VP1P8_VCCIN_CPU 1780 mV N/A N/A 2002 1478 False 20230619 11:31:54 + VP1P83_POD_PLL_DPU0 1799 mV 1922 1739 1959 1702 False 20230619 11:31:16 + VP1P83_POD_PLL_DPU1 1809 mV 1922 1739 1958 1702 False 20230619 11:31:21 + VP1P83_POD_PLL_DPU2 1804 mV 1922 1739 1959 1702 False 20230619 11:31:26 + VP1P83_POD_PLL_DPU3 1804 mV 1922 1739 1958 1702 False 20230619 11:31:30 + VP1P83_POD_PLL_DPU4 1808 mV 1922 1739 1959 1702 False 20230619 11:31:35 + VP1P83_POD_PLL_DPU5 1803 mV 1922 1739 1958 1702 False 20230619 11:31:39 + VP1P83_POD_PLL_DPU6 1807 mV 1922 1739 1959 1702 False 20230619 11:31:44 + VP1P83_POD_PLL_DPU7 1805 mV 1922 1739 1958 1702 False 20230619 11:31:49 + VP2P5_DDR_VPP_DPU0 2520 mV 2625 2375 2675 2325 False 20230619 11:31:17 + VP2P5_DDR_VPP_DPU1 2528 mV 2625 2375 2675 2325 False 20230619 11:31:21 + VP2P5_DDR_VPP_DPU2 2523 mV 2625 2375 2675 2325 False 20230619 11:31:26 + VP2P5_DDR_VPP_DPU3 2529 mV 2625 2375 2675 2325 False 20230619 11:31:30 + VP2P5_DDR_VPP_DPU4 2525 mV 2625 2375 2675 2325 False 20230619 11:31:35 + VP2P5_DDR_VPP_DPU5 2523 mV 2625 2375 2675 2325 False 20230619 11:31:40 + VP2P5_DDR_VPP_DPU6 2535 mV 2625 2375 2675 2325 False 20230619 11:31:45 + VP2P5_DDR_VPP_DPU7 2528 mV 2625 2375 2675 2325 False 20230619 11:31:49 + VP2P5_STBY_CPU 2519 mV 2725 2275 2750 2250 False 20230619 11:31:53 + VP3P3_CPLD_SLED1 3307 mV 3465 3135 3531 3069 False 20230619 11:31:54 + VP3P3_CPLD_SLED2 3325 mV 3465 3135 3531 3069 False 20230619 11:31:57 + VP3P3_CPLD_SLED3 3334 mV 3465 3135 3531 3069 False 20230619 11:32:00 + VP3P3_CPLD_SLED4 3327 mV 3465 3135 3531 3069 False 20230619 11:31:03 + VP3P3_CPU 3278 mV 3597 3003 3630 2970 False 20230619 11:31:11 + VP3P3_NIC_DPU0 3289 mV 3465 3135 3531 3069 False 20230619 11:31:55 + VP3P3_NIC_DPU1_ADC 3308 mV 3465 3135 3531 3069 False 20230619 11:31:56 + VP3P3_NIC_DPU2 3293 mV 3465 3135 3531 3069 False 20230619 11:31:58 + VP3P3_NIC_DPU3_ADC 3299 mV 3465 3135 3531 3069 False 20230619 11:31:59 + VP3P3_NIC_DPU4 3306 mV 3465 3135 3531 3069 False 20230619 11:32:01 + VP3P3_NIC_DPU5_ADC 3299 mV 3465 3135 3531 3069 False 20230619 11:31:02 + VP3P3_NIC_DPU6 3308 mV 3465 3135 3531 3069 False 20230619 11:31:04 + VP3P3_NIC_DPU7_ADC 3307 mV 3465 3135 3531 3069 False 20230619 11:31:05 + VP3P3_SATA_CPU 3302 mV 3597 3003 3630 2970 False 20230619 11:31:50 + VP3P3_SLED1 3301 mV 3465 3135 3531 3069 False 20230619 11:31:13 + VP3P3_SLED2 3303 mV 3465 3135 3531 3069 False 20230619 11:31:22 + VP3P3_SLED3 3318 mV 3465 3135 3531 3069 False 20230619 11:31:32 + VP3P3_SLED4 3322 mV 3465 3135 3531 3069 False 20230619 11:31:41 + VP3P3_STBY_BMC_CPU 3322 mV 3597 3003 3603 2970 False 20230619 11:31:52 + VP3P3_STBY_CPU 3322 mV 3597 3003 3603 2970 False 20230619 11:31:53 + VP5P0_CPU 5066 mV 5450 4550 5500 4500 False 20230619 11:31:11 + VP5P0_SLED1 4964 mV 5250 4750 5350 4650 False 20230619 11:31:18 + VP5P0_SLED2 4988 mV 5250 4750 5350 4650 False 20230619 11:31:27 + VP5P0_SLED3 5003 mV 5250 4750 5350 4650 False 20230619 11:31:36 + VP5P0_SLED4 5013 mV 5250 4750 5350 4650 False 20230619 11:31:46 +root@sonic:/home/cisco# + +``` +#### Pass/Fail Criteria + * Verify warnings are all false. + * Verify changing the threshold values (high, low, critical high and critical low) and check alarm warning changing into True + * Verify changing back the threshold values to original one and check alarm warning changing into False + + +### 1.3 Check platform temperature + +#### Steps + * Use command `show platform temperature` to get platform temperature + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:~#show platform temperature + + Sensor Temperature High TH Low TH Crit High TH Crit Low TH Warning Timestamp +--------------- ------------- --------- -------- -------------- ------------- --------- ----------------- + DPU_0_T 37.438 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 + DPU_1_T 37.563 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 + DPU_2_T 38.5 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 + DPU_3_T 38.813 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 + FAN_Sensor 23.201 100.0 -5.0 102.0 -10.0 False 20230728 06:39:18 + MB_PORT_Sensor 21.813 97.0 -5.0 102.0 -10.0 False 20230728 06:39:18 +MB_TMP421_Local 26.25 135.0 -5.0 140.0 -10.0 False 20230728 06:39:18 + SSD_Temp 40.0 80.0 -5.0 83.0 -10.0 False 20230728 06:39:18 + X86_CORE_0_T 37.0 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 + X86_PKG_TEMP 41.0 100.0 -5.0 105.0 -10.0 False 20230728 06:39:18 +``` +#### Pass/Fail Criteria + * Verify warnings are all false + * Verify changing the threshold values (high, low, critical high and critical low) and check alarm warning changing into True + * Verify changing back the threshold values to original one and check alarm warning changing into False + + +### 1.4 Check DPU Console + +#### Steps + * Use command `/usr/bin/picocom -b 115200 /dev/ttyS` to access console for given dpu + * Get starting offset of serial port for dpus using the command `cat /proc/tty/driver/serial` + * Get the number of dpu modules from PMON APIs - get_num_modules(). Test is to check for console access for all DPUs. + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: (shows connection to dpu-4 console and offset is 4 for this case) + +root@sonic:/home/cisco# cat /proc/tty/driver/serial +serinfo:1.0 driver revision: +0: uart:16550A port:000003F8 irq:16 tx:286846 rx:6096 oe:1 RTS|DTR|DSR|CD|RI +1: uart:16550A port:00006000 irq:19 tx:0 rx:0 CTS|DSR|CD +2: uart:16550A port:000003E8 irq:18 tx:0 rx:0 DSR|CD|RI +3: uart:16550A port:00007000 irq:16 tx:0 rx:0 CTS|DSR|CD +**4: uart:16550 mmio:0x94040040 irq:94 tx:0 rx:0 +5: uart:16550 mmio:0x94040060 irq:94 tx:20 rx:68 +6: uart:16550 mmio:0x94040080 irq:94 tx:0 rx:0 +7: uart:16550 mmio:0x940400A0 irq:94 tx:0 rx:0 +8: uart:16550 mmio:0x940400C0 irq:94 tx:0 rx:0 +9: uart:16550 mmio:0x940400E0 irq:94 tx:0 rx:0 +10: uart:16550 mmio:0x94040100 irq:94 tx:0 rx:0 +11: uart:16550 mmio:0x94040120 irq:94 tx:0 rx:0** +12: uart:16550 mmio:0x94040140 irq:94 tx:0 rx:0 CTS|DSR +13: uart:16550 mmio:0x94040160 irq:94 tx:0 rx:0 CTS|DSR +14: uart:16550 mmio:0x94040180 irq:94 tx:0 rx:0 CTS|DSR +15: uart:16550 mmio:0x940401A0 irq:94 tx:0 rx:0 CTS|DSR + +root@sonic:/home/cisco# /usr/bin/picocom -b 115200 /dev/ttyS8 +picocom v3.1 + +port is : /dev/ttyS8 +flowcontrol : none +baudrate is : 115200 +parity is : none +databits are : 8 +stopbits are : 1 +escape is : C-a +local echo is : no +noinit is : no +noreset is : no +hangup is : no +nolock is : no +send_cmd is : sz -vv +receive_cmd is : rz -vv -E +imap is : +omap is : +emap is : crcrlf,delbs, +logfile is : none +initstring : none +exit_after is : not set +exit is : no + +Type [C-a] [C-h] to see available commands +Terminal ready + +sonic login: admin +Password: +Linux sonic 6.1.0-11-2-arm64 #1 SMP Debian 6.1.38-4 (2023-08-08) aarch64 +You are on + ____ ___ _ _ _ ____ + / ___| / _ \| \ | (_)/ ___| + \___ \| | | | \| | | | + ___) | |_| | |\ | | |___ + |____/ \___/|_| \_|_|\____| + +-- Software for Open Networking in the Cloud -- + +Unauthorized access and/or use are prohibited. +All access and/or use are subject to monitoring. + +Help: https://sonic-net.github.io/SONiC/ + +Last login: Fri Jan 26 21:49:12 UTC 2024 from 169.254.143.2 on pts/1 +admin@sonic:~$ +admin@sonic:~$ +Terminating... +Thanks for using picocom +root@sonic:/home/cisco# + +``` +#### Pass/Fail Criteria + * Verify Login access is displayed. + * cntrl+a and then cntrl+x to come out of the dpu console. + + +### 1.5 Check midplane ip address between NPU and DPU + +#### Steps + * Use command `show ip interface` to get ip addresses + * Get the number of dpu modules from PMON APIs - get_num_modules() + * Currently all the interfaces gets static ip address + * Use the command `lspci -d 1dd8:1004` to list all the pcie buses for DPUs + * Ip adddress mapping to dpu - 169.254.x.2 (switch side interface) and 169.254.x.1 (DPU side interface). where x - bus number in decimal number. + * Work in progress - Dymanic assignment of ip address via dhcp + +#### Verify in + * Switch + +#### Sample Output +``` + On Switch: + + root@sonic:/home/cisco# lspci -d 1dd8:1004 +18:00.0 Ethernet controller: Pensando Systems DSC Management Controller +1c:00.0 Ethernet controller: Pensando Systems DSC Management Controller +20:00.0 Ethernet controller: Pensando Systems DSC Management Controller +24:00.0 Ethernet controller: Pensando Systems DSC Management Controller +8b:00.0 Ethernet controller: Pensando Systems DSC Management Controller +8f:00.0 Ethernet controller: Pensando Systems DSC Management Controller +93:00.0 Ethernet controller: Pensando Systems DSC Management Controller +97:00.0 Ethernet controller: Pensando Systems DSC Management Controller +root@sonic:/home/cisco# + + + root@sonic:/home/cisco# show ip interface + Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP + ------------ -------- ------------------- ------------ -------------- ------------- + eth0 172.25.42.65/24 up/up N/A N/A + eth1 169.254.24.2/24 up/up N/A N/A + eth2 169.254.28.2/24 up/up N/A N/A + eth3 169.254.32.2/24 up/up N/A N/A + eth4 169.254.36.2/24 up/up N/A N/A + eth5 169.254.139.2/24 up/up N/A N/A + eth6 169.254.143.2/24 up/up N/A N/A + eth7 169.254.147.2/24 up/up N/A N/A + eth8 169.254.151.2/24 up/up N/A N/A + lo 127.0.0.1/16 up/up N/A N/A + root@sonic:/home/cisco# +``` +#### Pass/Fail Criteria + * Verify output on switch to see all 169.254.x.x network interfaces are showing both Admin and Oper up. + * Verify number of interfaces should be equal to number of dpu modules. + + +### 1.6 Check DPU shutdown and power up individually + +#### Steps + * Get the number of dpu modules from PMON APIs - get_num_modules() + * Use command `config chassis modules shutdown ` to shut down individual dpu + * Use command `show platform inventory` to show dpu status + * Use command `config chassis modules startup ` to power up individual dpu + * Use command `show platform inventory` to show dpu status + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# config chassis modules shutdown DPU4 +root@sonic:/home/cisco# +root@sonic:/home/cisco# show platform inventory + Name Product ID Version Serial Number Description + +Chassis + CHASSIS 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +Route Processors + RP0 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +Sled Cards + SLED0 8K-DPU400-2A 0.10 FLM2750036M Cisco 800 2xDPU Sled AMD Elba + SLED1 8K-DPU400-2A 0.10 FLM2750037E Cisco 800 2xDPU Sled AMD Elba + SLED2 8K-DPU400-2A 0.10 FLM27500389 Cisco 800 2xDPU Sled AMD Elba + SLED3 8K-DPU400-2A 0.10 FLM2750038M Cisco 800 2xDPU Sled AMD Elba + +Dpu Modules + DPU0 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750036M Pensando DSC + DPU1 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037M Pensando DSC + DPU2 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037E Pensando DSC + DPU3 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038E Pensando DSC + DPU4 DSS-MTFUJI Powered off + DPU5 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500390 Pensando DSC + DPU6 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038M Pensando DSC + DPU7 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039M Pensando DSC + +Power Supplies + psutray + PSU0 UCSC-PSU1-2300W A0 DTM274202UB UCS 230000W AC-DC High Line RSP02 Power Supply + PSU1 -- not present + +Cooling Devices + fantray0 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray1 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray2 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + fantray3 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 + +FPDs + RP0/info.0 0.8.0-287 \_SB_.PC00.RP07.PXSX.INFO + RP0/info.1 0.4.7-122 \_SB_.PC00.RP01.PXSX.INFO + RP0/info.2 0.2.1-247 \_SB_.PC00.RP10.PXSX.INFO + RP0/info.50.auto 10.2.0-30 \_SB_.PC00.RP07.PXSX.P2PF + +root@sonic:/home/cisco# config chassis modules startup DPU4 + +``` +#### Pass/Fail Criteria + * Verify dpu powered off in platform inventory after dpu shut down + * Verify dpu is shown in platform inventory after dpu powered on + + +### 1.7 Check removal of pcie link between npu and dpu + +#### Steps + * Use command `pcieutil generate` to generate pcie yaml + * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing + * Use command `echo 1 > /sys/bus/pci/devices/BUS_ID/remove` to remove pcie link between npu and one dpu + * Use `show platform pcieinfo -c` to run the pcie info test to check pcie link has been removed + * Use command `echo 1 > /sys/bus/pci/rescan` to rescan pcie links + * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing + * This test is to check the PCie hot plug functinality since there is no OIR possible + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: Showing example of one dpu pcie link + +root@sonic:/home/cisco# pcieutil generate +Are you sure to overwrite config file pcie.yaml with current pcie device info? [y/N]: y +Generated config file '/usr/share/sonic/device/x86_64-8102_28fh_dpu_o-r0/pcie.yaml' +root@sonic:/home/cisco# show platform pcieinfo -c + +root@sonic:/home/cisco# echo 1 > /sys/bus/pci/devices/0000:1a:00.0/remove +root@sonic:/home/cisco# +root@sonic:/home/cisco# echo 1 > /sys/bus/pci/rescan +root@sonic:/home/cisco# +root@sonic:/home/cisco# show platform pcieinfo -c + +``` +#### Pass/Fail Criteria + * Verify after removing pcie link, pcie info test fail only for that pcie link. + * Verify pcieinfo test pass for all after bringing back up the link + + +### 1.8 Check the NTP date and timezone between DPU and NPU + +#### Steps + * In Switch, under the file /etc/ntp.conf configure it to use the ntp server and restart ntp.service to configure + * In DPU, similarly under the ntp configuration use the switches ip as ntp server and restart ntp service to configure + * Use command `date` to start the NTP server on Swith + * Use command `ssh admin@169.254.x.x` to enter into required dpu. + * Use command `date` to start the NTP server on DPU + * Use command `date` to get date and time zone on host. + * Use command `date` again on dpu to show date and time zone of dpu. + +#### Verify in + * Switch and dpu + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# date +Tue 23 Apr 2024 11:46:47 PM UTC +root@sonic:/home/cisco# +. +root@sonic:/home/cisco# ssh admin@169.254.24.1 +root@sonic:/home/cisco# +. +On DPU: +root@sonic:/home/admin# date +Tue 23 Apr 2024 11:46:54 PM UTC +root@sonic:/home/cisco# + +``` +#### Pass/Fail Criteria + * Verify both the date and time zone are same + * Verify the syslogs on both switch and dpu to be same + +### 1.9 Check the State of DPUs + +#### Steps + * Use command `show system-health DPU all` to get DPU health status. + +#### Verify in + * Switch and dpu + +#### Sample Output +``` +On Switch: + +root@sonic:~#show system-health DPU all + +Name ID Oper-Status State-Detail State-Value Time Reason +DPU0 1 Online dpu_midplane_link_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_booted_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_control_plane_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_data_plane_state up Wed 20 Oct 2023 06:52:28 PM UTC + + +DPU1 2 Online dpu_midplane_link_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_booted_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_control_plane_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_data_plane_state up Wed 20 Oct 2023 06:52:28 PM UTC + +root@sonic:~#show system-health DPU 0 + +Name ID Oper-Status State-Detail State-Value Time Reason +DPU0 1 Offline dpu_midplane_link_state down Wed 20 Oct 2023 06:52:28 PM UTC + dpu_booted_state down Wed 20 Oct 2023 06:52:28 PM UTC + dpu_control_plane_state down Wed 20 Oct 2023 06:52:28 PM UTC + dpu_data_plane_state down Wed 20 Oct 2023 06:52:28 PM UTC + +root@sonic:~#show system-health DPU 0 + +Name ID Oper-Status State-Detail State-Value Time Reason +DPU0 1 Partial Online dpu_midplane_link_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_booted_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_control_plane_state up Wed 20 Oct 2023 06:52:28 PM UTC + dpu_data_plane_state down Wed 20 Oct 2023 06:52:28 PM UTC Pipeline failure + + +``` +#### Pass/Fail Criteria + * Verify the following criteria for Pass/Fail: + * Online : All states are up + * Offline: dpu_midplane_link_state or dpu_booted_state is down + * Partial Online: dpu_midplane_link_state is up and dpu_booted_state is up and dpu_control_plane_state is up and dpu_data_plane_state is down + + +### 1.10 Check the Health of DPUs + +#### Steps + * Use command `show system-health detail ` to check the health of the dpu. + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# show system-health detail + +Device: DPU0 + +System status summary + + System status LED green + Services: + Status: Not OK + Not Running: container_checker, lldp + Hardware: + Status: OK + +system services and devices monitor list + +Name Status Type +------------------------- -------- ---------- +mtvr-r740-04-bf3-sonic-01 OK System +rsyslog OK Process + +``` +#### Pass/Fail Criteria + * Verify System Status - Green, Service Status - OK, Hardware Status - OK + * Stop any docker in DPU and check for Service Status - Not OK and that docker as Not running + * Start the docker again and Verify System Status - Green, Service Status - OK, Hardware Status - OK + +### 1.11 Check reboot cause history + +#### Steps + * The "show reboot-cause" CLI on the switch shows the most recent rebooted device, time and the cause. + * The "show reboot-cause history" CLI on the switch shows the history of the Switch and all DPUs + * The "show reboot-cause history module-name" CLI on the switch shows the history of the specified module + * Use `config chassis modules shutdown ` + * Use `config chassis modules startup ` + * Wait for 5 minutes for Pmon to update the dpu states + * Use `show reboot-cause ` to check the latest reboot is displayed + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:~#show reboot-cause + +Device Name Cause Time User Comment + +switch 2023_10_20_18_52_28 Watchdog:1 expired; Wed 20 Oct 2023 06:52:28 PM UTC N/A N/A +DPU3 2023_10_03_18_23_46 Watchdog: stage 1 expired; Mon 03 Oct 2023 06:23:46 PM UTC N/A N/A +DPU2 2023_10_02_17_20_46 reboot Sun 02 Oct 2023 05:20:46 PM UTC admin User issued 'reboot' + +root@sonic:~#show reboot-cause history + +Device Name Cause Time User Comment + +switch 2023_10_20_18_52_28 Watchdog:1 expired; Wed 20 Oct 2023 06:52:28 PM UTC N/A N/A +switch 2023_10_05_18_23_46 reboot Wed 05 Oct 2023 06:23:46 PM UTC user N/A +DPU3 2023_10_03_18_23_46 Watchdog: stage 1 expired; Mon 03 Oct 2023 06:23:46 PM UTC N/A N/A +DPU3 2023_10_02_18_23_46 Host Power-cycle Sun 02 Oct 2023 06:23:46 PM UTC N/A Host lost DPU +DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2023 05:23:46 PM UTC N/A N/A +DPU2 2023_10_02_17_20_46 reboot Sun 02 Oct 2023 05:20:46 PM UTC admin User issued 'reboot' + +"show reboot-cause history module-name" + +root@sonic:~#show reboot-cause history dpu3 + +Device Name Cause Time User Comment + +DPU3 2023_10_03_18_23_46 Watchdog: stage 1 expired; Mon 03 Oct 2023 06:23:46 PM UTC N/A N/A +DPU3 2023_10_02_18_23_46 Host Power-cycle Sun 02 Oct 2023 06:23:46 PM UTC N/A Host lost DPU +DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2023 05:23:46 PM UTC N/A N/A +``` + +#### Pass/Fail Criteria + * Verify the output to check the latest reboot cause with the date time stamp at the start of reboot + * Reboot cause list - Watchdog, reboot command, Host Reset + + +### 1.12 Check the DPU state after OS reboot + +#### Steps + +Existing Test case: + * Reboot using a particular command (sonic reboot, watchdog reboot, etc) (timeout 5 mins, wait 2 mins) + * Wait for ssh to drop + * Wait for ssh to connect + * Database check –1 min timeout + * Check for uptime – (NTP sync) + * Check for critical process – 5 mins timeout – check every 20 secs + * Check for transceiver status –– 5 mins timeout – check every 20 seconds + * Check for pmon status + * Check for reboot cause + * Reboot is successful + +Reboot Test Case for DPU: + * After the exisiting case, Power on all the dpus using `config chassis modules startup ` + * Wait for DPUs to be up + * Use command `show platform inventory` to get inventory + * Get the number of dpu modules from PMON APIs - get_num_modules() + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + +root@sonic:/home/cisco# reboot +root@sonic:/home/cisco# +root@sonic:/home/cisco# config chassis modules startup +root@sonic:/home/cisco# +root@sonic:/home/cisco# +root@sonic:~#show platform inventory + + Name Product ID Version Serial Number Description + +Chassis + CHASSIS 28FH-DPU-O 0.10 FLM274802ER 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +Route Processors + RP0 28FH-DPU-O 0.10 FLM274802ER 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW + +DPU Modules + DPU0 8K-DPU400-2A 0.10 FLM2750036X 400G DPU + DPU1 8K-DPU400-2A 0.10 FLM2750036S 400G DPU + DPU2 8K-DPU400-2A 0.10 FLM274801EY 400G DPU + DPU3 8K-DPU400-2A 0.10 FLM27500371 400G DPU + +Power Supplies + psutray + PSU0 PSUXKW-ACPI 0.0 POG2427K01K AC Power Module with Port-side Air Intake + PSU1 PSUXKW-ACPI 0.0 POG2427K00Y AC Power Module with Port-side Air Intake + +Cooling Devices + fantray0 FAN-2RU-PI-V3 N/A N/A 8000 Series 2RU Fan + fantray1 FAN-2RU-PI-V3 N/A N/A 8000 Series 2RU Fan + +FPDs + RP0/info.0 0.5.6-253 + +``` +#### Pass/Fail Criteria + + * Verify number of dpus from api and number of dpus shown in the cli output. + * Verify all the serial numbers of the dpus that are powered on are unique. + From c4f61bc7f00aa265963a481ad7090bbdddce2835 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 2 May 2024 18:16:24 -0700 Subject: [PATCH 02/32] Rename DPU-test-plan.md to Smartswitch-test-plan.md --- docs/testplan/{DPU-test-plan.md => Smartswitch-test-plan.md} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename docs/testplan/{DPU-test-plan.md => Smartswitch-test-plan.md} (100%) diff --git a/docs/testplan/DPU-test-plan.md b/docs/testplan/Smartswitch-test-plan.md similarity index 100% rename from docs/testplan/DPU-test-plan.md rename to docs/testplan/Smartswitch-test-plan.md From 77e8db43f5363d0779163b5389d0d3a2aa5e8d75 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 2 May 2024 18:22:12 -0700 Subject: [PATCH 03/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 41f02ad2681..ccdbbd99cff 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -1,4 +1,4 @@ -# Test plan for DPU Platform for Chassis +# Test plan for Smartswitch - [Introduction](#introduction) - [Scope](#scope) From f14fe635b54970971d952d86e2fdbb7d4b458b77 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 2 May 2024 18:25:27 -0700 Subject: [PATCH 04/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index ccdbbd99cff..963073e334f 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -19,13 +19,13 @@ ## Introduction -The purpose is to test the functionality of DPU platform on SONiC switch DUT. +The purpose is to test the functionality of Smartswitch. DPU platform is on in which switch is connected to dpu sleds via pcie link having two dpus per sled. ## Scope The test is targeting a running SONiC system on each dpus. Purpose of the test is to verify a platform -related functionalities/features for each dpus from the switch itself. +related functionalities/features for each dpus. For every test cases, all DPUs need to be powered on unless specified in any of the case. ## Definitions and Abbreviations From 73626f040660eb0a587bb540abbfcb13fe61f47e Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 2 May 2024 18:27:44 -0700 Subject: [PATCH 05/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 963073e334f..f89aec6160d 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -20,12 +20,12 @@ ## Introduction The purpose is to test the functionality of Smartswitch. -DPU platform is on in which switch is connected to dpu sleds via pcie link having two dpus per sled. +Smartswitch is connected to dpu sleds via pcie link having two dpus per sled. ## Scope -The test is targeting a running SONiC system on each dpus. Purpose of the test is to verify a platform -related functionalities/features for each dpus. +The test is targeting a running SONiC system on each dpus. +Purpose of the test is to verify smartswich platform related functionalities/features for each dpus. For every test cases, all DPUs need to be powered on unless specified in any of the case. ## Definitions and Abbreviations From 1586905249b2f7ad0f4b181b958481f14599f5d6 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Fri, 3 May 2024 09:02:26 -0700 Subject: [PATCH 06/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index f89aec6160d..896c8ae0041 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -19,8 +19,7 @@ ## Introduction -The purpose is to test the functionality of Smartswitch. -Smartswitch is connected to dpu sleds via pcie link having two dpus per sled. +The smartSwitch is a next generation of data center switch for T0/T1 roles, that now subsumes the DPU. This PR describes test cases to validate additional platform management functions such FPD, BMC, Console, Power mgmt., Health, Software upgrade, Life-cycle scenarios needed due to the presence of these DPUs in the system. ## Scope From 9c34f3e3eacd4eee322cc38938d864f8b33625b3 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Fri, 3 May 2024 09:04:46 -0700 Subject: [PATCH 07/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 896c8ae0041..f89aec6160d 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -19,7 +19,8 @@ ## Introduction -The smartSwitch is a next generation of data center switch for T0/T1 roles, that now subsumes the DPU. This PR describes test cases to validate additional platform management functions such FPD, BMC, Console, Power mgmt., Health, Software upgrade, Life-cycle scenarios needed due to the presence of these DPUs in the system. +The purpose is to test the functionality of Smartswitch. +Smartswitch is connected to dpu sleds via pcie link having two dpus per sled. ## Scope From 07cca7da5a47bfe3e0b13f1e6fb609174624d07f Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 8 May 2024 17:26:31 -0700 Subject: [PATCH 08/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index f89aec6160d..6575b88e106 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -24,7 +24,7 @@ Smartswitch is connected to dpu sleds via pcie link having two dpus per sled. ## Scope -The test is targeting a running SONiC system on each dpus. +The test is targeting a running SONIC on Switch and SONIC-DASH system on each dpus. Purpose of the test is to verify smartswich platform related functionalities/features for each dpus. For every test cases, all DPUs need to be powered on unless specified in any of the case. @@ -661,6 +661,7 @@ root@sonic:/home/cisco# #### Pass/Fail Criteria * Verify both the date and time zone are same * Verify the syslogs on both switch and dpu to be same + * Verify by changing time intentially and restart. Verify again for time sync ### 1.9 Check the State of DPUs @@ -801,7 +802,7 @@ DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2 #### Pass/Fail Criteria * Verify the output to check the latest reboot cause with the date time stamp at the start of reboot - * Reboot cause list - Watchdog, reboot command, Host Reset + * Verify all the reboot causes - Watchdog, reboot command, Host Reset ### 1.12 Check the DPU state after OS reboot From 4af72e5518e968f64c2851a2d68a3c394804222f Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 9 May 2024 11:34:19 -0700 Subject: [PATCH 09/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 6575b88e106..ab6d1da0564 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -712,6 +712,7 @@ DPU0 1 Partial Online dpu_midplane_link_state up * Online : All states are up * Offline: dpu_midplane_link_state or dpu_booted_state is down * Partial Online: dpu_midplane_link_state is up and dpu_booted_state is up and dpu_control_plane_state is up and dpu_data_plane_state is down + * Verify powering down dpu and check for status and powering up again to check the status to show online. ### 1.10 Check the Health of DPUs From 74f2e9f9102e23da45894f87c19389ddb3806aeb Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 9 May 2024 11:48:07 -0700 Subject: [PATCH 10/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index ab6d1da0564..9e3c442f3a2 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -661,7 +661,7 @@ root@sonic:/home/cisco# #### Pass/Fail Criteria * Verify both the date and time zone are same * Verify the syslogs on both switch and dpu to be same - * Verify by changing time intentially and restart. Verify again for time sync + * Verify by changing time intentionally in dpu and restart the dpu. Verify again for time sync ### 1.9 Check the State of DPUs From a8bf327fe48ac5f57a115ba9b446e6e7f4e4d284 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 25 Jun 2024 11:15:48 -0700 Subject: [PATCH 11/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 9e3c442f3a2..cf6eeb31c02 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -20,7 +20,7 @@ ## Introduction The purpose is to test the functionality of Smartswitch. -Smartswitch is connected to dpu sleds via pcie link having two dpus per sled. +Smartswitch is connected to dpus via pcie links. ## Scope @@ -387,8 +387,8 @@ MB_TMP421_Local 26.25 135.0 -5.0 140.0 -10 ### 1.4 Check DPU Console #### Steps - * Use command `/usr/bin/picocom -b 115200 /dev/ttyS` to access console for given dpu - * Get starting offset of serial port for dpus using the command `cat /proc/tty/driver/serial` + * Use serial port utility to access console for given dpu. + * Get the mapping of serial port to DPU number from platform.json file. * Get the number of dpu modules from PMON APIs - get_num_modules(). Test is to check for console access for all DPUs. #### Verify in From 6ef18734acb0814dc6c8802a73dba5ad46b2fa84 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 25 Jun 2024 17:18:55 -0700 Subject: [PATCH 12/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index cf6eeb31c02..8f39c27c28a 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -551,12 +551,6 @@ Chassis Route Processors RP0 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW -Sled Cards - SLED0 8K-DPU400-2A 0.10 FLM2750036M Cisco 800 2xDPU Sled AMD Elba - SLED1 8K-DPU400-2A 0.10 FLM2750037E Cisco 800 2xDPU Sled AMD Elba - SLED2 8K-DPU400-2A 0.10 FLM27500389 Cisco 800 2xDPU Sled AMD Elba - SLED3 8K-DPU400-2A 0.10 FLM2750038M Cisco 800 2xDPU Sled AMD Elba - Dpu Modules DPU0 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750036M Pensando DSC DPU1 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037M Pensando DSC @@ -630,13 +624,9 @@ root@sonic:/home/cisco# show platform pcieinfo -c ### 1.8 Check the NTP date and timezone between DPU and NPU #### Steps - * In Switch, under the file /etc/ntp.conf configure it to use the ntp server and restart ntp.service to configure - * In DPU, similarly under the ntp configuration use the switches ip as ntp server and restart ntp service to configure - * Use command `date` to start the NTP server on Swith + * Use command `date` to get date and time zone on Swith * Use command `ssh admin@169.254.x.x` to enter into required dpu. - * Use command `date` to start the NTP server on DPU - * Use command `date` to get date and time zone on host. - * Use command `date` again on dpu to show date and time zone of dpu. + * Use command `date` to get date and time zone on DPU #### Verify in * Switch and dpu From ef5ae3646b0724bc77048327b371ab8fcb75a6a6 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 25 Jun 2024 17:23:03 -0700 Subject: [PATCH 13/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 8f39c27c28a..24357405dee 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -115,8 +115,7 @@ FPDs ``` #### Pass/Fail Criteria * Verify number of dpus from api and number of dpus shown in the cli output. - * Verify powered off dpus should display it as powered off. - * Verify all the serial numbers of the dpus that are powered on are unique. + * Verify all the serial numbers of the dpus that are unique. ### 1.2 Check platform voltage From 6202ea7b2f55adbee3d4d7c1d23aa1fbdf4cf1a3 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Mon, 8 Jul 2024 14:27:32 -0700 Subject: [PATCH 14/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 267 ++++++++----------------- 1 file changed, 78 insertions(+), 189 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 24357405dee..c30b7dca706 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -8,14 +8,13 @@ - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) - [1.4 Check dpu console](#14-check-dpu-console) - - [1.5 Check midplane ip address between NPU and DPU](#15-check-midplane-ip-address-between-NPU-and-DPU) - - [1.6 Check DPU shutdown and power up individually](#16-check-DPU-shutdown-and-power-up-individually) - - [1.7 Check removal of pcie link between npu and dpu](#17-check-removal-of-pcie-link-between-npu-and-dpu) - - [1.8 Check the NTP date and timezone between DPU and NPU](#18-check-the-ntp-date-and-timezone-between-dpu-and-npu) - - [1.9 Check the State of DPUs](#19-check-the-state-of-dpus) - - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) - - [1.11 Check reboot cause history](#111-check-reboot-cause-history) - - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) + - [1.5 Check DPU shutdown and power up individually](#15-check-DPU-shutdown-and-power-up-individually) + - [1.6 Check removal of pcie link between npu and dpu](#16-check-removal-of-pcie-link-between-npu-and-dpu) + - [1.7 Check the NTP date and timezone between DPU and NPU](#17-check-the-ntp-date-and-timezone-between-dpu-and-npu) + - [1.8 Check the State of DPUs](#18-check-the-state-of-dpus) + - [1.9 Check the Health of DPUs](#19-check-the-health-of-dpus) + - [1.10 Check reboot cause history](#110-check-reboot-cause-history) + - [1.11 Check the DPU state after OS reboot](#111-check-the-dpu-state-after-os-reboot) ## Introduction @@ -44,23 +43,22 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | | 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | | 1.4 | Check dpu console | To Verify console access for all DPUs | -| 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | -| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other dpus in same as well in other sleds are up | -| 1.7 | Check removal of pcie link between npu and dpu | To Verify the PCie hot plug functinality | -| 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | -| 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | -| 1.10 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | -| 1.11 | Check reboot cause history | To Verify reboot cause history cli | -| 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | +| 1.5 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other dpus in same as well in other sleds are up | +| 1.6 | Check removal of pcie link between npu and dpu | To Verify the PCie hot plug functinality | +| 1.7 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | +| 1.8 | Check the State of DPUs | To Verify DPU state details during online and offline | +| 1.9 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | +| 1.10 | Check reboot cause history | To Verify reboot cause history cli | +| 1.11 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | ## Test Cases -### 1.1 Check Platform Inventory +### 1.1 Check DPU Status #### Steps - * Use command `show platform inventory` to get inventory + * Use command `show chassis modules status` to get dpu status * Get the number of dpu modules from PMON APIs - get_num_modules() #### Verify in @@ -69,53 +67,21 @@ For every test cases, all DPUs need to be powered on unless specified in any of #### Sample Output ``` On Switch: - -root@sonic:/home/cisco# show platform inventory - Name Product ID Version Serial Number Description - -Chassis - CHASSIS 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -Route Processors - RP0 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -Sled Cards - SLED0 8K-DPU400-2A 0.10 FLM2750036M Cisco 800 2xDPU Sled AMD Elba - SLED1 8K-DPU400-2A 0.10 FLM2750037E Cisco 800 2xDPU Sled AMD Elba - SLED2 8K-DPU400-2A 0.10 FLM27500389 Cisco 800 2xDPU Sled AMD Elba - SLED3 8K-DPU400-2A 0.10 FLM2750038M Cisco 800 2xDPU Sled AMD Elba - -Dpu Modules - DPU0 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750036M Pensando DSC - DPU1 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037M Pensando DSC - DPU2 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038E Pensando DSC - DPU3 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039E Pensando DSC - DPU4 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500389 Pensando DSC - DPU5 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500390 Pensando DSC - DPU6 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038M Pensando DSC - DPU7 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039M Pensando DSC - -Power Supplies - psutray - PSU0 UCSC-PSU1-2300W A0 DTM274202UB UCS 230000W AC-DC High Line RSP02 Power Supply - PSU1 -- not present - -Cooling Devices - fantray0 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray1 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray2 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray3 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - -FPDs - RP0/info.0 0.8.0-287 \_SB_.PC00.RP07.PXSX.INFO - RP0/info.1 0.4.7-122 \_SB_.PC00.RP01.PXSX.INFO - RP0/info.2 0.2.1-247 \_SB_.PC00.RP10.PXSX.INFO - RP0/info.50.auto 10.2.0-30 \_SB_.PC00.RP07.PXSX.P2PF +root@sonic:/home/cisco# show chassis modules status + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ ------------- --------------- ------------- -------------- -------- + DPU0 N/A -1 Online up N/A + DPU1 N/A -1 Online up N/A + DPU2 N/A -1 Online up N/A + DPU3 N/A -1 Online up N/A + DPU4 N/A -1 Online up N/A + DPU5 N/A -1 Online up N/A + DPU6 N/A -1 Online up N/A + DPU7 N/A -1 Online up N/A ``` #### Pass/Fail Criteria * Verify number of dpus from api and number of dpus shown in the cli output. - * Verify all the serial numbers of the dpus that are unique. ### 1.2 Check platform voltage @@ -472,65 +438,16 @@ root@sonic:/home/cisco# #### Pass/Fail Criteria * Verify Login access is displayed. * cntrl+a and then cntrl+x to come out of the dpu console. - - -### 1.5 Check midplane ip address between NPU and DPU -#### Steps - * Use command `show ip interface` to get ip addresses - * Get the number of dpu modules from PMON APIs - get_num_modules() - * Currently all the interfaces gets static ip address - * Use the command `lspci -d 1dd8:1004` to list all the pcie buses for DPUs - * Ip adddress mapping to dpu - 169.254.x.2 (switch side interface) and 169.254.x.1 (DPU side interface). where x - bus number in decimal number. - * Work in progress - Dymanic assignment of ip address via dhcp - -#### Verify in - * Switch - -#### Sample Output -``` - On Switch: - - root@sonic:/home/cisco# lspci -d 1dd8:1004 -18:00.0 Ethernet controller: Pensando Systems DSC Management Controller -1c:00.0 Ethernet controller: Pensando Systems DSC Management Controller -20:00.0 Ethernet controller: Pensando Systems DSC Management Controller -24:00.0 Ethernet controller: Pensando Systems DSC Management Controller -8b:00.0 Ethernet controller: Pensando Systems DSC Management Controller -8f:00.0 Ethernet controller: Pensando Systems DSC Management Controller -93:00.0 Ethernet controller: Pensando Systems DSC Management Controller -97:00.0 Ethernet controller: Pensando Systems DSC Management Controller -root@sonic:/home/cisco# - - - root@sonic:/home/cisco# show ip interface - Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP - ------------ -------- ------------------- ------------ -------------- ------------- - eth0 172.25.42.65/24 up/up N/A N/A - eth1 169.254.24.2/24 up/up N/A N/A - eth2 169.254.28.2/24 up/up N/A N/A - eth3 169.254.32.2/24 up/up N/A N/A - eth4 169.254.36.2/24 up/up N/A N/A - eth5 169.254.139.2/24 up/up N/A N/A - eth6 169.254.143.2/24 up/up N/A N/A - eth7 169.254.147.2/24 up/up N/A N/A - eth8 169.254.151.2/24 up/up N/A N/A - lo 127.0.0.1/16 up/up N/A N/A - root@sonic:/home/cisco# -``` -#### Pass/Fail Criteria - * Verify output on switch to see all 169.254.x.x network interfaces are showing both Admin and Oper up. - * Verify number of interfaces should be equal to number of dpu modules. - - -### 1.6 Check DPU shutdown and power up individually + +### 1.5 Check DPU shutdown and power up individually #### Steps * Get the number of dpu modules from PMON APIs - get_num_modules() * Use command `config chassis modules shutdown ` to shut down individual dpu - * Use command `show platform inventory` to show dpu status + * Use command `show chassis modules status` to show dpu status * Use command `config chassis modules startup ` to power up individual dpu - * Use command `show platform inventory` to show dpu status + * Use command `show chassis modules status` to show dpu status #### Verify in * Switch @@ -541,51 +458,39 @@ On Switch: root@sonic:/home/cisco# config chassis modules shutdown DPU4 root@sonic:/home/cisco# -root@sonic:/home/cisco# show platform inventory - Name Product ID Version Serial Number Description - -Chassis - CHASSIS 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -Route Processors - RP0 8102-28FH-DPU-O 0.10 FLM274802F3 Cisco 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -Dpu Modules - DPU0 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750036M Pensando DSC - DPU1 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037M Pensando DSC - DPU2 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750037E Pensando DSC - DPU3 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038E Pensando DSC - DPU4 DSS-MTFUJI Powered off - DPU5 DSS-MTFUJI 6.1.0-11-2-arm64 FLM27500390 Pensando DSC - DPU6 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750038M Pensando DSC - DPU7 DSS-MTFUJI 6.1.0-11-2-arm64 FLM2750039M Pensando DSC - -Power Supplies - psutray - PSU0 UCSC-PSU1-2300W A0 DTM274202UB UCS 230000W AC-DC High Line RSP02 Power Supply - PSU1 -- not present - -Cooling Devices - fantray0 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray1 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray2 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - fantray3 FAN-2RU-PI-V3 N/A N/A Cisco 8000 Series 2RU Fan with Port-side Air Intake Ver 3 - -FPDs - RP0/info.0 0.8.0-287 \_SB_.PC00.RP07.PXSX.INFO - RP0/info.1 0.4.7-122 \_SB_.PC00.RP01.PXSX.INFO - RP0/info.2 0.2.1-247 \_SB_.PC00.RP10.PXSX.INFO - RP0/info.50.auto 10.2.0-30 \_SB_.PC00.RP07.PXSX.P2PF +root@sonic:/home/cisco# show chassis modules status + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ ------------- --------------- ------------- -------------- -------- + DPU0 N/A -1 Online up N/A + DPU1 N/A -1 Online up N/A + DPU2 N/A -1 Online up N/A + DPU3 N/A -1 Online up N/A + DPU4 N/A -1 Offline down N/A + DPU5 N/A -1 Online up N/A + DPU6 N/A -1 Online up N/A + DPU7 N/A -1 Online up N/A root@sonic:/home/cisco# config chassis modules startup DPU4 +root@sonic:/home/cisco# show chassis modules status + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ ------------- --------------- ------------- -------------- -------- + DPU0 N/A -1 Online up N/A + DPU1 N/A -1 Online up N/A + DPU2 N/A -1 Online up N/A + DPU3 N/A -1 Online up N/A + DPU4 N/A -1 Online up N/A + DPU5 N/A -1 Online up N/A + DPU6 N/A -1 Online up N/A + DPU7 N/A -1 Online up N/A + ``` #### Pass/Fail Criteria - * Verify dpu powered off in platform inventory after dpu shut down - * Verify dpu is shown in platform inventory after dpu powered on + * Verify dpu offline in show chassis modules status after dpu shut down + * Verify dpu is shown in show chassis modules status after dpu powered on -### 1.7 Check removal of pcie link between npu and dpu +### 1.6 Check removal of pcie link between npu and dpu #### Steps * Use command `pcieutil generate` to generate pcie yaml @@ -620,7 +525,7 @@ root@sonic:/home/cisco# show platform pcieinfo -c * Verify pcieinfo test pass for all after bringing back up the link -### 1.8 Check the NTP date and timezone between DPU and NPU +### 1.7 Check the NTP date and timezone between DPU and NPU #### Steps * Use command `date` to get date and time zone on Swith @@ -652,7 +557,8 @@ root@sonic:/home/cisco# * Verify the syslogs on both switch and dpu to be same * Verify by changing time intentionally in dpu and restart the dpu. Verify again for time sync -### 1.9 Check the State of DPUs + +### 1.8 Check the State of DPUs #### Steps * Use command `show system-health DPU all` to get DPU health status. @@ -704,7 +610,7 @@ DPU0 1 Partial Online dpu_midplane_link_state up * Verify powering down dpu and check for status and powering up again to check the status to show online. -### 1.10 Check the Health of DPUs +### 1.9 Check the Health of DPUs #### Steps * Use command `show system-health detail ` to check the health of the dpu. @@ -741,8 +647,9 @@ rsyslog OK Process * Verify System Status - Green, Service Status - OK, Hardware Status - OK * Stop any docker in DPU and check for Service Status - Not OK and that docker as Not running * Start the docker again and Verify System Status - Green, Service Status - OK, Hardware Status - OK - -### 1.11 Check reboot cause history + + +### 1.10 Check reboot cause history #### Steps * The "show reboot-cause" CLI on the switch shows the most recent rebooted device, time and the cause. @@ -795,7 +702,7 @@ DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2 * Verify all the reboot causes - Watchdog, reboot command, Host Reset -### 1.12 Check the DPU state after OS reboot +### 1.11 Check the DPU state after OS reboot #### Steps @@ -814,7 +721,7 @@ Existing Test case: Reboot Test Case for DPU: * After the exisiting case, Power on all the dpus using `config chassis modules startup ` * Wait for DPUs to be up - * Use command `show platform inventory` to get inventory + * Use command `show chassis modules status` to get dpu status * Get the number of dpu modules from PMON APIs - get_num_modules() #### Verify in @@ -829,37 +736,19 @@ root@sonic:/home/cisco# root@sonic:/home/cisco# config chassis modules startup root@sonic:/home/cisco# root@sonic:/home/cisco# -root@sonic:~#show platform inventory - - Name Product ID Version Serial Number Description - -Chassis - CHASSIS 28FH-DPU-O 0.10 FLM274802ER 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -Route Processors - RP0 28FH-DPU-O 0.10 FLM274802ER 28x400G QSFPDD DPU-Enabled 2RU Smart Switch,Open SW - -DPU Modules - DPU0 8K-DPU400-2A 0.10 FLM2750036X 400G DPU - DPU1 8K-DPU400-2A 0.10 FLM2750036S 400G DPU - DPU2 8K-DPU400-2A 0.10 FLM274801EY 400G DPU - DPU3 8K-DPU400-2A 0.10 FLM27500371 400G DPU - -Power Supplies - psutray - PSU0 PSUXKW-ACPI 0.0 POG2427K01K AC Power Module with Port-side Air Intake - PSU1 PSUXKW-ACPI 0.0 POG2427K00Y AC Power Module with Port-side Air Intake - -Cooling Devices - fantray0 FAN-2RU-PI-V3 N/A N/A 8000 Series 2RU Fan - fantray1 FAN-2RU-PI-V3 N/A N/A 8000 Series 2RU Fan - -FPDs - RP0/info.0 0.5.6-253 - +root@sonic:/home/cisco# show chassis modules status + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ ------------- --------------- ------------- -------------- -------- + DPU0 N/A -1 Online up N/A + DPU1 N/A -1 Online up N/A + DPU2 N/A -1 Online up N/A + DPU3 N/A -1 Online up N/A + DPU4 N/A -1 Online up N/A + DPU5 N/A -1 Online up N/A + DPU6 N/A -1 Online up N/A + DPU7 N/A -1 Online up N/A ``` -#### Pass/Fail Criteria +#### Pass/Fail Criteria * Verify number of dpus from api and number of dpus shown in the cli output. - * Verify all the serial numbers of the dpus that are powered on are unique. From d02e8d22b64420c656f13a8d3cb2355a571bb155 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 10 Jul 2024 10:06:10 -0700 Subject: [PATCH 15/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 63 ++++++++++++++++++++------ 1 file changed, 48 insertions(+), 15 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index c30b7dca706..5fb463b407b 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -8,13 +8,14 @@ - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) - [1.4 Check dpu console](#14-check-dpu-console) - - [1.5 Check DPU shutdown and power up individually](#15-check-DPU-shutdown-and-power-up-individually) - - [1.6 Check removal of pcie link between npu and dpu](#16-check-removal-of-pcie-link-between-npu-and-dpu) - - [1.7 Check the NTP date and timezone between DPU and NPU](#17-check-the-ntp-date-and-timezone-between-dpu-and-npu) - - [1.8 Check the State of DPUs](#18-check-the-state-of-dpus) - - [1.9 Check the Health of DPUs](#19-check-the-health-of-dpus) - - [1.10 Check reboot cause history](#110-check-reboot-cause-history) - - [1.11 Check the DPU state after OS reboot](#111-check-the-dpu-state-after-os-reboot) + - [1.5 Check midplane ip address between NPU and DPU](#15-check-midplane-ip-address-between-npu-and-dpu) + - [1.6 Check DPU shutdown and power up individually](#16-check-DPU-shutdown-and-power-up-individually) + - [1.7 Check removal of pcie link between npu and dpu](#17-check-removal-of-pcie-link-between-npu-and-dpu) + - [1.8 Check the NTP date and timezone between DPU and NPU](#18-check-the-ntp-date-and-timezone-between-dpu-and-npu) + - [1.9 Check the State of DPUs](#19-check-the-state-of-dpus) + - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) + - [1.11 Check reboot cause history](#111-check-reboot-cause-history) + - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) ## Introduction @@ -439,8 +440,40 @@ root@sonic:/home/cisco# * Verify Login access is displayed. * cntrl+a and then cntrl+x to come out of the dpu console. - -### 1.5 Check DPU shutdown and power up individually + +### 1.5 Check midplane ip address between NPU and DPU + +#### Steps + * Get the number of dpu modules from PMON APIs - get_num_modules() + * Get mid plane ip address for each dpu module from PMON APIs - get_midplane_ip() + +#### Verify in + * Switch + +#### Sample Output +``` + On Switch: + + root@sonic:/home/cisco# show ip interface + Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP + ------------ -------- ------------------- ------------ -------------- ------------- + eth0 172.25.42.65/24 up/up N/A N/A + eth1 169.254.24.2/24 up/up N/A N/A + eth2 169.254.28.2/24 up/up N/A N/A + eth3 169.254.32.2/24 up/up N/A N/A + eth4 169.254.36.2/24 up/up N/A N/A + eth5 169.254.139.2/24 up/up N/A N/A + eth6 169.254.143.2/24 up/up N/A N/A + eth7 169.254.147.2/24 up/up N/A N/A + eth8 169.254.151.2/24 up/up N/A N/A + lo 127.0.0.1/16 up/up N/A N/A + root@sonic:/home/cisco# +``` +#### Pass/Fail Criteria + * Verify Ping works to all the mid plane ip listed in the api output + + +### 1.6 Check DPU shutdown and power up individually #### Steps * Get the number of dpu modules from PMON APIs - get_num_modules() @@ -490,7 +523,7 @@ root@sonic:/home/cisco# show chassis modules status * Verify dpu is shown in show chassis modules status after dpu powered on -### 1.6 Check removal of pcie link between npu and dpu +### 1.7 Check removal of pcie link between npu and dpu #### Steps * Use command `pcieutil generate` to generate pcie yaml @@ -525,7 +558,7 @@ root@sonic:/home/cisco# show platform pcieinfo -c * Verify pcieinfo test pass for all after bringing back up the link -### 1.7 Check the NTP date and timezone between DPU and NPU +### 1.8 Check the NTP date and timezone between DPU and NPU #### Steps * Use command `date` to get date and time zone on Swith @@ -558,7 +591,7 @@ root@sonic:/home/cisco# * Verify by changing time intentionally in dpu and restart the dpu. Verify again for time sync -### 1.8 Check the State of DPUs +### 1.9 Check the State of DPUs #### Steps * Use command `show system-health DPU all` to get DPU health status. @@ -610,7 +643,7 @@ DPU0 1 Partial Online dpu_midplane_link_state up * Verify powering down dpu and check for status and powering up again to check the status to show online. -### 1.9 Check the Health of DPUs +### 1.10 Check the Health of DPUs #### Steps * Use command `show system-health detail ` to check the health of the dpu. @@ -649,7 +682,7 @@ rsyslog OK Process * Start the docker again and Verify System Status - Green, Service Status - OK, Hardware Status - OK -### 1.10 Check reboot cause history +### 1.11 Check reboot cause history #### Steps * The "show reboot-cause" CLI on the switch shows the most recent rebooted device, time and the cause. @@ -702,7 +735,7 @@ DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2 * Verify all the reboot causes - Watchdog, reboot command, Host Reset -### 1.11 Check the DPU state after OS reboot +### 1.12 Check the DPU state after OS reboot #### Steps From 687f9697cb2dd63deac35933d017aac3503f671e Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Fri, 26 Jul 2024 08:41:16 -0700 Subject: [PATCH 16/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 78 +++++++++++++------------- 1 file changed, 40 insertions(+), 38 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 5fb463b407b..21c7d38b203 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -7,10 +7,10 @@ - [1.1 Check platform inventory](#11-check-platform-inventory) - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) - - [1.4 Check dpu console](#14-check-dpu-console) + - [1.4 Check DPU console](#14-check-DPU-console) - [1.5 Check midplane ip address between NPU and DPU](#15-check-midplane-ip-address-between-npu-and-dpu) - [1.6 Check DPU shutdown and power up individually](#16-check-DPU-shutdown-and-power-up-individually) - - [1.7 Check removal of pcie link between npu and dpu](#17-check-removal-of-pcie-link-between-npu-and-dpu) + - [1.7 Check removal of pcie link between NPU and DPU](#17-check-removal-of-pcie-link-between-npu-and-dpu) - [1.8 Check the NTP date and timezone between DPU and NPU](#18-check-the-ntp-date-and-timezone-between-dpu-and-npu) - [1.9 Check the State of DPUs](#19-check-the-state-of-dpus) - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) @@ -20,12 +20,12 @@ ## Introduction The purpose is to test the functionality of Smartswitch. -Smartswitch is connected to dpus via pcie links. +Smartswitch is connected to DPUs via pcie links. ## Scope -The test is targeting a running SONIC on Switch and SONIC-DASH system on each dpus. -Purpose of the test is to verify smartswich platform related functionalities/features for each dpus. +The test is targeting a running SONIC on Switch and SONIC-DASH system on each DPUs. +Purpose of the test is to verify smartswich platform related functionalities/features for each DPUs. For every test cases, all DPUs need to be powered on unless specified in any of the case. ## Definitions and Abbreviations @@ -34,18 +34,20 @@ For every test cases, all DPUs need to be powered on unless specified in any of | ---------- | ---------------------------------------- | | DPU | Data Processing Unit | | NPU | Network Processing Unit | +| NTP | Network Time Protocol | + ## Objectives of Test Cases | | **Test Case** | **Intention** | | ---------- | ---------- | ---------------------------------------- | -| 1.1 | Check platform inventory | To verify the DPU inventories shown in the cli | +| 1.1 | Check DPU Status | To verify the DPU Status shown in the cli | | 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | | 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | -| 1.4 | Check dpu console | To Verify console access for all DPUs | -| 1.5 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other dpus in same as well in other sleds are up | -| 1.6 | Check removal of pcie link between npu and dpu | To Verify the PCie hot plug functinality | +| 1.4 | Check DPU console | To Verify console access for all DPUs | +| 1.5 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | +| 1.6 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | | 1.7 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | | 1.8 | Check the State of DPUs | To Verify DPU state details during online and offline | | 1.9 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | @@ -59,8 +61,8 @@ For every test cases, all DPUs need to be powered on unless specified in any of ### 1.1 Check DPU Status #### Steps - * Use command `show chassis modules status` to get dpu status - * Get the number of dpu modules from PMON APIs - get_num_modules() + * Use command `show chassis modules status` to get DPU status + * Get the number of DPU modules from PMON APIs - get_num_modules() #### Verify in * Switch @@ -82,7 +84,7 @@ root@sonic:/home/cisco# show chassis modules status ``` #### Pass/Fail Criteria - * Verify number of dpus from api and number of dpus shown in the cli output. + * Verify number of DPUs from api and number of DPUs shown in the cli output. ### 1.2 Check platform voltage @@ -353,9 +355,9 @@ MB_TMP421_Local 26.25 135.0 -5.0 140.0 -10 ### 1.4 Check DPU Console #### Steps - * Use serial port utility to access console for given dpu. + * Use serial port utility to access console for given DPU. * Get the mapping of serial port to DPU number from platform.json file. - * Get the number of dpu modules from PMON APIs - get_num_modules(). Test is to check for console access for all DPUs. + * Get the number of DPU modules from PMON APIs - get_num_modules(). Test is to check for console access for all DPUs. #### Verify in * Switch @@ -438,14 +440,14 @@ root@sonic:/home/cisco# ``` #### Pass/Fail Criteria * Verify Login access is displayed. - * cntrl+a and then cntrl+x to come out of the dpu console. + * cntrl+a and then cntrl+x to come out of the DPU console. ### 1.5 Check midplane ip address between NPU and DPU #### Steps - * Get the number of dpu modules from PMON APIs - get_num_modules() - * Get mid plane ip address for each dpu module from PMON APIs - get_midplane_ip() + * Get the number of DPU modules from PMON APIs - get_num_modules() + * Get mid plane ip address for each DPU module from PMON APIs - get_midplane_ip() #### Verify in * Switch @@ -476,11 +478,11 @@ root@sonic:/home/cisco# ### 1.6 Check DPU shutdown and power up individually #### Steps - * Get the number of dpu modules from PMON APIs - get_num_modules() - * Use command `config chassis modules shutdown ` to shut down individual dpu - * Use command `show chassis modules status` to show dpu status - * Use command `config chassis modules startup ` to power up individual dpu - * Use command `show chassis modules status` to show dpu status + * Get the number of DPU modules from PMON APIs - get_num_modules() + * Use command `config chassis modules shutdown ` to shut down individual DPU + * Use command `show chassis modules status` to show DPU status + * Use command `config chassis modules startup ` to power up individual DPU + * Use command `show chassis modules status` to show DPU status #### Verify in * Switch @@ -519,16 +521,16 @@ root@sonic:/home/cisco# show chassis modules status ``` #### Pass/Fail Criteria - * Verify dpu offline in show chassis modules status after dpu shut down - * Verify dpu is shown in show chassis modules status after dpu powered on + * Verify DPU offline in show chassis modules status after DPU shut down + * Verify DPU is shown in show chassis modules status after DPU powered on -### 1.7 Check removal of pcie link between npu and dpu +### 1.7 Check removal of pcie link between NPU and DPU #### Steps * Use command `pcieutil generate` to generate pcie yaml * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing - * Use command `echo 1 > /sys/bus/pci/devices/BUS_ID/remove` to remove pcie link between npu and one dpu + * Use command `echo 1 > /sys/bus/pci/devices/BUS_ID/remove` to remove pcie link between NPU and one DPU * Use `show platform pcieinfo -c` to run the pcie info test to check pcie link has been removed * Use command `echo 1 > /sys/bus/pci/rescan` to rescan pcie links * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing @@ -539,7 +541,7 @@ root@sonic:/home/cisco# show chassis modules status #### Sample Output ``` -On Switch: Showing example of one dpu pcie link +On Switch: Showing example of one DPU pcie link root@sonic:/home/cisco# pcieutil generate Are you sure to overwrite config file pcie.yaml with current pcie device info? [y/N]: y @@ -566,7 +568,7 @@ root@sonic:/home/cisco# show platform pcieinfo -c * Use command `date` to get date and time zone on DPU #### Verify in - * Switch and dpu + * Switch and DPU #### Sample Output ``` @@ -587,8 +589,8 @@ root@sonic:/home/cisco# ``` #### Pass/Fail Criteria * Verify both the date and time zone are same - * Verify the syslogs on both switch and dpu to be same - * Verify by changing time intentionally in dpu and restart the dpu. Verify again for time sync + * Verify the syslogs on both switch and DPU to be same + * Verify by changing time intentionally in DPU and restart the DPU. Verify again for time sync ### 1.9 Check the State of DPUs @@ -597,7 +599,7 @@ root@sonic:/home/cisco# * Use command `show system-health DPU all` to get DPU health status. #### Verify in - * Switch and dpu + * Switch and DPU #### Sample Output ``` @@ -640,13 +642,13 @@ DPU0 1 Partial Online dpu_midplane_link_state up * Online : All states are up * Offline: dpu_midplane_link_state or dpu_booted_state is down * Partial Online: dpu_midplane_link_state is up and dpu_booted_state is up and dpu_control_plane_state is up and dpu_data_plane_state is down - * Verify powering down dpu and check for status and powering up again to check the status to show online. + * Verify powering down DPU and check for status and powering up again to check the status to show online. ### 1.10 Check the Health of DPUs #### Steps - * Use command `show system-health detail ` to check the health of the dpu. + * Use command `show system-health detail ` to check the health of the DPU. #### Verify in * Switch @@ -690,7 +692,7 @@ rsyslog OK Process * The "show reboot-cause history module-name" CLI on the switch shows the history of the specified module * Use `config chassis modules shutdown ` * Use `config chassis modules startup ` - * Wait for 5 minutes for Pmon to update the dpu states + * Wait for 5 minutes for Pmon to update the DPU states * Use `show reboot-cause ` to check the latest reboot is displayed #### Verify in @@ -752,10 +754,10 @@ Existing Test case: * Reboot is successful Reboot Test Case for DPU: - * After the exisiting case, Power on all the dpus using `config chassis modules startup ` + * After the exisiting case, Power on all the DPUs using `config chassis modules startup ` * Wait for DPUs to be up - * Use command `show chassis modules status` to get dpu status - * Get the number of dpu modules from PMON APIs - get_num_modules() + * Use command `show chassis modules status` to get DPU status + * Get the number of DPU modules from PMON APIs - get_num_modules() #### Verify in * Switch @@ -783,5 +785,5 @@ root@sonic:/home/cisco# show chassis modules status ``` #### Pass/Fail Criteria - * Verify number of dpus from api and number of dpus shown in the cli output. + * Verify number of DPUs from api and number of DPUs shown in the cli output. From 43d2fed89b4b1de880543912455ca6387cbc2c0f Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Fri, 26 Jul 2024 08:42:27 -0700 Subject: [PATCH 17/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 21c7d38b203..50c9aeceeef 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -4,7 +4,7 @@ - [Scope](#scope) - [Definitions and Abbreviations](#definitions-and-abbreviations) - [Test Cases](#test-cases) - - [1.1 Check platform inventory](#11-check-platform-inventory) + - [1.1 Check DPU Status](#11-check-dpu-status) - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) - [1.4 Check DPU console](#14-check-DPU-console) From 53fc59ca618c1092c52bdfb2869710cacb380d05 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 30 Jul 2024 10:49:49 -0700 Subject: [PATCH 18/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 50c9aeceeef..cbf57b4cb3e 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -46,13 +46,14 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | | 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | | 1.4 | Check DPU console | To Verify console access for all DPUs | -| 1.5 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | -| 1.6 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | -| 1.7 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | -| 1.8 | Check the State of DPUs | To Verify DPU state details during online and offline | -| 1.9 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | -| 1.10 | Check reboot cause history | To Verify reboot cause history cli | -| 1.11 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | +| 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | +| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | +| 1.7 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | +| 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | +| 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | +| 1.10 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | +| 1.11 | Check reboot cause history | To Verify reboot cause history cli | +| 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | ## Test Cases @@ -563,7 +564,7 @@ root@sonic:/home/cisco# show platform pcieinfo -c ### 1.8 Check the NTP date and timezone between DPU and NPU #### Steps - * Use command `date` to get date and time zone on Swith + * Use command `date` to get date and time zone on Switch * Use command `ssh admin@169.254.x.x` to enter into required dpu. * Use command `date` to get date and time zone on DPU From 9b53964a4441b44b4ebb53b94ff43975d36c895b Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 31 Jul 2024 14:16:28 -0700 Subject: [PATCH 19/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 191 ++++++++++++++++++++++++- 1 file changed, 184 insertions(+), 7 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index cbf57b4cb3e..bdb1046f713 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -3,7 +3,7 @@ - [Introduction](#introduction) - [Scope](#scope) - [Definitions and Abbreviations](#definitions-and-abbreviations) -- [Test Cases](#test-cases) +- [Test Cases - CLI](#test-cases-cli) - [1.1 Check DPU Status](#11-check-dpu-status) - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) @@ -16,6 +16,12 @@ - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) - [1.11 Check reboot cause history](#111-check-reboot-cause-history) - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) +- [Test Cases - API](#test-cases-api) + - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-chassis-apis) + - [1.2 Check modified ChassisClass APIs](#12-check-modified-chassis-apis) + - [1.3 Check DpuModule APIs for SmartSwitch](#13-check-dpu-module-apis) + - [1.4 Check modified ModuleClass APIs](#14-check-modified-module-apis) + - [1.5 Check SwitchModule APIs for SmartSwitch](#15-check-switch-module-apis) ## Introduction @@ -25,7 +31,7 @@ Smartswitch is connected to DPUs via pcie links. ## Scope The test is targeting a running SONIC on Switch and SONIC-DASH system on each DPUs. -Purpose of the test is to verify smartswich platform related functionalities/features for each DPUs. +Purpose of the test is to verify smartswich platform related functionalities/features for each DPUs and PMON APIs. For every test cases, all DPUs need to be powered on unless specified in any of the case. ## Definitions and Abbreviations @@ -35,10 +41,10 @@ For every test cases, all DPUs need to be powered on unless specified in any of | DPU | Data Processing Unit | | NPU | Network Processing Unit | | NTP | Network Time Protocol | +| SWITCH | Refers to NPU and the anything other than DPUs | +| SS | SmartSwitch | - - -## Objectives of Test Cases +## Objectives of Test Cases - CLI | | **Test Case** | **Intention** | | ---------- | ---------- | ---------------------------------------- | @@ -55,8 +61,18 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.11 | Check reboot cause history | To Verify reboot cause history cli | | 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | +## Objectives of Test Cases - API + +| | **Test Case** | **Intention** | **Comments** | +| ---------- | ---------- | ---------------------------------------- | ---------- | +| 1.1 | Check SmartSwitch specific ChassisClass APIs | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | +| 1.2 | Check modified ChassisClass APIs for SmartSwitch | To verify the existing ChassisClass APIs that undergo minor changes with the addition of SmartSwitch| | +| 1.3 | Check DpuModule APIs for SmartSwitch | To verify the newly implemented DpuModule APIs for SmartSwitch| | +| 1.4 | Check modified ModuleClass APIs for SmartSwitch | To verify the existing ModuleClass APIs that undergo minor changes with the addition of SmartSwitch| +| 1.5 | Check SwitchModule APIs for SmartSwitch | To verify the newly implemented SwitchModule APIs for SmartSwitch | + -## Test Cases +## Test Cases - CLI ### 1.1 Check DPU Status @@ -787,4 +803,165 @@ root@sonic:/home/cisco# show chassis modules status #### Pass/Fail Criteria * Verify number of DPUs from api and number of DPUs shown in the cli output. - + + +## Test Cases - API + +### 1.1 Check SmartSwitch specific ChassisClass APIs + +#### Steps + * Execute the following APIs on SmartSwitch + * get_dpu_id(self, name): + * Provide name (Example: DPU0 - Get it from platform.json file) + * This API should return an integer from 1-8 (check it against platform.json) + * is_smartswitch(self): + * This API should return True + * get_module_dpu_data_port(self, index): + * It will return a dict as shown below. + + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + get_dpu_id(self, DPU3) + Output: 4 + is_smartswitch(self): + Output: True + get_module_dpu_data_port(self, DPU0): + Output: { + "interface": {"Ethernet224": "Ethernet0"} + } +``` +#### Pass/Fail Criteria + * The test result is a pass if the return value matches the expected value as shown in the "steps" and "Sample Output". + + +### 1.2 Check modified ChassisClass APIs for SmartSwitch + +#### Steps + * is_modular_chassis(self): + * Should return False + * get_num_modules(self): + * Should return number of DPUs + * get_module(self, index): + * Make sure for each index this API returns an object and has some content and not None + * Check that the object's class is inherited from the ModuleBase class + * get_all_modules(self): + * This should return a list of items + * get_module_index(self, module_name): + * Given the module name say “DPU0” should return the index of it “1” + + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + is_modular_chassis(self): + Output: False + get_num_modules(self): + Output: number of DPUs + get_module(self, DPU0): + Output: DPU0 object + get_all_modules(self): + Output: list of objects (one per DPU + 1 switch object) + get_module_index(self, DPU0): + Output: could be any value from 0 to modules count -1 +``` +#### Pass/Fail Criteria + * The test result is a pass if the return value matches the expected value as shown in the "steps" and "Sample Output" + + +### 1.3 Check DpuModule APIs for SmartSwitch + +#### Steps + * get_dpu_id(self): + * Should return ID of the DpuModule Ex: 1 on DPU0 +* get_reboot_cause(self): + * Reboot the module and then execute the "show reboot-cause ..." CLIs + * Verify the output string shows the correct Time and Cause + * Limit the testing to software reboot + * get_state_info(self): + * This should return an object + * Stop one of the DPU containers on this DPU + * Execute the CLI and check the dpu-control-plane value should be down + * Check the complete list of containers without which the control plane can be up. + * This test case can be extended to verify the DPU transition through all states. + * get_health_info(self): + * This should return an object + * Stop one of the DPU containers on this DPU + * Execute the CLI and check if the health shows the stopped container + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + get_dpu_id(self): + Output: When on module DPUx should return x+1 + get_reboot_cause(self): + Output: {"Device": "DPU0", "Name": 2024_05_31_00_33_30, "Cause": "reboot", "Time": "Fri 31 May 2024 12:29:34 AM UTC", "User": "NA", "Comment": "NA"} + get_state_info(self): + Output: dpu state info object + get_health_info(self): + Output: dpu health info object +``` +#### Pass/Fail Criteria + * Verify that all the APIs mentioned return the expected output + + ### 1.4 Check modified ModuleClass APIs + +#### Steps + * get_base_mac(self): + * Should return the base mac address of this DPU + * Read all DPUs mac and verify if they are unique and not None + * get_system_eeprom_info(self): + * Verify the returned dictionary key:value + * get_name(self): + * Verify if this API returns “DPUx" on each of them + * get_description(self): + * Should return a string + * get_type(self): + * Should return “DPU” which is “MODULE_TYPE_DPU” + * get_oper_status(self): + * Should return the operational status of the DPU + * Stop one ore more containers + * Execute the CLI and see if it is down + * Power down the dpu and check if the operational status is down. + * reboot(self, reboot_type): + * Issue this CLI with input “ + * verify if the module reboots + * The reboot type should be updated based on SmartSwitch reboot HLD sonic-net/SONiC#1699 + * get_midplane_ip(self): + * should return the midplane IP + +#### Verify in + * Switch + +#### Sample Output +``` +On Switch: + get_base_mac(self): + Output: BA:CE:AD:D0:D0:01 + get_system_eeprom_info(self): + Output: eeprom info object + get_name(self): + Output: DPU2 + get_description(self): + Output "Pensando DSC" + get_type(self): + Output: DPU + get_oper_status(self): + Output: Online + reboot(self, reboot_type): + Result: the DPU should reboot + get_midplane_ip(self): + Output: 169.254.200.1 +``` +#### Pass/Fail Criteria + * The test result is a pass if the return value matches the expected value as shown in the "steps" and "Sample Output". From f45779595b90e5b823a55ebd9b5479eff180d8d7 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 31 Jul 2024 14:20:04 -0700 Subject: [PATCH 20/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 33 +++++++++++++------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index bdb1046f713..ce36e08d35f 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -3,6 +3,7 @@ - [Introduction](#introduction) - [Scope](#scope) - [Definitions and Abbreviations](#definitions-and-abbreviations) +- [Objectives of Test Cases - CLI](#objectives-of-test-cases-cli) - [Test Cases - CLI](#test-cases-cli) - [1.1 Check DPU Status](#11-check-dpu-status) - [1.2 Check platform voltage](#12-check-platform-voltage) @@ -16,12 +17,13 @@ - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) - [1.11 Check reboot cause history](#111-check-reboot-cause-history) - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) +- [Objectives of Test Cases - API](#objectives-of-test-cases-api) - [Test Cases - API](#test-cases-api) - - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-chassis-apis) - - [1.2 Check modified ChassisClass APIs](#12-check-modified-chassis-apis) - - [1.3 Check DpuModule APIs for SmartSwitch](#13-check-dpu-module-apis) - - [1.4 Check modified ModuleClass APIs](#14-check-modified-module-apis) - - [1.5 Check SwitchModule APIs for SmartSwitch](#15-check-switch-module-apis) + - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-chassisclass-apis) + - [1.2 Check modified ChassisClass APIs](#12-check-modified-chassisclass-apis) + - [1.3 Check DpuModule APIs for SmartSwitch](#13-check-dpumodule-apis-for-smartswitch) + - [1.4 Check modified ModuleClass APIs](#14-check-modified-moduleclass-apis) + - [1.5 Check SwitchModule APIs for SmartSwitch](#15-check-switchmodule-apis-for-smartswitch) ## Introduction @@ -61,20 +63,9 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.11 | Check reboot cause history | To Verify reboot cause history cli | | 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | -## Objectives of Test Cases - API - -| | **Test Case** | **Intention** | **Comments** | -| ---------- | ---------- | ---------------------------------------- | ---------- | -| 1.1 | Check SmartSwitch specific ChassisClass APIs | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | -| 1.2 | Check modified ChassisClass APIs for SmartSwitch | To verify the existing ChassisClass APIs that undergo minor changes with the addition of SmartSwitch| | -| 1.3 | Check DpuModule APIs for SmartSwitch | To verify the newly implemented DpuModule APIs for SmartSwitch| | -| 1.4 | Check modified ModuleClass APIs for SmartSwitch | To verify the existing ModuleClass APIs that undergo minor changes with the addition of SmartSwitch| -| 1.5 | Check SwitchModule APIs for SmartSwitch | To verify the newly implemented SwitchModule APIs for SmartSwitch | - ## Test Cases - CLI - ### 1.1 Check DPU Status #### Steps @@ -805,6 +796,16 @@ root@sonic:/home/cisco# show chassis modules status * Verify number of DPUs from api and number of DPUs shown in the cli output. +## Objectives of Test Cases - API + +| | **Test Case** | **Intention** | **Comments** | +| ---------- | ---------- | ---------------------------------------- | ---------- | +| 1.1 | Check SmartSwitch specific ChassisClass APIs | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | +| 1.2 | Check modified ChassisClass APIs for SmartSwitch | To verify the existing ChassisClass APIs that undergo minor changes with the addition of SmartSwitch| | +| 1.3 | Check DpuModule APIs for SmartSwitch | To verify the newly implemented DpuModule APIs for SmartSwitch| | +| 1.4 | Check modified ModuleClass APIs for SmartSwitch | To verify the existing ModuleClass APIs that undergo minor changes with the addition of SmartSwitch| +| 1.5 | Check SwitchModule APIs for SmartSwitch | To verify the newly implemented SwitchModule APIs for SmartSwitch | + ## Test Cases - API ### 1.1 Check SmartSwitch specific ChassisClass APIs From f4b456ebf2fec0e92ff3fcef6fafbb50e8528916 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 31 Jul 2024 14:23:39 -0700 Subject: [PATCH 21/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index ce36e08d35f..c27b9c13f1b 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -19,11 +19,10 @@ - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) - [Objectives of Test Cases - API](#objectives-of-test-cases-api) - [Test Cases - API](#test-cases-api) - - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-chassisclass-apis) - - [1.2 Check modified ChassisClass APIs](#12-check-modified-chassisclass-apis) + - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-specific-chassisclass-apis) + - [1.2 Check modified ChassisClass APIs for smartswitch](#12-check-modified-chassisclass-apis-for-smartswitch) - [1.3 Check DpuModule APIs for SmartSwitch](#13-check-dpumodule-apis-for-smartswitch) - [1.4 Check modified ModuleClass APIs](#14-check-modified-moduleclass-apis) - - [1.5 Check SwitchModule APIs for SmartSwitch](#15-check-switchmodule-apis-for-smartswitch) ## Introduction @@ -800,15 +799,14 @@ root@sonic:/home/cisco# show chassis modules status | | **Test Case** | **Intention** | **Comments** | | ---------- | ---------- | ---------------------------------------- | ---------- | -| 1.1 | Check SmartSwitch specific ChassisClass APIs | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | +| 1.1 | | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | | 1.2 | Check modified ChassisClass APIs for SmartSwitch | To verify the existing ChassisClass APIs that undergo minor changes with the addition of SmartSwitch| | | 1.3 | Check DpuModule APIs for SmartSwitch | To verify the newly implemented DpuModule APIs for SmartSwitch| | | 1.4 | Check modified ModuleClass APIs for SmartSwitch | To verify the existing ModuleClass APIs that undergo minor changes with the addition of SmartSwitch| -| 1.5 | Check SwitchModule APIs for SmartSwitch | To verify the newly implemented SwitchModule APIs for SmartSwitch | ## Test Cases - API -### 1.1 Check SmartSwitch specific ChassisClass APIs +### 1.1 #### Steps * Execute the following APIs on SmartSwitch From 0e0554e9190fbaedb55013ccb59640e13aadabab Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 31 Jul 2024 14:27:19 -0700 Subject: [PATCH 22/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index c27b9c13f1b..a22332248bb 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -3,8 +3,8 @@ - [Introduction](#introduction) - [Scope](#scope) - [Definitions and Abbreviations](#definitions-and-abbreviations) -- [Objectives of Test Cases - CLI](#objectives-of-test-cases-cli) -- [Test Cases - CLI](#test-cases-cli) +- [Objectives of CLI Test Cases](#objectives-of-cli-test-cases) +- [CLI Test Cases](#cli-test-cases) - [1.1 Check DPU Status](#11-check-dpu-status) - [1.2 Check platform voltage](#12-check-platform-voltage) - [1.3 Check platform temperature](#13-check-platform-temperature) @@ -17,8 +17,8 @@ - [1.10 Check the Health of DPUs](#110-check-the-health-of-dpus) - [1.11 Check reboot cause history](#111-check-reboot-cause-history) - [1.12 Check the DPU state after OS reboot](#112-check-the-dpu-state-after-os-reboot) -- [Objectives of Test Cases - API](#objectives-of-test-cases-api) -- [Test Cases - API](#test-cases-api) +- [Objectives of API Test Cases](#objectives-of-api-test-cases) +- [API Test Cases](#api-test-cases) - [1.1 Check SmartSwitch specific ChassisClass APIs](#11-check-smartswitch-specific-chassisclass-apis) - [1.2 Check modified ChassisClass APIs for smartswitch](#12-check-modified-chassisclass-apis-for-smartswitch) - [1.3 Check DpuModule APIs for SmartSwitch](#13-check-dpumodule-apis-for-smartswitch) @@ -45,7 +45,7 @@ For every test cases, all DPUs need to be powered on unless specified in any of | SWITCH | Refers to NPU and the anything other than DPUs | | SS | SmartSwitch | -## Objectives of Test Cases - CLI +## Objectives of CLI Test Cases | | **Test Case** | **Intention** | | ---------- | ---------- | ---------------------------------------- | @@ -63,7 +63,7 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | -## Test Cases - CLI +## CLI Test Cases ### 1.1 Check DPU Status @@ -795,18 +795,18 @@ root@sonic:/home/cisco# show chassis modules status * Verify number of DPUs from api and number of DPUs shown in the cli output. -## Objectives of Test Cases - API +## Objectives of API Test Cases | | **Test Case** | **Intention** | **Comments** | | ---------- | ---------- | ---------------------------------------- | ---------- | -| 1.1 | | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | +| 1.1 | Check SmartSwitch specific ChassisClass APIs | To verify the newly implemented SmartSwitch specific ChassisClass APIs | | | 1.2 | Check modified ChassisClass APIs for SmartSwitch | To verify the existing ChassisClass APIs that undergo minor changes with the addition of SmartSwitch| | | 1.3 | Check DpuModule APIs for SmartSwitch | To verify the newly implemented DpuModule APIs for SmartSwitch| | | 1.4 | Check modified ModuleClass APIs for SmartSwitch | To verify the existing ModuleClass APIs that undergo minor changes with the addition of SmartSwitch| -## Test Cases - API +## API Test Cases -### 1.1 +### 1.1 Check SmartSwitch specific ChassisClass APIs #### Steps * Execute the following APIs on SmartSwitch From b1199aa3e79719467669754c19edb5cadf49fab0 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 1 Aug 2024 11:19:26 -0700 Subject: [PATCH 23/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 28 +++++++++++++------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index a22332248bb..c98ae48fffc 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -47,20 +47,20 @@ For every test cases, all DPUs need to be powered on unless specified in any of ## Objectives of CLI Test Cases -| | **Test Case** | **Intention** | -| ---------- | ---------- | ---------------------------------------- | -| 1.1 | Check DPU Status | To verify the DPU Status shown in the cli | -| 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | -| 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | -| 1.4 | Check DPU console | To Verify console access for all DPUs | -| 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | -| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | -| 1.7 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | -| 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | -| 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | -| 1.10 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | -| 1.11 | Check reboot cause history | To Verify reboot cause history cli | -| 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | +| | **Test Case** | **Intention** | **Comments** | +| ---------- | ---------- | ---------------------------------------- | ---------- | +| 1.1 | Check DPU Status | To verify the DPU Status shown in the cli | | +| 1.2 | Check platform voltage | To verify the Voltage sensor values and and functionality of alarm by changing the threshold values | | +| 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | | +| 1.4 | Check DPU console | To Verify console access for all DPUs | | +| 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | | +| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | | +| 1.7 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | | +| 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | | +| 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | | +| 1.10 | Check the Health of DPUs | To Verify overall health (LED, process, docker, services and hw) of DPU | Phase:2 | +| 1.11 | Check reboot cause history | To Verify reboot cause history cli | | +| 1.12 | Check the DPU state after OS reboot | To Verify DPU state on host reboot | | ## CLI Test Cases From 3ef2821364905a94ba182af4146eb1eef229eea4 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 6 Aug 2024 10:29:12 -0700 Subject: [PATCH 24/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 41 +++++++++++++++----------- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index c98ae48fffc..18a89698690 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -54,7 +54,7 @@ For every test cases, all DPUs need to be powered on unless specified in any of | 1.3 | Check platform temperature | To Verify the Temperature sensor values and functionality of alarm by changing the threshold values | | | 1.4 | Check DPU console | To Verify console access for all DPUs | | | 1.5 | Check midplane ip address between NPU and DPU | To Verify PCIe interface created between NPU and DPU according to bus number | | -| 1.6 | Check DPU shutdown and power up individually | To Verify one DPU shutdown and other DPUs in same as well in other sleds are up | | +| 1.6 | Check DPU shutdown and power up individually | To Verify DPU shutdown and DPUs power up | | | 1.7 | Check removal of pcie link between NPU and DPU | To Verify the PCie hot plug functinality | | | 1.8 | Check the NTP date and timezone between DPU and NPU | To Verify NPU and DPU are in sync with respect to timezone and logs timestamp | | | 1.9 | Check the State of DPUs | To Verify DPU state details during online and offline | | @@ -467,14 +467,14 @@ root@sonic:/home/cisco# Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP ------------ -------- ------------------- ------------ -------------- ------------- eth0 172.25.42.65/24 up/up N/A N/A - eth1 169.254.24.2/24 up/up N/A N/A - eth2 169.254.28.2/24 up/up N/A N/A - eth3 169.254.32.2/24 up/up N/A N/A - eth4 169.254.36.2/24 up/up N/A N/A - eth5 169.254.139.2/24 up/up N/A N/A - eth6 169.254.143.2/24 up/up N/A N/A - eth7 169.254.147.2/24 up/up N/A N/A - eth8 169.254.151.2/24 up/up N/A N/A + eth1 169.254.200.1/24 up/up N/A N/A + eth2 169.254.200.2/24 up/up N/A N/A + eth3 169.254.200.3/24 up/up N/A N/A + eth4 169.254.200.4/24 up/up N/A N/A + eth5 169.254.200.5/24 up/up N/A N/A + eth6 169.254.200.6/24 up/up N/A N/A + eth7 169.254.200.7/24 up/up N/A N/A + eth8 169.254.200.8/24 up/up N/A N/A lo 127.0.0.1/16 up/up N/A N/A root@sonic:/home/cisco# ``` @@ -537,9 +537,9 @@ root@sonic:/home/cisco# show chassis modules status #### Steps * Use command `pcieutil generate` to generate pcie yaml * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing - * Use command `echo 1 > /sys/bus/pci/devices/BUS_ID/remove` to remove pcie link between NPU and one DPU + * Use command `config chassis modules shutdown DPU` to bring down the dpu (This will bring down the pcie link between npu and dpu) * Use `show platform pcieinfo -c` to run the pcie info test to check pcie link has been removed - * Use command `echo 1 > /sys/bus/pci/rescan` to rescan pcie links + * Use command `config chassis modules startup DPU` to bring up the dpu (This will rescan pcie links) * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing * This test is to check the PCie hot plug functinality since there is no OIR possible @@ -654,6 +654,9 @@ DPU0 1 Partial Online dpu_midplane_link_state up ### 1.10 Check the Health of DPUs +####NOTE + * This Test case is to be covered in Phase 2 + #### Steps * Use command `show system-health detail ` to check the health of the DPU. @@ -748,20 +751,22 @@ DPU3 2023_10_02_17_23_46 Host Reset DPU Sun 02 Oct 2 #### Steps -Existing Test case: - * Reboot using a particular command (sonic reboot, watchdog reboot, etc) (timeout 5 mins, wait 2 mins) +Existing Test case for NPU: + * Reboot using a particular command (sonic reboot, watchdog reboot, etc) + * All the timeout and poll timings are read from platform.json * Wait for ssh to drop * Wait for ssh to connect - * Database check –1 min timeout + * Database check * Check for uptime – (NTP sync) - * Check for critical process – 5 mins timeout – check every 20 secs - * Check for transceiver status –– 5 mins timeout – check every 20 seconds + * Check for critical process + * Check for transceiver status * Check for pmon status * Check for reboot cause * Reboot is successful Reboot Test Case for DPU: - * After the exisiting case, Power on all the DPUs using `config chassis modules startup ` + * Save the configurations of all DPU state before reboot + * Power on all the DPUs that were powered on before reboot using `config chassis modules startup ` * Wait for DPUs to be up * Use command `show chassis modules status` to get DPU status * Get the number of DPU modules from PMON APIs - get_num_modules() @@ -812,7 +817,7 @@ root@sonic:/home/cisco# show chassis modules status * Execute the following APIs on SmartSwitch * get_dpu_id(self, name): * Provide name (Example: DPU0 - Get it from platform.json file) - * This API should return an integer from 1-8 (check it against platform.json) + * This API should return an integer from 0-7 (check it against platform.json) * is_smartswitch(self): * This API should return True * get_module_dpu_data_port(self, index): From da79e66fea704d2b6308853a3b5427476456c882 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 6 Aug 2024 10:30:01 -0700 Subject: [PATCH 25/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 18a89698690..4cb27f72809 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -585,7 +585,7 @@ root@sonic:/home/cisco# date Tue 23 Apr 2024 11:46:47 PM UTC root@sonic:/home/cisco# . -root@sonic:/home/cisco# ssh admin@169.254.24.1 +root@sonic:/home/cisco# ssh admin@169.254.200.1 root@sonic:/home/cisco# . On DPU: From a1c4b40e2903ce7b12af239e510ce96c2ce6ad8a Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 6 Aug 2024 11:21:31 -0700 Subject: [PATCH 26/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 218 ++++--------------------- 1 file changed, 36 insertions(+), 182 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 4cb27f72809..69b5f95bbca 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -83,12 +83,7 @@ root@sonic:/home/cisco# show chassis modules status DPU0 N/A -1 Online up N/A DPU1 N/A -1 Online up N/A DPU2 N/A -1 Online up N/A - DPU3 N/A -1 Online up N/A - DPU4 N/A -1 Online up N/A - DPU5 N/A -1 Online up N/A - DPU6 N/A -1 Online up N/A - DPU7 N/A -1 Online up N/A - + DPUX N/A -1 Online up N/A ``` #### Pass/Fail Criteria * Verify number of DPUs from api and number of DPUs shown in the cli output. @@ -147,19 +142,11 @@ root@sonic:/home/cisco# show platform voltage VP0P6_DDR0_VTT_DPU0 599 mV 630 570 642 558 False 20230619 11:31:55 VP0P6_DDR0_VTT_DPU1 597 mV 630 570 642 558 False 20230619 11:31:56 VP0P6_DDR0_VTT_DPU2 600 mV 630 570 642 558 False 20230619 11:31:58 - VP0P6_DDR0_VTT_DPU3 600 mV 630 570 642 558 False 20230619 11:31:59 - VP0P6_DDR0_VTT_DPU4 599 mV 630 570 642 558 False 20230619 11:32:01 - VP0P6_DDR0_VTT_DPU5 597 mV 630 570 642 558 False 20230619 11:31:02 - VP0P6_DDR0_VTT_DPU6 596 mV 630 570 642 558 False 20230619 11:31:04 - VP0P6_DDR0_VTT_DPU7 599 mV 630 570 642 558 False 20230619 11:31:05 + VP0P6_DDR0_VTT_DPUX 600 mV 630 570 642 558 False 20230619 11:31:59 VP0P6_DDR1_VTT_DPU0 600 mV 630 570 642 558 False 20230619 11:31:56 VP0P6_DDR1_VTT_DPU1 602 mV 630 570 642 558 False 20230619 11:31:57 VP0P6_DDR1_VTT_DPU2 601 mV 630 570 642 558 False 20230619 11:31:58 - VP0P6_DDR1_VTT_DPU3 601 mV 630 570 642 558 False 20230619 11:32:00 - VP0P6_DDR1_VTT_DPU4 600 mV 630 570 642 558 False 20230619 11:31:02 - VP0P6_DDR1_VTT_DPU5 597 mV 630 570 642 558 False 20230619 11:31:03 - VP0P6_DDR1_VTT_DPU6 596 mV 630 570 642 558 False 20230619 11:31:04 - VP0P6_DDR1_VTT_DPU7 601 mV 630 570 642 558 False 20230619 11:31:06 + VP0P6_DDR1_VTT_DPUX 601 mV 630 570 642 558 False 20230619 11:32:00 VP0P6_VTT_DIMM_CPU 597 mV 654 546 660 540 False 20230619 11:31:51 VP0P8_AVDD_D6_DPU0 801 mV 840 760 856 744 False 20230619 11:31:16 VP0P8_AVDD_D6_DPU1_ADC 806 mV 840 760 856 744 False 20230619 11:31:20 @@ -167,156 +154,36 @@ root@sonic:/home/cisco# show platform voltage VP0P8_AVDD_D6_DPU3_ADC 805 mV 840 760 856 744 False 20230619 11:31:29 VP0P8_AVDD_D6_DPU4 806 mV 840 760 856 744 False 20230619 11:31:34 VP0P8_AVDD_D6_DPU5_ADC 801 mV 840 760 856 744 False 20230619 11:31:39 - VP0P8_AVDD_D6_DPU6 805 mV 840 760 856 744 False 20230619 11:31:44 + VP0P8_AVDD_DX_DPUX 805 mV 840 760 856 744 False 20230619 11:31:44 VP0P8_AVDD_D6_DPU7_ADC 806 mV 840 760 856 744 False 20230619 11:31:48 VP0P8_NW_DPU0 803 mV 840 760 856 744 False 20230619 11:31:17 VP0P8_NW_DPU1 804 mV 840 760 856 744 False 20230619 11:31:21 VP0P8_NW_DPU2 803 mV 840 760 856 744 False 20230619 11:31:26 - VP0P8_NW_DPU3 804 mV 840 760 856 744 False 20230619 11:31:31 - VP0P8_NW_DPU4 805 mV 840 760 856 744 False 20230619 11:31:35 - VP0P8_NW_DPU5 801 mV 840 760 856 744 False 20230619 11:31:40 - VP0P8_NW_DPU6 801 mV 840 760 856 744 False 20230619 11:31:45 - VP0P8_NW_DPU7 804 mV 840 760 856 744 False 20230619 11:31:49 + VP0P8_NW_DPUX 804 mV 840 760 856 744 False 20230619 11:31:31 VP0P8_PLL_AVDD_PCIE_DPU0 802 mV 840 760 856 744 False 20230619 11:31:56 VP0P8_PLL_AVDD_PCIE_DPU1 804 mV 840 760 856 744 False 20230619 11:31:57 VP0P8_PLL_AVDD_PCIE_DPU2 801 mV 840 760 856 744 False 20230619 11:31:59 -VP0P8_PLL_AVDD_PCIE_DPU3 802 mV 840 760 856 744 False 20230619 11:32:00 -VP0P8_PLL_AVDD_PCIE_DPU4 804 mV 840 760 856 744 False 20230619 11:31:02 -VP0P8_PLL_AVDD_PCIE_DPU5 800 mV 840 760 856 744 False 20230619 11:31:03 -VP0P8_PLL_AVDD_PCIE_DPU6 799 mV 840 760 856 744 False 20230619 11:31:05 -VP0P8_PLL_AVDD_PCIE_DPU7 802 mV 840 760 856 744 False 20230619 11:31:06 +VP0P8_PLL_AVDD_PCIE_DPUX 802 mV 840 760 856 744 False 20230619 11:32:00 VP0P9_AVDDH_D6_DPU0 906 mV 945 855 963 837 False 20230619 11:31:15 VP0P9_AVDDH_D6_DPU1 908 mV 945 855 963 837 False 20230619 11:31:19 VP0P9_AVDDH_D6_DPU2 907 mV 945 855 963 837 False 20230619 11:31:24 - VP0P9_AVDDH_D6_DPU3 908 mV 945 855 963 837 False 20230619 11:31:29 - VP0P9_AVDDH_D6_DPU4 910 mV 945 855 963 837 False 20230619 11:31:33 - VP0P9_AVDDH_D6_DPU5 911 mV 945 855 963 837 False 20230619 11:31:38 - VP0P9_AVDDH_D6_DPU6 908 mV 945 855 963 837 False 20230619 11:31:43 - VP0P9_AVDDH_D6_DPU7 907 mV 945 855 963 837 False 20230619 11:31:47 + VP0P9_AVDDH_D6_DPUX 908 mV 945 855 963 837 False 20230619 11:31:29 VP0P9_AVDDH_PCIE_DPU0 901 mV 945 855 963 837 False 20230619 11:31:17 VP0P9_AVDDH_PCIE_DPU1 903 mV 945 855 963 837 False 20230619 11:31:22 VP0P9_AVDDH_PCIE_DPU2 901 mV 945 855 963 837 False 20230619 11:31:26 - VP0P9_AVDDH_PCIE_DPU3 903 mV 945 855 963 837 False 20230619 11:31:31 - VP0P9_AVDDH_PCIE_DPU4 902 mV 945 855 963 837 False 20230619 11:31:36 - VP0P9_AVDDH_PCIE_DPU5 901 mV 945 855 963 837 False 20230619 11:31:40 - VP0P9_AVDDH_PCIE_DPU6 902 mV 945 855 963 837 False 20230619 11:31:45 - VP0P9_AVDDH_PCIE_DPU7 903 mV 945 855 963 837 False 20230619 11:31:50 + VP0P9_AVDDH_PCIE_DPUX 903 mV 945 855 963 837 False 20230619 11:31:31 VP0P75_PVDD_DPU0 752 mV 788 713 803 698 False 20230619 11:31:15 VP0P75_PVDD_DPU1 756 mV 788 713 802 698 False 20230619 11:31:20 VP0P75_PVDD_DPU2 756 mV 788 713 803 698 False 20230619 11:31:24 - VP0P75_PVDD_DPU3 755 mV 788 713 802 698 False 20230619 11:31:29 - VP0P75_PVDD_DPU4 756 mV 788 713 803 698 False 20230619 11:31:34 - VP0P75_PVDD_DPU5 757 mV 788 713 802 698 False 20230619 11:31:38 - VP0P75_PVDD_DPU6 756 mV 788 713 803 698 False 20230619 11:31:43 - VP0P75_PVDD_DPU7 756 mV 788 713 802 698 False 20230619 11:31:47 + VP0P75_PVDD_DPUX 755 mV 788 713 802 698 False 20230619 11:31:29 VP0P75_RTVDD_DPU0 753 mV 788 713 803 698 False 20230619 11:31:14 VP0P75_RTVDD_DPU1 755 mV 788 713 802 698 False 20230619 11:31:19 VP0P75_RTVDD_DPU2 752 mV 788 713 803 698 False 20230619 11:31:24 - VP0P75_RTVDD_DPU3 755 mV 788 713 802 698 False 20230619 11:31:28 - VP0P75_RTVDD_DPU4 753 mV 788 713 803 698 False 20230619 11:31:33 - VP0P75_RTVDD_DPU5 757 mV 788 713 802 698 False 20230619 11:31:38 - VP0P75_RTVDD_DPU6 755 mV 788 713 803 698 False 20230619 11:31:42 - VP0P75_RTVDD_DPU7 753 mV 788 713 802 698 False 20230619 11:31:47 + VP0P75_RTVDD_DPUX 755 mV 788 713 802 698 False 20230619 11:31:28 VP0P82_AVDD_PCIE_DPU0 823 mV 861 779 877 763 False 20230619 11:31:18 VP0P82_AVDD_PCIE_DPU1 823 mV 861 779 877 763 False 20230619 11:31:22 VP0P82_AVDD_PCIE_DPU2 822 mV 861 779 877 763 False 20230619 11:31:27 - VP0P82_AVDD_PCIE_DPU3 822 mV 861 779 877 763 False 20230619 11:31:31 - VP0P82_AVDD_PCIE_DPU4 823 mV 861 779 877 763 False 20230619 11:31:36 - VP0P82_AVDD_PCIE_DPU5 820 mV 861 779 877 763 False 20230619 11:31:41 - VP0P82_AVDD_PCIE_DPU6 819 mV 861 779 877 763 False 20230619 11:31:45 - VP0P82_AVDD_PCIE_DPU7 824 mV 861 779 877 763 False 20230619 11:31:50 - VP0P85_VDD_MAC_DPU0 853 mV 893 808 910 791 False 20230619 11:31:14 - VP0P85_VDD_MAC_DPU1 854 mV 893 808 910 791 False 20230619 11:31:19 - VP0P85_VDD_MAC_DPU2 853 mV 893 808 910 791 False 20230619 11:31:23 - VP0P85_VDD_MAC_DPU3 856 mV 893 808 910 791 False 20230619 11:31:28 - VP0P85_VDD_MAC_DPU4 856 mV 893 808 910 791 False 20230619 11:31:33 - VP0P85_VDD_MAC_DPU5 856 mV 893 808 910 791 False 20230619 11:31:37 - VP0P85_VDD_MAC_DPU6 857 mV 893 808 910 791 False 20230619 11:31:42 - VP0P85_VDD_MAC_DPU7 852 mV 893 808 910 791 False 20230619 11:31:46 - VP1P0_PCH_CPU 870 mV N/A N/A 1242 562 False 20230619 11:31:54 - VP1P0_PCIE4_CPU 1000 mV 1070 930 1100 900 False 20230619 11:31:54 - VP1P2_DIMM_CPU 1200 mV 1284 1116 1320 1080 False 20230619 11:31:54 - VP1P2_TVDDH_DPU0 1205 mV 1260 1140 1284 1116 False 20230619 11:31:15 - VP1P2_TVDDH_DPU1_ADC 1214 mV 1268 1140 1284 1116 False 20230619 11:31:20 - VP1P2_TVDDH_DPU2 1211 mV 1260 1140 1284 1116 False 20230619 11:31:25 - VP1P2_TVDDH_DPU3_ADC 1210 mV 1268 1140 1284 1116 False 20230619 11:31:29 - VP1P2_TVDDH_DPU4 1211 mV 1260 1140 1284 1116 False 20230619 11:31:34 - VP1P2_TVDDH_DPU5_ADC 1209 mV 1268 1140 1284 1116 False 20230619 11:31:38 - VP1P2_TVDDH_DPU6 1215 mV 1260 1140 1284 1116 False 20230619 11:31:43 - VP1P2_TVDDH_DPU7_ADC 1210 mV 1268 1140 1284 1116 False 20230619 11:31:48 - VP1P05_CPU 1075 mV 1123 977 1155 945 False 20230619 11:31:54 - VP1P8_AOD_PLL_DPU0 1801 mV 1890 1710 1926 1674 False 20230619 11:31:14 - VP1P8_AOD_PLL_DPU1 1809 mV 1890 1710 1926 1674 False 20230619 11:31:18 - VP1P8_AOD_PLL_DPU2 1810 mV 1890 1710 1926 1674 False 20230619 11:31:23 - VP1P8_AOD_PLL_DPU3 1811 mV 1890 1710 1926 1674 False 20230619 11:31:28 - VP1P8_AOD_PLL_DPU4 1811 mV 1890 1710 1926 1674 False 20230619 11:31:32 - VP1P8_AOD_PLL_DPU5 1810 mV 1890 1710 1926 1674 False 20230619 11:31:37 - VP1P8_AOD_PLL_DPU6 1810 mV 1890 1710 1926 1674 False 20230619 11:31:42 - VP1P8_AOD_PLL_DPU7 1804 mV 1890 1710 1926 1674 False 20230619 11:31:46 - VP1P8_CPLD_SLED1 1800 mV 1890 1710 1926 1674 False 20230619 11:31:55 - VP1P8_CPLD_SLED2 1808 mV 1890 1710 1926 1674 False 20230619 11:31:58 - VP1P8_CPLD_SLED3 1805 mV 1890 1710 1926 1674 False 20230619 11:32:01 - VP1P8_CPLD_SLED4 1809 mV 1890 1710 1926 1674 False 20230619 11:31:04 - VP1P8_CPU 1800 mV 1962 1591 2016 1584 False 20230619 11:31:54 - VP1P8_NIC_DPU0 1803 mV 1890 1710 1926 1674 False 20230619 11:31:16 - VP1P8_NIC_DPU1 1812 mV 1890 1710 1926 1674 False 20230619 11:31:20 - VP1P8_NIC_DPU2 1797 mV 1890 1710 1926 1674 False 20230619 11:31:25 - VP1P8_NIC_DPU3 1810 mV 1890 1710 1926 1674 False 20230619 11:31:30 - VP1P8_NIC_DPU4 1804 mV 1890 1710 1926 1674 False 20230619 11:31:35 - VP1P8_NIC_DPU5 1802 mV 1890 1710 1926 1674 False 20230619 11:31:39 - VP1P8_NIC_DPU6 1808 mV 1890 1710 1926 1674 False 20230619 11:31:44 - VP1P8_NIC_DPU7 1811 mV 1890 1710 1926 1674 False 20230619 11:31:48 - VP1P8_SE_AOD_DPU0 1806 mV 1890 1710 1926 1674 False 20230619 11:31:13 - VP1P8_SE_AOD_DPU1 1811 mV 1890 1710 1926 1674 False 20230619 11:31:18 - VP1P8_SE_AOD_DPU2 1808 mV 1890 1710 1926 1674 False 20230619 11:31:23 - VP1P8_SE_AOD_DPU3 1809 mV 1890 1710 1926 1674 False 20230619 11:31:27 - VP1P8_SE_AOD_DPU4 1811 mV 1890 1710 1926 1674 False 20230619 11:31:32 - VP1P8_SE_AOD_DPU5 1813 mV 1890 1710 1926 1674 False 20230619 11:31:36 - VP1P8_SE_AOD_DPU6 1809 mV 1890 1710 1926 1674 False 20230619 11:31:41 - VP1P8_SE_AOD_DPU7 1806 mV 1890 1710 1926 1674 False 20230619 11:31:46 - VP1P8_VCCIN_CPU 1780 mV N/A N/A 2002 1478 False 20230619 11:31:54 - VP1P83_POD_PLL_DPU0 1799 mV 1922 1739 1959 1702 False 20230619 11:31:16 - VP1P83_POD_PLL_DPU1 1809 mV 1922 1739 1958 1702 False 20230619 11:31:21 - VP1P83_POD_PLL_DPU2 1804 mV 1922 1739 1959 1702 False 20230619 11:31:26 - VP1P83_POD_PLL_DPU3 1804 mV 1922 1739 1958 1702 False 20230619 11:31:30 - VP1P83_POD_PLL_DPU4 1808 mV 1922 1739 1959 1702 False 20230619 11:31:35 - VP1P83_POD_PLL_DPU5 1803 mV 1922 1739 1958 1702 False 20230619 11:31:39 - VP1P83_POD_PLL_DPU6 1807 mV 1922 1739 1959 1702 False 20230619 11:31:44 - VP1P83_POD_PLL_DPU7 1805 mV 1922 1739 1958 1702 False 20230619 11:31:49 - VP2P5_DDR_VPP_DPU0 2520 mV 2625 2375 2675 2325 False 20230619 11:31:17 - VP2P5_DDR_VPP_DPU1 2528 mV 2625 2375 2675 2325 False 20230619 11:31:21 - VP2P5_DDR_VPP_DPU2 2523 mV 2625 2375 2675 2325 False 20230619 11:31:26 - VP2P5_DDR_VPP_DPU3 2529 mV 2625 2375 2675 2325 False 20230619 11:31:30 - VP2P5_DDR_VPP_DPU4 2525 mV 2625 2375 2675 2325 False 20230619 11:31:35 - VP2P5_DDR_VPP_DPU5 2523 mV 2625 2375 2675 2325 False 20230619 11:31:40 - VP2P5_DDR_VPP_DPU6 2535 mV 2625 2375 2675 2325 False 20230619 11:31:45 - VP2P5_DDR_VPP_DPU7 2528 mV 2625 2375 2675 2325 False 20230619 11:31:49 - VP2P5_STBY_CPU 2519 mV 2725 2275 2750 2250 False 20230619 11:31:53 - VP3P3_CPLD_SLED1 3307 mV 3465 3135 3531 3069 False 20230619 11:31:54 - VP3P3_CPLD_SLED2 3325 mV 3465 3135 3531 3069 False 20230619 11:31:57 - VP3P3_CPLD_SLED3 3334 mV 3465 3135 3531 3069 False 20230619 11:32:00 - VP3P3_CPLD_SLED4 3327 mV 3465 3135 3531 3069 False 20230619 11:31:03 - VP3P3_CPU 3278 mV 3597 3003 3630 2970 False 20230619 11:31:11 - VP3P3_NIC_DPU0 3289 mV 3465 3135 3531 3069 False 20230619 11:31:55 - VP3P3_NIC_DPU1_ADC 3308 mV 3465 3135 3531 3069 False 20230619 11:31:56 - VP3P3_NIC_DPU2 3293 mV 3465 3135 3531 3069 False 20230619 11:31:58 - VP3P3_NIC_DPU3_ADC 3299 mV 3465 3135 3531 3069 False 20230619 11:31:59 - VP3P3_NIC_DPU4 3306 mV 3465 3135 3531 3069 False 20230619 11:32:01 - VP3P3_NIC_DPU5_ADC 3299 mV 3465 3135 3531 3069 False 20230619 11:31:02 - VP3P3_NIC_DPU6 3308 mV 3465 3135 3531 3069 False 20230619 11:31:04 - VP3P3_NIC_DPU7_ADC 3307 mV 3465 3135 3531 3069 False 20230619 11:31:05 - VP3P3_SATA_CPU 3302 mV 3597 3003 3630 2970 False 20230619 11:31:50 - VP3P3_SLED1 3301 mV 3465 3135 3531 3069 False 20230619 11:31:13 - VP3P3_SLED2 3303 mV 3465 3135 3531 3069 False 20230619 11:31:22 - VP3P3_SLED3 3318 mV 3465 3135 3531 3069 False 20230619 11:31:32 - VP3P3_SLED4 3322 mV 3465 3135 3531 3069 False 20230619 11:31:41 - VP3P3_STBY_BMC_CPU 3322 mV 3597 3003 3603 2970 False 20230619 11:31:52 - VP3P3_STBY_CPU 3322 mV 3597 3003 3603 2970 False 20230619 11:31:53 - VP5P0_CPU 5066 mV 5450 4550 5500 4500 False 20230619 11:31:11 - VP5P0_SLED1 4964 mV 5250 4750 5350 4650 False 20230619 11:31:18 - VP5P0_SLED2 4988 mV 5250 4750 5350 4650 False 20230619 11:31:27 - VP5P0_SLED3 5003 mV 5250 4750 5350 4650 False 20230619 11:31:36 - VP5P0_SLED4 5013 mV 5250 4750 5350 4650 False 20230619 11:31:46 + VP0P82_AVDD_PCIE_DPUX 822 mV 861 779 877 763 False 20230619 11:31:31 root@sonic:/home/cisco# ``` @@ -467,14 +334,9 @@ root@sonic:/home/cisco# Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP ------------ -------- ------------------- ------------ -------------- ------------- eth0 172.25.42.65/24 up/up N/A N/A - eth1 169.254.200.1/24 up/up N/A N/A - eth2 169.254.200.2/24 up/up N/A N/A - eth3 169.254.200.3/24 up/up N/A N/A - eth4 169.254.200.4/24 up/up N/A N/A - eth5 169.254.200.5/24 up/up N/A N/A - eth6 169.254.200.6/24 up/up N/A N/A - eth7 169.254.200.7/24 up/up N/A N/A - eth8 169.254.200.8/24 up/up N/A N/A + eth1 169.254.200.1/24 up/up N/A N/A + eth2 169.254.200.2/24 up/up N/A N/A + ethX 169.254.200.X/24 up/up N/A N/A lo 127.0.0.1/16 up/up N/A N/A root@sonic:/home/cisco# ``` @@ -498,7 +360,7 @@ root@sonic:/home/cisco# ``` On Switch: -root@sonic:/home/cisco# config chassis modules shutdown DPU4 +root@sonic:/home/cisco# config chassis modules shutdown DPU3 root@sonic:/home/cisco# root@sonic:/home/cisco# show chassis modules status Name Description Physical-Slot Oper-Status Admin-Status Serial @@ -506,13 +368,9 @@ root@sonic:/home/cisco# show chassis modules status DPU0 N/A -1 Online up N/A DPU1 N/A -1 Online up N/A DPU2 N/A -1 Online up N/A - DPU3 N/A -1 Online up N/A - DPU4 N/A -1 Offline down N/A - DPU5 N/A -1 Online up N/A - DPU6 N/A -1 Online up N/A - DPU7 N/A -1 Online up N/A + DPU3 N/A -1 Offline down N/A -root@sonic:/home/cisco# config chassis modules startup DPU4 +root@sonic:/home/cisco# config chassis modules startup DPU3 root@sonic:/home/cisco# show chassis modules status Name Description Physical-Slot Oper-Status Admin-Status Serial ------ ------------- --------------- ------------- -------------- -------- @@ -520,11 +378,6 @@ root@sonic:/home/cisco# show chassis modules status DPU1 N/A -1 Online up N/A DPU2 N/A -1 Online up N/A DPU3 N/A -1 Online up N/A - DPU4 N/A -1 Online up N/A - DPU5 N/A -1 Online up N/A - DPU6 N/A -1 Online up N/A - DPU7 N/A -1 Online up N/A - ``` #### Pass/Fail Criteria @@ -654,7 +507,7 @@ DPU0 1 Partial Online dpu_midplane_link_state up ### 1.10 Check the Health of DPUs -####NOTE +#### NOTE * This Test case is to be covered in Phase 2 #### Steps @@ -789,11 +642,7 @@ root@sonic:/home/cisco# show chassis modules status DPU0 N/A -1 Online up N/A DPU1 N/A -1 Online up N/A DPU2 N/A -1 Online up N/A - DPU3 N/A -1 Online up N/A - DPU4 N/A -1 Online up N/A - DPU5 N/A -1 Online up N/A - DPU6 N/A -1 Online up N/A - DPU7 N/A -1 Online up N/A + DPUX N/A -1 Online up N/A ``` #### Pass/Fail Criteria @@ -817,7 +666,7 @@ root@sonic:/home/cisco# show chassis modules status * Execute the following APIs on SmartSwitch * get_dpu_id(self, name): * Provide name (Example: DPU0 - Get it from platform.json file) - * This API should return an integer from 0-7 (check it against platform.json) + * This API should return an integer from 0- (check it against platform.json) * is_smartswitch(self): * This API should return True * get_module_dpu_data_port(self, index): @@ -891,15 +740,11 @@ On Switch: * Limit the testing to software reboot * get_state_info(self): * This should return an object - * Stop one of the DPU containers on this DPU + * Stop Syncd container on this DPU * Execute the CLI and check the dpu-control-plane value should be down - * Check the complete list of containers without which the control plane can be up. - * This test case can be extended to verify the DPU transition through all states. - * get_health_info(self): - * This should return an object - * Stop one of the DPU containers on this DPU - * Execute the CLI and check if the health shows the stopped container - + * Check also dpu-data-plane is also down + * This will be enhanced in Phase - 2 to test multiple failure scenarios and transistions. + #### Verify in * Switch @@ -911,9 +756,18 @@ On Switch: get_reboot_cause(self): Output: {"Device": "DPU0", "Name": 2024_05_31_00_33_30, "Cause": "reboot", "Time": "Fri 31 May 2024 12:29:34 AM UTC", "User": "NA", "Comment": "NA"} get_state_info(self): - Output: dpu state info object - get_health_info(self): - Output: dpu health info object + Output: get_state_info() { + 'dpu_control_plane_reason': 'All containers are up and running, host-ethlink-status: Uplink1/1 is UP', + 'dpu_control_plane_state': 'UP', + 'dpu_control_plane_time': '20240626 21:13:25', + 'dpu_data_plane_reason': 'DPU container named polaris is running, pdsagent running : OK, pciemgrd running : OK', + 'dpu_data_plane_state': 'UP', + 'dpu_data_plane_time': '20240626 21:10:07', + 'dpu_midplane_link_reason': 'INTERNAL-MGMT : admin state - UP, oper_state - UP, status - OK, HOST-MGMT : admin state - UP, oper_state - UP, status - OK', + 'dpu_midplane_link_state': 'UP', + 'dpu_midplane_link_time': '20240626 21:13:25', + 'id': '0' + } ``` #### Pass/Fail Criteria * Verify that all the APIs mentioned return the expected output From 4d9eb9b37a38721856c29c7eba141051ad59b124 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Tue, 6 Aug 2024 11:24:19 -0700 Subject: [PATCH 27/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 69b5f95bbca..3817434e372 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -34,6 +34,7 @@ Smartswitch is connected to DPUs via pcie links. The test is targeting a running SONIC on Switch and SONIC-DASH system on each DPUs. Purpose of the test is to verify smartswich platform related functionalities/features for each DPUs and PMON APIs. For every test cases, all DPUs need to be powered on unless specified in any of the case. +General convention of DPU0, DPU1, DPU2 and DPUX has been followed to represent DPU modules and the number of DPU modules can vary. ## Definitions and Abbreviations From 33c9fab5a06b0af4df62b2631150313e45b61cd3 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 7 Aug 2024 14:07:28 -0700 Subject: [PATCH 28/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 3817434e372..3b78ca3bf4d 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -389,7 +389,6 @@ root@sonic:/home/cisco# show chassis modules status ### 1.7 Check removal of pcie link between NPU and DPU #### Steps - * Use command `pcieutil generate` to generate pcie yaml * Use `show platform pcieinfo -c` to run the pcie info test to check everything is passing * Use command `config chassis modules shutdown DPU` to bring down the dpu (This will bring down the pcie link between npu and dpu) * Use `show platform pcieinfo -c` to run the pcie info test to check pcie link has been removed @@ -404,9 +403,7 @@ root@sonic:/home/cisco# show chassis modules status ``` On Switch: Showing example of one DPU pcie link -root@sonic:/home/cisco# pcieutil generate -Are you sure to overwrite config file pcie.yaml with current pcie device info? [y/N]: y -Generated config file '/usr/share/sonic/device/x86_64-8102_28fh_dpu_o-r0/pcie.yaml' + root@sonic:/home/cisco# show platform pcieinfo -c root@sonic:/home/cisco# echo 1 > /sys/bus/pci/devices/0000:1a:00.0/remove From e97e868ff6e38b57038a1dbf3ae7f4eda4a05155 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Wed, 7 Aug 2024 14:14:19 -0700 Subject: [PATCH 29/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 3b78ca3bf4d..d649e94336b 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -335,9 +335,7 @@ root@sonic:/home/cisco# Interface Master IPv4 address/mask Admin/Oper BGP Neighbor Neighbor IP ------------ -------- ------------------- ------------ -------------- ------------- eth0 172.25.42.65/24 up/up N/A N/A - eth1 169.254.200.1/24 up/up N/A N/A - eth2 169.254.200.2/24 up/up N/A N/A - ethX 169.254.200.X/24 up/up N/A N/A + bridge-midplane 169.254.200.254/24 up/up N/A N/A lo 127.0.0.1/16 up/up N/A N/A root@sonic:/home/cisco# ``` From 23b2eb4d26495f1eaa32a56f13b2447e893a9fc1 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 22 Aug 2024 15:01:32 -0700 Subject: [PATCH 30/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 48 +++++++++++++------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index d649e94336b..c558682d7b1 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -79,12 +79,12 @@ General convention of DPU0, DPU1, DPU2 and DPUX has been followed to represent D ``` On Switch: root@sonic:/home/cisco# show chassis modules status - Name Description Physical-Slot Oper-Status Admin-Status Serial ------- ------------- --------------- ------------- -------------- -------- - DPU0 N/A -1 Online up N/A - DPU1 N/A -1 Online up N/A - DPU2 N/A -1 Online up N/A - DPUX N/A -1 Online up N/A + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ -------------------- --------------- ------------- -------------- -------------- + DPU0 Data Processing Unit N/A Online up 154226463179136 + DPU1 Data Processing Unit N/A Online up 154226463179152 + DPU2 Data Processing Unit N/A Online up 154226463179168 + DPUX Data Processing Unit N/A Online up 154226463179184 ``` #### Pass/Fail Criteria * Verify number of DPUs from api and number of DPUs shown in the cli output. @@ -362,21 +362,21 @@ On Switch: root@sonic:/home/cisco# config chassis modules shutdown DPU3 root@sonic:/home/cisco# root@sonic:/home/cisco# show chassis modules status - Name Description Physical-Slot Oper-Status Admin-Status Serial ------- ------------- --------------- ------------- -------------- -------- - DPU0 N/A -1 Online up N/A - DPU1 N/A -1 Online up N/A - DPU2 N/A -1 Online up N/A - DPU3 N/A -1 Offline down N/A + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ -------------------- --------------- ------------- -------------- ---------------- + DPU0 Data Processing Unit N/A Online up 154226463179136 + DPU1 Data Processing Unit N/A Online up 154226463179152 + DPU2 Data Processing Unit N/A Online up 154226463179168 + DPU3 Data Processing Unit N/A Offline down 154226463179184 root@sonic:/home/cisco# config chassis modules startup DPU3 root@sonic:/home/cisco# show chassis modules status - Name Description Physical-Slot Oper-Status Admin-Status Serial ------- ------------- --------------- ------------- -------------- -------- - DPU0 N/A -1 Online up N/A - DPU1 N/A -1 Online up N/A - DPU2 N/A -1 Online up N/A - DPU3 N/A -1 Online up N/A + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ ------------------- --------------- ------------- -------------- ---------------- + DPU0 Data Processing Unit N/A Online up 154226463179136 + DPU1 Data Processing Unit N/A Online up 154226463179152 + DPU2 Data Processing Unit N/A Online up 154226463179168 + DPU3 Data Processing Unit N/A Online up 154226463179184 ``` #### Pass/Fail Criteria @@ -633,12 +633,12 @@ root@sonic:/home/cisco# config chassis modules startup root@sonic:/home/cisco# root@sonic:/home/cisco# root@sonic:/home/cisco# show chassis modules status - Name Description Physical-Slot Oper-Status Admin-Status Serial ------- ------------- --------------- ------------- -------------- -------- - DPU0 N/A -1 Online up N/A - DPU1 N/A -1 Online up N/A - DPU2 N/A -1 Online up N/A - DPUX N/A -1 Online up N/A + Name Description Physical-Slot Oper-Status Admin-Status Serial +------ -------------------- --------------- ------------- -------------- --------------- + DPU0 Data Processing Unit N/A Online up 154226463179136 + DPU1 Data Processing Unit N/A Online up 154226463179152 + DPU2 Data Processing Unit N/A Online up 154226463179168 + DPUX Data Processing Unit N/A Online up 154226463179184 ``` #### Pass/Fail Criteria From 6b774f5ab9352d4c89313e44c959d8524348e3c4 Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 22 Aug 2024 15:12:38 -0700 Subject: [PATCH 31/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index c558682d7b1..45ec58e204d 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -70,7 +70,7 @@ General convention of DPU0, DPU1, DPU2 and DPUX has been followed to represent D #### Steps * Use command `show chassis modules status` to get DPU status - * Get the number of DPU modules from PMON APIs - get_num_modules() + * Get the number of DPU modules from ansible inventory file for the testbed. #### Verify in * Switch @@ -87,7 +87,7 @@ root@sonic:/home/cisco# show chassis modules status DPUX Data Processing Unit N/A Online up 154226463179184 ``` #### Pass/Fail Criteria - * Verify number of DPUs from api and number of DPUs shown in the cli output. + * Verify number of DPUs from inventory file for the testbed and number of DPUs shown in the cli output. ### 1.2 Check platform voltage @@ -232,7 +232,7 @@ MB_TMP421_Local 26.25 135.0 -5.0 140.0 -10 #### Steps * Use serial port utility to access console for given DPU. * Get the mapping of serial port to DPU number from platform.json file. - * Get the number of DPU modules from PMON APIs - get_num_modules(). Test is to check for console access for all DPUs. + * Get the number of DPU modules from ansible inventory file for the testbed. Test is to check for console access for all DPUs. #### Verify in * Switch @@ -321,8 +321,8 @@ root@sonic:/home/cisco# ### 1.5 Check midplane ip address between NPU and DPU #### Steps - * Get the number of DPU modules from PMON APIs - get_num_modules() - * Get mid plane ip address for each DPU module from PMON APIs - get_midplane_ip() + * Get the number of DPU modules from PMON APIs - get_num_modules(). + * Get mid plane ip address for each DPU module from ansible inventory file for the testbed. #### Verify in * Switch @@ -340,13 +340,13 @@ root@sonic:/home/cisco# root@sonic:/home/cisco# ``` #### Pass/Fail Criteria - * Verify Ping works to all the mid plane ip listed in the api output + * Verify Ping works to all the mid plane ip listed in the ansible inventory file for the testbed. ### 1.6 Check DPU shutdown and power up individually #### Steps - * Get the number of DPU modules from PMON APIs - get_num_modules() + * Get the number of DPU modules from Ansible inventory file for the testbed. * Use command `config chassis modules shutdown ` to shut down individual DPU * Use command `show chassis modules status` to show DPU status * Use command `config chassis modules startup ` to power up individual DPU @@ -618,7 +618,7 @@ Reboot Test Case for DPU: * Power on all the DPUs that were powered on before reboot using `config chassis modules startup ` * Wait for DPUs to be up * Use command `show chassis modules status` to get DPU status - * Get the number of DPU modules from PMON APIs - get_num_modules() + * Get the number of DPU modules from ansible inventory file for the testbed. #### Verify in * Switch @@ -642,7 +642,7 @@ root@sonic:/home/cisco# show chassis modules status ``` #### Pass/Fail Criteria - * Verify number of DPUs from api and number of DPUs shown in the cli output. + * Verify number of DPUs from inventory file for the testbed and number of DPUs shown in the cli output. ## Objectives of API Test Cases From bbaefd8a1dd7c211676a986335a569afdfd8b52b Mon Sep 17 00:00:00 2001 From: nissampa <99767762+nissampa@users.noreply.github.com> Date: Thu, 22 Aug 2024 15:14:15 -0700 Subject: [PATCH 32/32] Update Smartswitch-test-plan.md --- docs/testplan/Smartswitch-test-plan.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/testplan/Smartswitch-test-plan.md b/docs/testplan/Smartswitch-test-plan.md index 45ec58e204d..3083f9f8a77 100644 --- a/docs/testplan/Smartswitch-test-plan.md +++ b/docs/testplan/Smartswitch-test-plan.md @@ -321,7 +321,7 @@ root@sonic:/home/cisco# ### 1.5 Check midplane ip address between NPU and DPU #### Steps - * Get the number of DPU modules from PMON APIs - get_num_modules(). + * Get the number of DPU modules from from ansible inventory file for the testbed. * Get mid plane ip address for each DPU module from ansible inventory file for the testbed. #### Verify in