Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

ADC calibration should be done after setting the clock mode #124

Open
govert-overgaauw-ampel opened this issue Feb 23, 2024 · 0 comments
Open

Comments

@govert-overgaauw-ampel
Copy link

govert-overgaauw-ampel commented Feb 23, 2024

Hi,

I noticed on my board nucleo-G474-RE when connecting an ADC to ground with RC filter, that the readings were off by 50mV. I noticed that calibrating the ADC before setting the clock config (which the enable function of the HAL also does) results in wrong calibration value (almost max register value). Which resulted in 50 bits offset being applied to my readings. The ADC doesn't work correctly when the clock is higher than the maximum (60MHz), so before the clock mode settings are set the clock might be AHB clock. Calibration should be done before ADEN=1 but after setting the clock mode in the common ADC registers.

Easy fix might be to swap around calibrate_all() and apply_config() calls to calibrate after setting clocks (And other config options, but before enabling the ADC).

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant