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** A Tiny and Platform-Independent True Random Number Generator for _ any_ FPGA (and even ASICs).**
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+ [ ![ neoTRNG simulation] ( https://github.com/stnolting/neoTRNG/actions/workflows/main.yml/badge.svg )] ( https://github.com/stnolting/neoTRNG/actions/workflows/main.yml )
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[ ![ Release] ( https://img.shields.io/github/v/release/stnolting/neoTRNG )] ( https://github.com/stnolting/neoTRNG/releases )
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[ ![ License] ( https://img.shields.io/github/license/stnolting/neoTRNG )] ( https://github.com/stnolting/neoTRNG/blob/main/LICENSE )
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[ ![ DOI] ( https://zenodo.org/badge/430418414.svg )] ( https://zenodo.org/badge/latestdoi/430418414 )
@@ -347,6 +348,9 @@ The GHDL waveform data is stored to `sim/neoTRNG_tb.ghw` and can be viewed using
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neoTRNG/sim$ gtkwave neoTRNG_tb.ghw
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```
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+ A simple simulation run is executed by the project's
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+ [ ` neoTRNG-sim ` GitHub action workflow] ( https://github.com/stnolting/neoTRNG/actions ) .
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## References
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* Kumar, Sandeep S., et al. "The butterfly PUF protecting IP on every FPGA." 2008 IEEE International Workshop
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