Add missing files to testbench

Author: ultraembedded

spdif/testbench/makefile

@@ -3,10 +3,6 @@
 #########################################################
 SYSTEMC_HOME  ?= /usr/local/systemc-2.3.1
 
-GENERATE_PATH ?= ~/svn_vhdl/tools/sysc_wrap
-GENERATE_CMD  ?= python $(GENERATE_PATH)/generate.py
-GENERATE_ARGS ?=
-
 TRACE         ?= 1
 
 DUT_NAME       = spdif
@@ -46,13 +42,7 @@ EXE       = output.out
 #########################################################
 all: run
 
-tb_top.v: $(RTL_DUT)
-	$(GENERATE_CMD) $(RTL_DUT) $@ $(GENERATE_PATH)/tb_top.v.mk $(GENERATE_ARGS)
-
-$(DUT_NAME)_vpi.h: $(RTL_DUT)
-	$(GENERATE_CMD) $(RTL_DUT) $@ $(GENERATE_PATH)/dut_vpi.h.mk $(GENERATE_ARGS)
-
-%.o : %.cpp $(DUT_NAME)_vpi.h
+%.o : %.cpp
 	gcc -c $(INC_PATH) $(CFLAGS) $< -o $@
 
 $(VPI_OBJ).vpi: $(OBJ) 
@@ -64,8 +54,5 @@ $(EXE) : $(SRC_V)
 run: $(EXE) $(VPI_OBJ).vpi
 	vvp -M. -m$(VPI_OBJ) $(EXE) -vcd
 
-view:
-	gtkwave waveform.vcd gtksettings.sav  
-
 clean:
-	rm -rf $(OBJ) dut.vpi *.vcd *.out tb_top.v $(DUT_NAME)_vpi.h
+	rm -rf $(OBJ) dut.vpi *.vcd *.out

spdif/testbench/spdif_vpi.h

@@ -0,0 +1,48 @@
+#ifndef SPDIF_VPI_H
+#define SPDIF_VPI_H
+
+#include "sc_vpi_module.h"
+
+class spdif_vpi: public sc_vpi_module
+{
+public:
+    sc_in <bool> clk_i;
+    sc_in <bool> rst_i;
+    sc_in <bool> audio_clk_i;
+    sc_out <bool> spdif_o;
+    sc_in <sc_uint<32> > sample_i;
+    sc_out <bool> sample_req_o;
+
+    void read_outputs(void)
+    {
+        sc_vpi_module_read_output_int(spdif_o, "spdif_o");
+        sc_vpi_module_read_output_int(sample_req_o, "sample_req_o");
+    }
+    
+    void write_inputs(void)
+    {
+        sc_vpi_module_write_input_int(clk_i, "clk_i");
+        sc_vpi_module_write_input_int(rst_i, "rst_i");
+        sc_vpi_module_write_input_int(audio_clk_i, "audio_clk_i");
+        sc_vpi_module_write_input_int(sample_i, "sample_i");
+    }
+
+    spdif_vpi(sc_module_name name):  
+                                    sc_vpi_module(name)
+                                  , clk_i ("clk_i")
+                                  , rst_i ("rst_i")
+                                  , audio_clk_i ("audio_clk_i")
+                                  , spdif_o ("spdif_o")
+                                  , sample_i ("sample_i")
+                                  , sample_req_o ("sample_req_o")
+    { 
+        register_signal("clk_i");
+        register_signal("rst_i");
+        register_signal("audio_clk_i");
+        register_signal("spdif_o");
+        register_signal("sample_i");
+        register_signal("sample_req_o");
+    }
+};
+
+#endif

spdif/testbench/tb_top.v

@@ -0,0 +1,40 @@
+`timescale 1ns / 1ns
+
+//-----------------------------------------------------------------
+// Module:  Auto generated top
+//-----------------------------------------------------------------
+module tb_top();
+
+reg          clk_i;
+reg          rst_i;
+reg          audio_clk_i;
+wire         spdif_o;
+reg  [31:0]   sample_i;
+wire         sample_req_o;
+
+//-----------------------------------------------------------------
+// DUT
+//-----------------------------------------------------------------
+spdif dut
+(
+      .clk_i(clk_i)
+    , .rst_i(rst_i)
+    , .audio_clk_i(audio_clk_i)
+    , .spdif_o(spdif_o)
+    , .sample_i(sample_i)
+    , .sample_req_o(sample_req_o)
+);
+
+//-----------------------------------------------------------------
+// Trace
+//-----------------------------------------------------------------
+initial 
+begin 
+    if (`TRACE)
+    begin
+        $dumpfile("waveform.vcd");
+        $dumpvars(0,tb_top);
+    end
+end
+
+endmodule