xe: jit: codegen: limit comparison binary op SIMD

These operations use a flag register which forces SIMD16. This is
problematic when padding to 16 elements exceeds the size of the
allocated register buffer.

Author: atkassen

src/gpu/intel/jit/codegen/codegen.cpp

@@ -999,6 +999,12 @@ class expr_evaluator_t : public ir_visitor_t {
                 auto src0_op = eval(obj.a, a_out_op);
                 auto src1_op = eval(obj.b, b_out_op);
 
+                if ((src0_op.is_reg_buf_data()
+                            && src0_op.reg_buf_data().hs() != 0)
+                        || (src1_op.is_reg_buf_data()
+                                && src1_op.reg_buf_data().hs() != 0))
+                    mod.setExecSize(obj.type.elems());
+
                 ebinary(obj, mod, dst_op, src0_op, src1_op);
                 break;
             }