xe: conv: improve persistent cache creation time

Author: echeresh

src/gpu/intel/jit/conv/gen_convolution.cpp

@@ -179,6 +179,11 @@ class gen_convolution_t {
         conv_config_t cfg;
         layout_t zp_dst;
         if (data.zp_pd) zp_dst = layout_t(data.zp_pd->impl()->dst_md(), false);
+
+        if (primitive->cache_blob()) {
+            tiler->set_cur_index(primitive->version() - 1);
+        }
+
         for (int try_iter = 0; try_iter < max_tries; try_iter++) {
             try {
                 cfg = data.pd_cfg;
@@ -187,8 +192,6 @@ class gen_convolution_t {
                 cfg.set_tiler(tiler);
                 CHECK(init_cfg(cfg, primitive));
 
-                if (primitive->cache_blob() && try_iter != primitive->version())
-                    continue;
                 if (!tiler->is_grf_limit_ok(cfg)) continue;
 
                 ir_info() << "Configuration:" << std::endl;
@@ -256,7 +259,7 @@ class gen_convolution_t {
                     if (!tmp_kernels[i]) return status::runtime_error;
                 }
                 ok = true;
-                primitive->set_version(try_iter);
+                primitive->set_version(tiler->cur_index());
                 kernels_ = std::move(tmp_kernels);
                 break;
             } catch (ngen::out_of_registers_exception &err) {

src/gpu/intel/jit/conv/tiler.cpp

@@ -1262,6 +1262,8 @@ class conv_tuner_t {
         params_gen_.move_next();
     }
 
+    int cur_index() const { return params_gen_.cur_index(); }
+
     void print_all() const { params_gen_.print_all(); }
 
     static const primitive_info_t &get_primitive_info(
@@ -1448,6 +1450,16 @@ class conv_tiler_impl_t {
         return params_gen_.can_move_next();
     }
 
+    int cur_index() const {
+        if (is_tuning_mode()) return tuner_->cur_index();
+        return params_gen_.cur_index();
+    }
+
+    void set_cur_index(int idx) {
+        ir_assert(!is_tuning_mode());
+        return params_gen_.set_cur_index(idx);
+    }
+
     void set_params(conv_config_t &cfg) {
         init_regs(cfg);
         if (is_tuning_mode()) {
@@ -1595,6 +1607,14 @@ bool conv_tiler_t::can_move_next() const {
     return impl_->can_move_next();
 }
 
+int conv_tiler_t::cur_index() const {
+    return impl_->cur_index();
+}
+
+void conv_tiler_t::set_cur_index(int idx) {
+    impl_->set_cur_index(idx);
+}
+
 void conv_tiler_t::set_params(conv_config_t &cfg) {
     impl_->set_params(cfg);
 }

src/gpu/intel/jit/conv/tiler.hpp

@@ -42,6 +42,8 @@ class conv_tiler_t {
     int configs() const;
     bool is_tuning_mode() const;
     bool can_move_next() const;
+    int cur_index() const;
+    void set_cur_index(int idx);
     void set_params(conv_config_t &cfg);
     void notify_out_of_registers(const conv_config_t &cfg);
     bool is_grf_limit_ok(const conv_config_t &cfg) const;

src/gpu/intel/jit/ir/blocking.hpp

@@ -557,6 +557,11 @@ class params_generator_t {
 
     int cur_index() const { return cur_idx_; }
 
+    void set_cur_index(int idx) {
+        ir_assert(idx < configs());
+        cur_idx_ = idx;
+    }
+
     const blocking_params_t &cur_params() const { return at(cur_idx_); }
 
     const blocking_params_t &at(int idx) const {