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Merge pull request #3004 from AlexandreSinger/feature-models-cleanup
[LibArchFPGA] Updating Model Data Structures
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libs/libarchfpga/src/arch_check.cpp

+43-52
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libs/libarchfpga/src/arch_check.h

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@@ -26,7 +26,7 @@ extern "C" {
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* @param file architecture file
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* @param line line in the architecture file that generates the failure
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*/
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bool check_model_clocks(t_model* model, const char* file, uint32_t line);
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bool check_model_clocks(const t_model& model, const char* file, uint32_t line);
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/**
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* @brief Checks the correctness of the combinational sinks in the model inputs to outputs connections
@@ -35,7 +35,7 @@ bool check_model_clocks(t_model* model, const char* file, uint32_t line);
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* @param file architecture file
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* @param line line in the architecture file that generates the failure
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*/
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bool check_model_combinational_sinks(const t_model* model, const char* file, uint32_t line);
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bool check_model_combinational_sinks(const t_model& model, const char* file, uint32_t line);
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/**
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* @brief Checks whether the I/O ports can have timing specifications based on their connectivity.
@@ -47,7 +47,7 @@ bool check_model_combinational_sinks(const t_model* model, const char* file, uin
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* @param file architecture file
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* @param line line in the architecture file that generates the failure
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*/
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void warn_model_missing_timing(const t_model* model, const char* file, uint32_t line);
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void warn_model_missing_timing(const t_model& model, const char* file, uint32_t line);
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/**
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* @brief Checks the consistency of the mappings between a logical block and the corresponding physical tile.

libs/libarchfpga/src/arch_types.h

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@@ -18,18 +18,9 @@
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/* Value for UNDEFINED data */
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constexpr int UNDEFINED = -1;
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/** The total number of predefined blif models */
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constexpr int NUM_MODELS_IN_LIBRARY = 4;
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/* Maximum value for minimum channel width to avoid overflows of short data type. */
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constexpr int MAX_CHANNEL_WIDTH = 8000;
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/* Built-in library models */
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constexpr const char* MODEL_NAMES = ".names";
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constexpr const char* MODEL_LATCH = ".latch";
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constexpr const char* MODEL_INPUT = ".input";
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constexpr const char* MODEL_OUTPUT = ".output";
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enum class e_arch_format {
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VTR, ///<VTR-specific device XML format
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FPGAInterchange ///<FPGA Interchange device format

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