[SystemZ] Enable rematerialization for scalar loads (llvm#179838)

anoopkg6 · anoopkg6 · web-flow · commit 7c1d517ebe7a · 2026-02-17T15:28:58.000+01:00
We can avoid the unnecessary spill by marking loads as rematerializable and just directly loading from where the argument was originally passed on the stack. TargetTransformInfo::isReMaterializableImpl checks to make sure that any loads are MI.isDereferenceableInvariantLoad(), so we should be able to move the load down to the remat site. Related: [llvm#166774](llvm#166774) --------- Co-authored-by: anoopkg6 <anoopkg6@github.com>
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFP.td b/llvm/lib/Target/SystemZ/SystemZInstrFP.td
@@ -156,7 +156,8 @@ defm LoadStoreF128 : MVCLoadStore<load, f128, MVCImm, 15>;
 // Load instructions
 //===----------------------------------------------------------------------===//
 
-let canFoldAsLoad = 1, SimpleBDXLoad = 1, mayLoad = 1 in {
+let canFoldAsLoad = 1, SimpleBDXLoad = 1, mayLoad = 1,
+    isReMaterializable = 1  in {
   let isCodeGenOnly = 1 in
     // Reload f16 from 4-byte spill slot.
     defm LE16 : UnaryRXPair<"le", 0x78, 0xED64, z_load, FP16, 4>;
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -461,7 +461,8 @@ def LLGFI : InstAlias<"llgfi\t$R1, $RI1", (LLILF GR64:$R1, imm64lf32:$RI1)>;
 def LLGHI : InstAlias<"llghi\t$R1, $RI1", (LLILL GR64:$R1, imm64ll16:$RI1)>;
 
 // Register loads.
-let canFoldAsLoad = 1, SimpleBDXLoad = 1, mayLoad = 1 in {
+let canFoldAsLoad = 1, SimpleBDXLoad = 1, mayLoad = 1,
+    isReMaterializable = 1 in {
   // Expands to L, LY or LFH, depending on the choice of register.
   def LMux : UnaryRXYPseudo<"l", z_load, GRX32, 4>,
              Requires<[FeatureHighWord]>;
@@ -482,7 +483,7 @@ let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in {
   def LTG : UnaryRXY<"ltg", 0xE302, z_load, GR64, 8>;
 }
 
-let canFoldAsLoad = 1 in {
+let canFoldAsLoad = 1, isReMaterializable =1 in {
   def LRL  : UnaryRILPC<"lrl",  0xC4D, aligned_z_load, GR32>;
   def LGRL : UnaryRILPC<"lgrl", 0xC48, aligned_z_load, GR64>;
 }
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrVector.td b/llvm/lib/Target/SystemZ/SystemZInstrVector.td
@@ -145,7 +145,8 @@ let Predicates = [FeatureVector] in {
   // LEY and LDY offer full 20-bit displacement fields.  It's often better
   // to use those instructions rather than force a 20-bit displacement
   // into a GPR temporary.
-  let mayLoad = 1, SimpleBDXLoad = 1, canFoldAsLoad = 1 in {
+  let mayLoad = 1, SimpleBDXLoad = 1, canFoldAsLoad = 1,
+      isReMaterializable = 1 in {
     def VL16 : UnaryAliasVRX<z_load, v16hb, bdxaddr12pair>;
     def VL32 : UnaryAliasVRX<z_load, v32sb, bdxaddr12pair>;
     def VL64 : UnaryAliasVRX<z_load, v64db, bdxaddr12pair>;
diff --git a/llvm/test/CodeGen/SystemZ/builtin-setjmp-spills.ll b/llvm/test/CodeGen/SystemZ/builtin-setjmp-spills.ll
@@ -1,7 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; Simulate register pressure around setjmp call and check all virtual registers
-; are saved to stack before setjmp call and restored from stack after the call.
-; And these registers are not live across the setjmp call.
+; Simulate register pressure around setjmp call.
+; With load materialization, pr#179838, it is no longer necessary to check if
+; all virtual registers are saved to stack before setjmp call because of load
+; rematerialization of the global variables.
 ; setjmp storing to jmp_buf.
 ; Return address in slot 2.
 ; Stack Pointer in slot 4.
@@ -47,16 +48,16 @@ define signext i32 @func() {
 ; CHECK-NEXT:    .cfi_offset %r13, -56
 ; CHECK-NEXT:    .cfi_offset %r14, -48
 ; CHECK-NEXT:    .cfi_offset %r15, -40
-; CHECK-NEXT:    aghi %r15, -384
-; CHECK-NEXT:    .cfi_def_cfa_offset 544
-; CHECK-NEXT:    std %f8, 376(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f9, 368(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f10, 360(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f11, 352(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f12, 344(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f13, 336(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f14, 328(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f15, 320(%r15) # 8-byte Spill
+; CHECK-NEXT:    aghi %r15, -64
+; CHECK-NEXT:    .cfi_def_cfa_offset 224
+; CHECK-NEXT:    std %f8, 56(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f9, 48(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f10, 40(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f11, 32(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f12, 24(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f13, 16(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f14, 8(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f15, 0(%r15) # 8-byte Spill
 ; CHECK-NEXT:    .cfi_offset %f8, -168
 ; CHECK-NEXT:    .cfi_offset %f9, -176
 ; CHECK-NEXT:    .cfi_offset %f10, -184
@@ -67,64 +68,44 @@ define signext i32 @func() {
 ; CHECK-NEXT:    .cfi_offset %f15, -224
 ; CHECK-NEXT:    lgrl %r1, t@GOT
 ; CHECK-NEXT:    lgrl %r2, s@GOT
-; CHECK-NEXT:    stg %r1, 312(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
 ; CHECK-NEXT:    lgrl %r1, r@GOT
 ; CHECK-NEXT:    lgrl %r3, q@GOT
-; CHECK-NEXT:    stg %r2, 304(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
 ; CHECK-NEXT:    lgrl %r2, p@GOT
-; CHECK-NEXT:    stg %r1, 296(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
-; CHECK-NEXT:    stg %r3, 288(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r3), 1
 ; CHECK-NEXT:    lgrl %r1, o@GOT
-; CHECK-NEXT:    stg %r2, 280(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
 ; CHECK-NEXT:    lgrl %r2, n@GOT
 ; CHECK-NEXT:    lgrl %r3, m@GOT
-; CHECK-NEXT:    stg %r1, 272(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
 ; CHECK-NEXT:    lgrl %r1, l@GOT
-; CHECK-NEXT:    stg %r2, 264(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
-; CHECK-NEXT:    stg %r3, 256(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r3), 1
 ; CHECK-NEXT:    lgrl %r2, k@GOT
-; CHECK-NEXT:    stg %r1, 248(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
 ; CHECK-NEXT:    lgrl %r1, j@GOT
 ; CHECK-NEXT:    lgrl %r3, i@GOT
-; CHECK-NEXT:    stg %r2, 240(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
 ; CHECK-NEXT:    lgrl %r2, h@GOT
-; CHECK-NEXT:    stg %r1, 232(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
-; CHECK-NEXT:    stg %r3, 224(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r3), 1
 ; CHECK-NEXT:    lgrl %r1, g@GOT
-; CHECK-NEXT:    stg %r2, 216(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
 ; CHECK-NEXT:    lgrl %r2, f@GOT
 ; CHECK-NEXT:    lgrl %r3, e@GOT
-; CHECK-NEXT:    stg %r1, 208(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
 ; CHECK-NEXT:    lgrl %r1, d@GOT
-; CHECK-NEXT:    stg %r2, 200(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
-; CHECK-NEXT:    stg %r3, 192(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r3), 1
 ; CHECK-NEXT:    lgrl %r2, c@GOT
-; CHECK-NEXT:    stg %r1, 184(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r1), 1
 ; CHECK-NEXT:    lgrl %r3, b@GOT
 ; CHECK-NEXT:    lgrl %r4, a@GOT
-; CHECK-NEXT:    stg %r2, 176(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r2), 1
 ; CHECK-NEXT:    lgrl %r1, buf@GOT
-; CHECK-NEXT:    stg %r3, 168(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r3), 1
-; CHECK-NEXT:    stg %r4, 160(%r15) # 8-byte Spill
 ; CHECK-NEXT:    mvhi 0(%r4), 1
 ; CHECK-NEXT:    larl %r0, .LBB0_2
 ; CHECK-NEXT:    stg %r0, 8(%r1)
@@ -136,56 +117,56 @@ define signext i32 @func() {
 ; CHECK-NEXT:    # %entry
 ; CHECK-NEXT:    lhi %r0, 1
 ; CHECK-NEXT:  .LBB0_3: # %entry
-; CHECK-NEXT:    lg %r1, 160(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, a@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 168(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, b@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 176(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, c@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 184(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, d@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 192(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, e@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 200(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, f@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 208(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, g@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 216(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, h@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 224(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, i@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 232(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, j@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 240(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, k@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 248(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, l@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 256(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, m@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 264(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, n@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 272(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, o@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 280(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, p@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 288(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, q@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 296(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, r@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 304(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, s@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
-; CHECK-NEXT:    lg %r1, 312(%r15) # 8-byte Reload
+; CHECK-NEXT:    lgrl %r1, t@GOT
 ; CHECK-NEXT:    a %r0, 0(%r1)
 ; CHECK-NEXT:    lgfr %r2, %r0
-; CHECK-NEXT:    ld %f8, 376(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f9, 368(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f10, 360(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f11, 352(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f12, 344(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f13, 336(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f14, 328(%r15) # 8-byte Reload
-; CHECK-NEXT:    ld %f15, 320(%r15) # 8-byte Reload
-; CHECK-NEXT:    lmg %r6, %r15, 432(%r15)
+; CHECK-NEXT:    ld %f8, 56(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f9, 48(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f10, 40(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f11, 32(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f12, 24(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f13, 16(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f14, 8(%r15) # 8-byte Reload
+; CHECK-NEXT:    ld %f15, 0(%r15) # 8-byte Reload
+; CHECK-NEXT:    lmg %r6, %r15, 112(%r15)
 ; CHECK-NEXT:    br %r14
 entry:
   store i32 1, ptr @t, align 4
diff --git a/llvm/test/CodeGen/SystemZ/fp-move-02.ll b/llvm/test/CodeGen/SystemZ/fp-move-02.ll
@@ -147,18 +147,18 @@ define void @f10(double %extra) {
 ; CHECK-NEXT:    .cfi_offset %r13, -56
 ; CHECK-NEXT:    .cfi_offset %r14, -48
 ; CHECK-NEXT:    .cfi_offset %r15, -40
-; CHECK-NEXT:    aghi %r15, -184
-; CHECK-NEXT:    .cfi_def_cfa_offset 344
+; CHECK-NEXT:    aghi %r15, -176
+; CHECK-NEXT:    .cfi_def_cfa_offset 336
 ; CHECK-NEXT:    lgrl %r1, dptr@GOT
 ; CHECK-NEXT:    ldr %f1, %f0
 ; CHECK-NEXT:    adb %f1, 0(%r1)
 ; CHECK-NEXT:    ldr %f2, %f0
 ; CHECK-NEXT:    adb %f2, 0(%r1)
 ; CHECK-NEXT:    ldr %f3, %f0
 ; CHECK-NEXT:    adb %f3, 0(%r1)
-; CHECK-NEXT:    std %f1, 176(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f2, 168(%r15) # 8-byte Spill
-; CHECK-NEXT:    std %f3, 160(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f1, 168(%r15) # 8-byte Spill
+; CHECK-NEXT:    std %f2, 160(%r15) # 8-byte Spill
+; CHECK-NEXT:    lgdr %r11, %f3
 ; CHECK-NEXT:    ldr %f1, %f0
 ; CHECK-NEXT:    adb %f1, 0(%r1)
 ; CHECK-NEXT:    ldr %f2, %f0
@@ -176,28 +176,28 @@ define void @f10(double %extra) {
 ; CHECK-NEXT:    ldr %f2, %f0
 ; CHECK-NEXT:    adb %f2, 0(%r1)
 ; CHECK-NEXT:    adb %f0, 0(%r1)
-; CHECK-NEXT:    lgrl %r6, iptr@GOT
-; CHECK-NEXT:    lgdr %r13, %f1
-; CHECK-NEXT:    lgdr %r12, %f2
-; CHECK-NEXT:    lgdr %r11, %f0
+; CHECK-NEXT:    lgdr %r6, %f1
+; CHECK-NEXT:    lgdr %r13, %f2
+; CHECK-NEXT:    lgdr %r12, %f0
 ; CHECK-NEXT:  .LBB9_1: # %loop
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    brasl %r14, foo@PLT
 ; CHECK-NEXT:    lgr %r0, %r2
-; CHECK-NEXT:    og %r0, 176(%r15) # 8-byte Folded Reload
 ; CHECK-NEXT:    og %r0, 168(%r15) # 8-byte Folded Reload
 ; CHECK-NEXT:    og %r0, 160(%r15) # 8-byte Folded Reload
+; CHECK-NEXT:    ogr %r0, %r11
 ; CHECK-NEXT:    ogr %r0, %r10
 ; CHECK-NEXT:    ogr %r0, %r9
 ; CHECK-NEXT:    ogr %r0, %r8
 ; CHECK-NEXT:    ogr %r0, %r7
+; CHECK-NEXT:    ogr %r0, %r6
 ; CHECK-NEXT:    ogr %r0, %r13
 ; CHECK-NEXT:    ogr %r0, %r12
-; CHECK-NEXT:    ogr %r0, %r11
-; CHECK-NEXT:    stg %r0, 0(%r6)
+; CHECK-NEXT:    lgrl %r1, iptr@GOT
+; CHECK-NEXT:    stg %r0, 0(%r1)
 ; CHECK-NEXT:    cgijlh %r2, 1, .LBB9_1
 ; CHECK-NEXT:  # %bb.2: # %exit
-; CHECK-NEXT:    lmg %r6, %r15, 232(%r15)
+; CHECK-NEXT:    lmg %r6, %r15, 224(%r15)
 ; CHECK-NEXT:    br %r14
 entry:
   %double0 = load volatile double, ptr@dptr
diff --git a/llvm/test/CodeGen/SystemZ/remat.ll b/llvm/test/CodeGen/SystemZ/remat.ll
