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[SYCL][E2E] Disable fill_any_size.cpp on FPGA #12867

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[SYCL][E2E] Disable fill_any_size.cpp on FPGA

[SYCL][E2E] Disable fill_any_size.cpp on FPGA #12867

Run time

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Job Run time
detect_changes / Decide which tests could be affected by the changes
6s
build / Build + LIT
14m 59s
e2e / Intel GEN12 Graphics with Level Zero
42m 20s
57m 25s