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Fznamznon
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premanandrao
authored
[SYCL] Option to disable alloca address space for sret arguments (#17976)
Recent community change llvm/llvm-project#114062 enabled the use of alloca address space for sret arguments. This causes several issues for sycl, particularly for the SPIR target where this leads to invalid address-space-casts from the local address space. The new option -foffload-use-alloca-addrspace-for-srets is TRUE by default (and produces the current community behavior) and is set to FALSE in sycl device compilation modes (where the prior behavior is retained). The commit also reverts some test changes made to reflect the current community behavior. --------- Co-authored-by: Premanand M Rao <[email protected]>
1 parent a53dacf commit 7175536

24 files changed

+361
-206
lines changed

‎clang/include/clang/Basic/CodeGenOptions.def

+5
Original file line numberDiff line numberDiff line change
@@ -480,6 +480,11 @@ CODEGENOPT(DisableSYCLEarlyOpts, 1, 0)
480480
/// which do not contain "user" code.
481481
CODEGENOPT(OptimizeSYCLFramework, 1, 0)
482482

483+
/// Whether to use alloca address space for `sret` arguments.
484+
/// TODO: This option can be removed once a fix goes in that can
485+
/// work with the community changes for using the alloca address space.
486+
CODEGENOPT(UseAllocaASForSrets, 1, 0)
487+
483488
/// Turn on fp64 partial emulation for kernels with only fp64 conversion
484489
/// operations and no fp64 computation operations (requires Intel GPU backend
485490
/// supporting fp64 partial emulation)

‎clang/include/clang/Driver/Options.td

+7
Original file line numberDiff line numberDiff line change
@@ -8830,6 +8830,13 @@ def fsycl_is_native_cpu : Flag<["-"], "fsycl-is-native-cpu">,
88308830
HelpText<"Perform device compilation for Native CPU.">,
88318831
Visibility<[CC1Option]>,
88328832
MarshallingInfoFlag<LangOpts<"SYCLIsNativeCPU">>;
8833+
// TODO: This option can be removed once a fix goes in that can
8834+
// work with the community changes for using the alloca address space.
8835+
defm offload_use_alloca_addrspace_for_srets : BoolFOption<"offload-use-alloca-addrspace-for-srets",
8836+
CodeGenOpts<"UseAllocaASForSrets">,
8837+
DefaultTrue,
8838+
PosFlag<SetTrue, [], [CC1Option], "Use alloca address space for sret arguments for offloading targets">,
8839+
NegFlag<SetFalse>>;
88338840

88348841
} // let Visibility = [CC1Option]
88358842

‎clang/lib/CodeGen/ABIInfoImpl.cpp

+23-7
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,16 @@ ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
2121
// Records with non-trivial destructors/copy-constructors should not be
2222
// passed by value.
2323
if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
24-
return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
24+
return getNaturalAlignIndirect(Ty,
25+
getCodeGenOpts().UseAllocaASForSrets
26+
? getDataLayout().getAllocaAddrSpace()
27+
: CGT.getTargetAddressSpace(Ty),
2528
RAA == CGCXXABI::RAA_DirectInMemory);
2629

27-
return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
30+
return getNaturalAlignIndirect(Ty,
31+
getCodeGenOpts().UseAllocaASForSrets
32+
? getDataLayout().getAllocaAddrSpace()
33+
: CGT.getTargetAddressSpace(Ty));
2834
}
2935

3036
// Treat an enum type as its underlying type.
@@ -37,7 +43,10 @@ ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
3743
Context.getTypeSize(Context.getTargetInfo().hasInt128Type()
3844
? Context.Int128Ty
3945
: Context.LongLongTy))
40-
return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
46+
return getNaturalAlignIndirect(Ty,
47+
getCodeGenOpts().UseAllocaASForSrets
48+
? getDataLayout().getAllocaAddrSpace()
49+
: CGT.getTargetAddressSpace(Ty));
4150

4251
return (isPromotableIntegerTypeForABI(Ty)
4352
? ABIArgInfo::getExtend(Ty, CGT.ConvertType(Ty))
@@ -49,7 +58,10 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
4958
return ABIArgInfo::getIgnore();
5059

5160
if (isAggregateTypeForABI(RetTy))
52-
return getNaturalAlignIndirect(RetTy, getDataLayout().getAllocaAddrSpace());
61+
return getNaturalAlignIndirect(RetTy,
62+
getCodeGenOpts().UseAllocaASForSrets
63+
? getDataLayout().getAllocaAddrSpace()
64+
: CGT.getTargetAddressSpace(RetTy));
5365

5466
// Treat an enum type as its underlying type.
5567
if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
@@ -61,7 +73,9 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
6173
? getContext().Int128Ty
6274
: getContext().LongLongTy))
6375
return getNaturalAlignIndirect(RetTy,
64-
getDataLayout().getAllocaAddrSpace());
76+
getCodeGenOpts().UseAllocaASForSrets
77+
? getDataLayout().getAllocaAddrSpace()
78+
: CGT.getTargetAddressSpace(RetTy));
6579

6680
return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
6781
: ABIArgInfo::getDirect());
@@ -122,14 +136,16 @@ CGCXXABI::RecordArgABI CodeGen::getRecordArgABI(QualType T, CGCXXABI &CXXABI) {
122136
}
123137

124138
bool CodeGen::classifyReturnType(const CGCXXABI &CXXABI, CGFunctionInfo &FI,
125-
const ABIInfo &Info) {
139+
const ABIInfo &Info, CodeGenTypes &CGT) {
126140
QualType Ty = FI.getReturnType();
127141

128142
if (const auto *RT = Ty->getAs<RecordType>())
129143
if (!isa<CXXRecordDecl>(RT->getDecl()) &&
130144
!RT->getDecl()->canPassInRegisters()) {
131145
FI.getReturnInfo() = Info.getNaturalAlignIndirect(
132-
Ty, Info.getDataLayout().getAllocaAddrSpace());
146+
Ty, Info.getCodeGenOpts().UseAllocaASForSrets
147+
? Info.getDataLayout().getAllocaAddrSpace()
148+
: CGT.getTargetAddressSpace(Ty));
133149
return true;
134150
}
135151

‎clang/lib/CodeGen/ABIInfoImpl.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, CGCXXABI &CXXABI);
4646
CGCXXABI::RecordArgABI getRecordArgABI(QualType T, CGCXXABI &CXXABI);
4747

4848
bool classifyReturnType(const CGCXXABI &CXXABI, CGFunctionInfo &FI,
49-
const ABIInfo &Info);
49+
const ABIInfo &Info, CodeGenTypes &CGT);
5050

5151
/// Pass transparent unions as if they were the type of the first element. Sema
5252
/// should ensure that all elements of the union have the same "machine type".

‎clang/lib/CodeGen/CGCall.cpp

+26-8
Original file line numberDiff line numberDiff line change
@@ -1719,8 +1719,12 @@ CodeGenTypes::GetFunctionType(const CGFunctionInfo &FI) {
17191719

17201720
// Add type for sret argument.
17211721
if (IRFunctionArgs.hasSRetArg()) {
1722-
ArgTypes[IRFunctionArgs.getSRetArgNo()] = llvm::PointerType::get(
1723-
getLLVMContext(), FI.getReturnInfo().getIndirectAddrSpace());
1722+
QualType Ret = FI.getReturnType();
1723+
unsigned AddressSpace = CGM.getCodeGenOpts().UseAllocaASForSrets
1724+
? FI.getReturnInfo().getIndirectAddrSpace()
1725+
: CGM.getTypes().getTargetAddressSpace(Ret);
1726+
ArgTypes[IRFunctionArgs.getSRetArgNo()] =
1727+
llvm::PointerType::get(getLLVMContext(), AddressSpace);
17241728
}
17251729

17261730
// Add type for inalloca argument.
@@ -5309,6 +5313,7 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
53095313
// If the call returns a temporary with struct return, create a temporary
53105314
// alloca to hold the result, unless one is given to us.
53115315
Address SRetPtr = Address::invalid();
5316+
RawAddress SRetAlloca = RawAddress::invalid();
53125317
llvm::Value *UnusedReturnSizePtr = nullptr;
53135318
if (RetAI.isIndirect() || RetAI.isInAlloca() || RetAI.isCoerceAndExpand()) {
53145319
// For virtual function pointer thunks and musttail calls, we must always
@@ -5322,19 +5327,27 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
53225327
} else if (!ReturnValue.isNull()) {
53235328
SRetPtr = ReturnValue.getAddress();
53245329
} else {
5325-
SRetPtr = CreateMemTempWithoutCast(RetTy, "tmp");
5330+
SRetPtr = CGM.getCodeGenOpts().UseAllocaASForSrets
5331+
? CreateMemTempWithoutCast(RetTy, "tmp")
5332+
: CreateMemTemp(RetTy, "tmp", &SRetAlloca);
53265333
if (HaveInsertPoint() && ReturnValue.isUnused()) {
53275334
llvm::TypeSize size =
53285335
CGM.getDataLayout().getTypeAllocSize(ConvertTypeForMem(RetTy));
5329-
UnusedReturnSizePtr = EmitLifetimeStart(size, SRetPtr.getBasePointer());
5336+
if (CGM.getCodeGenOpts().UseAllocaASForSrets)
5337+
UnusedReturnSizePtr =
5338+
EmitLifetimeStart(size, SRetPtr.getBasePointer());
5339+
else
5340+
UnusedReturnSizePtr =
5341+
EmitLifetimeStart(size, SRetAlloca.getPointer());
53305342
}
53315343
}
53325344
if (IRFunctionArgs.hasSRetArg()) {
53335345
// A mismatch between the allocated return value's AS and the target's
53345346
// chosen IndirectAS can happen e.g. when passing the this pointer through
53355347
// a chain involving stores to / loads from the DefaultAS; we address this
53365348
// here, symmetrically with the handling we have for normal pointer args.
5337-
if (SRetPtr.getAddressSpace() != RetAI.getIndirectAddrSpace()) {
5349+
if (CGM.getCodeGenOpts().UseAllocaASForSrets &&
5350+
(SRetPtr.getAddressSpace() != RetAI.getIndirectAddrSpace())) {
53385351
llvm::Value *V = SRetPtr.getBasePointer();
53395352
LangAS SAS = getLangASFromTargetAS(SRetPtr.getAddressSpace());
53405353
LangAS DAS = getLangASFromTargetAS(RetAI.getIndirectAddrSpace());
@@ -5916,9 +5929,14 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
59165929
// can't depend on being inside of an ExprWithCleanups, so we need to manually
59175930
// pop this cleanup later on. Being eager about this is OK, since this
59185931
// temporary is 'invisible' outside of the callee.
5919-
if (UnusedReturnSizePtr)
5920-
pushFullExprCleanup<CallLifetimeEnd>(NormalEHLifetimeMarker, SRetPtr,
5921-
UnusedReturnSizePtr);
5932+
if (UnusedReturnSizePtr) {
5933+
if (CGM.getCodeGenOpts().UseAllocaASForSrets)
5934+
pushFullExprCleanup<CallLifetimeEnd>(NormalEHLifetimeMarker, SRetPtr,
5935+
UnusedReturnSizePtr);
5936+
else
5937+
pushFullExprCleanup<CallLifetimeEnd>(NormalEHLifetimeMarker, SRetAlloca,
5938+
UnusedReturnSizePtr);
5939+
}
59225940

59235941
llvm::BasicBlock *InvokeDest = CannotThrow ? nullptr : getInvokeDest();
59245942

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

+8-4
Original file line numberDiff line numberDiff line change
@@ -1349,10 +1349,14 @@ bool ItaniumCXXABI::classifyReturnType(CGFunctionInfo &FI) const {
13491349

13501350
// If C++ prohibits us from making a copy, return by address.
13511351
if (!RD->canPassInRegisters()) {
1352-
auto Align = CGM.getContext().getTypeAlignInChars(FI.getReturnType());
1353-
FI.getReturnInfo() = ABIArgInfo::getIndirect(
1354-
Align, /*AddrSpace=*/CGM.getDataLayout().getAllocaAddrSpace(),
1355-
/*ByVal=*/false);
1352+
QualType Ret = FI.getReturnType();
1353+
auto Align = CGM.getContext().getTypeAlignInChars(Ret);
1354+
unsigned AddressSpace = CGM.getCodeGenOpts().UseAllocaASForSrets
1355+
? CGM.getDataLayout().getAllocaAddrSpace()
1356+
: CGM.getTypes().getTargetAddressSpace(Ret);
1357+
FI.getReturnInfo() =
1358+
ABIArgInfo::getIndirect(Align, /*AddrSpace=*/AddressSpace,
1359+
/*ByVal=*/false);
13561360
return true;
13571361
}
13581362
return false;

‎clang/lib/CodeGen/MicrosoftCXXABI.cpp

+8-4
Original file line numberDiff line numberDiff line change
@@ -1172,10 +1172,14 @@ bool MicrosoftCXXABI::classifyReturnType(CGFunctionInfo &FI) const {
11721172
bool isIndirectReturn = !isTrivialForABI || FI.isInstanceMethod();
11731173

11741174
if (isIndirectReturn) {
1175-
CharUnits Align = CGM.getContext().getTypeAlignInChars(FI.getReturnType());
1176-
FI.getReturnInfo() = ABIArgInfo::getIndirect(
1177-
Align, /*AddrSpace=*/CGM.getDataLayout().getAllocaAddrSpace(),
1178-
/*ByVal=*/false);
1175+
QualType Ret = FI.getReturnType();
1176+
CharUnits Align = CGM.getContext().getTypeAlignInChars(Ret);
1177+
unsigned AddressSpace = CGM.getCodeGenOpts().UseAllocaASForSrets
1178+
? CGM.getDataLayout().getAllocaAddrSpace()
1179+
: CGM.getTypes().getTargetAddressSpace(Ret);
1180+
FI.getReturnInfo() =
1181+
ABIArgInfo::getIndirect(Align, /*AddrSpace=*/AddressSpace,
1182+
/*ByVal=*/false);
11791183

11801184
// MSVC always passes `this` before the `sret` parameter.
11811185
FI.getReturnInfo().setSRetAfterThis(FI.isInstanceMethod());

‎clang/lib/CodeGen/Targets/AArch64.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ class AArch64ABIInfo : public ABIInfo {
6060
SmallVectorImpl<llvm::Type *> &Flattened) const;
6161

6262
void computeInfo(CGFunctionInfo &FI) const override {
63-
if (!::classifyReturnType(getCXXABI(), FI, *this))
63+
if (!::classifyReturnType(getCXXABI(), FI, *this, CGT))
6464
FI.getReturnInfo() =
6565
classifyReturnType(FI.getReturnType(), FI.isVariadic());
6666

‎clang/lib/CodeGen/Targets/ARM.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -232,7 +232,7 @@ void WindowsARMTargetCodeGenInfo::setTargetAttributes(
232232
}
233233

234234
void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
235-
if (!::classifyReturnType(getCXXABI(), FI, *this))
235+
if (!::classifyReturnType(getCXXABI(), FI, *this, CGT))
236236
FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), FI.isVariadic(),
237237
FI.getCallingConvention());
238238

‎clang/lib/CodeGen/Targets/SPIR.cpp

+13-3
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,10 @@ ABIArgInfo CommonSPIRABIInfo::classifyKernelArgumentType(QualType Ty) const {
5151
}
5252
// Pass all aggregate types allowed by Sema by value.
5353
if (isAggregateTypeForABI(Ty))
54-
return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace());
54+
return getNaturalAlignIndirect(Ty,
55+
getCodeGenOpts().UseAllocaASForSrets
56+
? getDataLayout().getAllocaAddrSpace()
57+
: CGT.getTargetAddressSpace(Ty));
5558
}
5659

5760
return DefaultABIInfo::classifyArgumentType(Ty);
@@ -129,7 +132,11 @@ ABIArgInfo CommonSPIRABIInfo::classifyRegcallArgumentType(QualType Ty) const {
129132
// Records with non-trivial destructors/copy-constructors should not be
130133
// passed by value.
131134
if (auto RAA = getRecordArgABI(Ty, getCXXABI()))
132-
return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
135+
return getNaturalAlignIndirect(Ty,
136+
getCodeGenOpts().UseAllocaASForSrets
137+
? getDataLayout().getAllocaAddrSpace()
138+
: CGT.getTargetAddressSpace(Ty),
139+
RAA == CGCXXABI::RAA_DirectInMemory);
133140

134141
// Ignore empty structs/unions.
135142
if (isEmptyRecord(getContext(), Ty, true))
@@ -321,7 +328,10 @@ ABIArgInfo SPIRVABIInfo::classifyArgumentType(QualType Ty) const {
321328
// Records with non-trivial destructors/copy-constructors should not be
322329
// passed by value.
323330
if (auto RAA = getRecordArgABI(Ty, getCXXABI()))
324-
return getNaturalAlignIndirect(Ty, getDataLayout().getAllocaAddrSpace(),
331+
return getNaturalAlignIndirect(Ty,
332+
getCodeGenOpts().UseAllocaASForSrets
333+
? getDataLayout().getAllocaAddrSpace()
334+
: CGT.getTargetAddressSpace(Ty),
325335
RAA == CGCXXABI::RAA_DirectInMemory);
326336

327337
if (const RecordType *RT = Ty->getAs<RecordType>()) {

‎clang/lib/CodeGen/Targets/X86.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -970,7 +970,7 @@ void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const {
970970
} else
971971
State.FreeRegs = DefaultNumRegisterParameters;
972972

973-
if (!::classifyReturnType(getCXXABI(), FI, *this)) {
973+
if (!::classifyReturnType(getCXXABI(), FI, *this, CGT)) {
974974
FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), State);
975975
} else if (FI.getReturnInfo().isIndirect()) {
976976
// The C++ ABI is not aware of register usage, so we have to check if the
@@ -2980,7 +2980,7 @@ void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
29802980
unsigned FreeSSERegs = IsRegCall ? 16 : 8;
29812981
unsigned NeededInt = 0, NeededSSE = 0, MaxVectorWidth = 0;
29822982

2983-
if (!::classifyReturnType(getCXXABI(), FI, *this)) {
2983+
if (!::classifyReturnType(getCXXABI(), FI, *this, CGT)) {
29842984
if (IsRegCall && FI.getReturnType()->getTypePtr()->isRecordType() &&
29852985
!FI.getReturnType()->getTypePtr()->isUnionType()) {
29862986
FI.getReturnInfo() = classifyRegCallStructType(

‎clang/lib/Driver/ToolChains/Clang.cpp

+12-4
Original file line numberDiff line numberDiff line change
@@ -5651,7 +5651,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
56515651
// We want to compile sycl kernels.
56525652
CmdArgs.push_back("-fsycl-is-device");
56535653
CmdArgs.push_back("-fdeclare-spirv-builtins");
5654-
5654+
56555655
// Set O2 optimization level by default
56565656
if (!Args.getLastArg(options::OPT_O_Group))
56575657
CmdArgs.push_back("-O2");
@@ -5983,10 +5983,14 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
59835983
// are provided.
59845984
TC.addClangWarningOptions(CmdArgs);
59855985

5986-
// FIXME: Subclass ToolChain for SPIR/SPIR-V and move this to
5987-
// addClangWarningOptions.
5988-
if (Triple.isSPIROrSPIRV())
5986+
if (Triple.isSPIROrSPIRV()) {
5987+
// FIXME: Subclass ToolChain for SPIR/SPIR-V and move this to
5988+
// addClangWarningOptions.
59895989
CmdArgs.push_back("-Wspir-compat");
5990+
// Disable this option for SPIR targets.
5991+
// TODO: This needs to be re-enabled once we have a real fix.
5992+
CmdArgs.push_back("-fno-offload-use-alloca-addrspace-for-srets");
5993+
}
59905994

59915995
// Select the appropriate action.
59925996
RewriteKind rewriteKind = RK_None;
@@ -6295,6 +6299,10 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
62956299
Args.addOptOutFlag(CmdArgs, options::OPT_foptimize_sibling_calls,
62966300
options::OPT_fno_optimize_sibling_calls);
62976301

6302+
Args.addOptOutFlag(CmdArgs,
6303+
options::OPT_foffload_use_alloca_addrspace_for_srets,
6304+
options::OPT_fno_offload_use_alloca_addrspace_for_srets);
6305+
62986306
RenderFloatingPointOptions(TC, D, isOptimizationLevelFast(Args), Args,
62996307
CmdArgs, JA, NoOffloadFP32PrecDiv,
63006308
NoOffloadFP32PrecSqrt);

‎clang/test/CodeGenSYCL/regcall-cc-test.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -333,7 +333,7 @@ struct NonCopyable {
333333
// CHECK-DAG: %struct.NonCopyable = type { i32 }
334334

335335
SYCL_DEVICE int __regcall bar(NonCopyable x) {
336-
// CHECK-DAG: define dso_local x86_regcallcc noundef i32 @_Z15__regcall3__bar11NonCopyable(ptr noundef byval(%struct.NonCopyable) align 4 %x)
336+
// CHECK-DAG: define dso_local x86_regcallcc noundef i32 @_Z15__regcall3__bar11NonCopyable(ptr noundef %x)
337337
return x.a;
338338
}
339339

‎clang/test/Driver/sycl-device.cpp

+12
Original file line numberDiff line numberDiff line change
@@ -58,3 +58,15 @@
5858
// PHASES-PREPROC-DEPS: 0: input, {{.*}}, c++, (device-sycl)
5959
// PHASES-PROPROC-DEPS: 1: preprocessor, {0}, dependencies, (device-sycl)
6060
// PHASES-PREPROC-DEPS: 2: offload, "device-sycl (spir64-unknown-unknown)" {1}, none
61+
62+
/// Check that "-fno-offload-use-alloca-addrspace-for-srets" is not set by
63+
/// default on the command-line in a non-sycl compilation.
64+
// RUN: %clang -### %s 2>&1 \
65+
// RUN: | FileCheck -check-prefix=CHECK-ALLOCA-ADDRSPACE %s
66+
// CHECK-ALLOCA-ADDRSPACE-NOT: clang{{.*}} "-fno-offload-use-alloca-addrspace-for-srets"
67+
68+
/// Check that "-fno-offload-use-alloca-addrspace-for-srets" is set if it is
69+
/// not specified on the command-line by the user with -fsycl
70+
// RUN: %clang -### -fsycl %s 2>&1 \
71+
// RUN: | FileCheck -check-prefix=CHECK-NO-ALLOCA-ADDRSPACE %s
72+
// CHECK-NO-ALLOCA-ADDRSPACE: clang{{.*}} "-fno-offload-use-alloca-addrspace-for-srets"

‎sycl/cts_exclude_filter/compfails

-2
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,2 @@
11
# Please use "#" to add comments here.
22
# Do not delete the file even if it's empty.
3-
# CMPLRLLVM-66370
4-
hierarchical

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