Remove obsolete ops and passes (Xilinx#618)

* Remove obsolete ops and passes

* rm tests

Author: fifield

mlir/include/air/Conversion/AIRPipeline.h

@@ -477,19 +477,6 @@ def AIRSplitDevices : Pass<"air-split-devices", "ModuleOp"> {
   ];
 }
 
-def AIRPipelineToAffine : Pass<"air-pipeline-to-affine", "ModuleOp"> {
-  let summary = "Lower air.pipeline stages to affine.if";
-  let constructor = "xilinx::air::createAIRPipelineToAffinePass()";
-  let description =  [{
-    Lower air.pipeline stages to affine.if
-  }];
-  let options = [
-    Option<"clLoweringType", "lowering-type", "std::string", 
-          /*default=*/"\"buffers\"",
-          "Type of lowering to use for core-to-core communication. Can be 'buffer' or 'getput'">
-  ];
-}
-
 def InsertEmptyLaunchOverHerd : Pass<"air-insert-launch-and-segment-around-herd", "ModuleOp"> {
   let summary = "Insert segment and launch ops around herd op";
   let constructor = "xilinx::air::createInsertEmptyLaunchOverHerdPass()";

mlir/include/air/Conversion/Passes.td

@@ -244,90 +244,6 @@ def air_HerdTerminatorOp : air_Op<"herd_terminator", [HasParent<"HerdOp">,
   let assemblyFormat = "attr-dict";
 }
 
-def air_HerdPipelineOp : air_Op<"pipeline", [HasParent<"HerdOp">,
-                                             AffineScope]>,
-                          Arguments<(ins)>,
-                          Results<(outs)> {
-  let summary = "Define a pipeline";
-  let description = [{
-    Define a pipeline within an AIR Herd.
-  }];
-
-  let regions = (region SizedRegion<1>:$body);
-  let hasVerifier = 1;
-  let assemblyFormat = [{
-    attr-dict-with-keyword $body
-  }];
-  let extraClassDeclaration = [{
-    // Return a vector of the air.pipeline.stage ops for this pipeline
-    SmallVector<PipelineStageOp,8> getStages();
-  }];
-}
-
-def air_PipelineStageOp : air_Op<"pipeline.stage", [HasParent<"HerdPipelineOp">]>,
-    Arguments<(ins Variadic<AnyType>:$opers)>, Results<(outs Variadic<AnyType>:$results)> {
-  let summary = "Pipeline stage";
-  let regions = (region SizedRegion<1>:$body);
-  let description = [{
-    Pipeline stage.
-  }];
-  let hasCustomAssemblyFormat = 1;
-  let extraClassDeclaration = [{
-    // Return the offset of this stage in the pipeline"
-    unsigned getStageId();
-  }];
-}
-
-def air_PipelineYieldOp : air_Op<"pipeline.yield", [HasParent<"PipelineStageOp">,
-                                                    Pure, ReturnLike, Terminator]>,
-                                 Arguments<(ins Variadic<AnyType>:$opers)>, Results<(outs)> {
-  let summary = "Yield for air pipeline stages.";
-  let description = [{
-    A terminator operation for regions that appear in the body of
-    `air.pipeline.stage` operation. The operation takes variable number of
-    operands and produces no results. The operand number and types must
-    match the signature of the `air.pipeline` that contains the operation.
-  }];
-  let assemblyFormat = [{
-    ($opers^)? attr-dict (`:` type($opers)^)?
-  }];
-}
-
-def air_PipelinePutOp : air_Op<"pipeline.put", []>,
-    Arguments<(ins AnyType:$dst0, AnyType:$dst1, Variadic<AnyType>:$opers)>, Results<(outs)> {
-  let summary = "Put for air pipeline stages.";
-  let description = [{
-    Experimental operation to represent copying data to another tile.
-    Currently used internally by air-to-aie pass during pipeline lowering.
-  }];
-  let assemblyFormat = [{
-    $dst0 $dst1 (`,` $opers^)? attr-dict `:` type($dst0) `,` type($dst1) (`,` type($opers)^)?
-  }];
-}
-
-def air_PipelineGetOp : air_Op<"pipeline.get", []>,
-    Arguments<(ins AnyType:$src0, AnyType:$src1)>, Results<(outs Variadic<AnyType>:$results)> {
-  let summary = "Get for air pipeline stages.";
-  let description = [{
-    Experimental operation to represent copying data from another tile.
-    Currently used internally by air-to-aie pass during pipeline lowering.
-  }];
-  let assemblyFormat = [{
-    $src0 $src1 attr-dict `:` type($src0) `,` type($src1) `->` type($results)
-  }];
-}
-
-def air_PipelineTerminatorOp : air_Op<"pipeline.terminator", [HasParent<"HerdPipelineOp">,
-                                          Pure, Terminator]>,
-    Arguments<(ins Variadic<AnyType>:$opers)>, Results<(outs)> {
-  let summary = "Terminator for air pipeline regions.";
-  let description = [{
-    A terminator operation for regions that appear in the body of
-    `air.pipeline` operation.
-  }];
-  let assemblyFormat = "attr-dict ($opers^ `:` type($opers))?";
-}
-
 def air_DmaMemcpyNdOp: air_Op<"dma_memcpy_nd",
                         [air_AsyncOpInterface,
                          air_MemcpyInterface,

mlir/include/air/Dialect/AIR/AIR.td

@@ -1099,11 +1099,6 @@ def AIRExamplePass : Pass<"air-example-pass", "ModuleOp"> {
   let constructor = "xilinx::air::createAIRExamplePass()";
 }
 
-def AIRSpecializeDma : Pass<"air-specialize-dma", "ModuleOp"> {
-  let summary = "Specialize dma operations";
-  let constructor = "xilinx::air::createAIRSpecializeDma()";
-}
-
 def AIRSpecializeDmaBroadcast : Pass<"air-specialize-dma-broadcast", "ModuleOp"> {
   let summary = "Specialize dma operations for broadcast pattern";
   let constructor = "xilinx::air::createAIRSpecializeDmaBroadcast()";
@@ -1114,11 +1109,6 @@ def AIRSpecializeDmaBroadcast : Pass<"air-specialize-dma-broadcast", "ModuleOp">
   }];
 }
 
-def AIRPromoteUniformL1Dma : Pass<"air-promote-dma", "ModuleOp"> {
-  let summary = "promote uniform dma operations";
-  let constructor = "xilinx::air::createAIRPromoteUniformL1Dma()";
-}
-
 def AIRLinalgNamePass : Pass<"air-linalg-name", "ModuleOp"> {
   let summary = "Give linalg ops a LinalgTransformMarker string attribute if they don't already have one";
   let constructor = "xilinx::air::createAIRLinalgNamePass()";

mlir/include/air/Transform/Passes.td

@@ -7,7 +7,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "air/Conversion/AIRLoweringPass.h"
-#include "air/Conversion/AIRPipeline.h"
 #include "air/Dialect/AIR/AIRDialect.h"
 #include "air/Dialect/AIRRt/AIRRtDialect.h"
 #include "air/Dialect/AIRRt/AIRRtOps.h"
@@ -279,59 +278,6 @@ class AIRHerdConversion : public ConversionPattern {
   }
 };
 
-class AIRPipelineConversion : public ConversionPattern {
-public:
-  explicit AIRPipelineConversion(MLIRContext *context)
-      : ConversionPattern(air::HerdPipelineOp::getOperationName(), 1, context) {
-  }
-
-  LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef<Value> operands,
-                  ConversionPatternRewriter &rewriter) const override {
-    auto pipeOp = cast<air::HerdPipelineOp>(op);
-    Block &bb = pipeOp.getBody().front();
-    rewriter.eraseOp(pipeOp.getBody().back().getTerminator());
-    bb.getOperations().splice(Block::iterator(op), bb.getOperations());
-    rewriter.eraseOp(op);
-    return success();
-  }
-};
-
-class AIRPipelinePutConversion : public ConversionPattern {
-public:
-  explicit AIRPipelinePutConversion(MLIRContext *context)
-      : ConversionPattern(air::PipelinePutOp::getOperationName(), 1, context) {}
-
-  LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef<Value> operands,
-                  ConversionPatternRewriter &rewriter) const override {
-    rewriter.eraseOp(op);
-    return success();
-  }
-};
-
-class AIRPipelineGetConversion : public ConversionPattern {
-public:
-  explicit AIRPipelineGetConversion(MLIRContext *context)
-      : ConversionPattern(air::PipelineGetOp::getOperationName(), 1, context) {}
-
-  LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef<Value> operands,
-                  ConversionPatternRewriter &rewriter) const override {
-    auto getOp = cast<air::PipelineGetOp>(op);
-    SmallVector<Value, 2> gets;
-    for (auto r : getOp.getResults()) {
-      if (auto ty = llvm::dyn_cast<RankedTensorType>(r.getType()))
-        gets.push_back(rewriter.create<bufferization::AllocTensorOp>(
-            op->getLoc(), ty, ValueRange{}));
-      else
-        return failure();
-    }
-    rewriter.replaceOp(op, gets);
-    return success();
-  }
-};
-
 class AIRWaitAllToAIRRtConversion : public OpConversionPattern<air::WaitAllOp> {
 public:
   using OpConversionPattern<air::WaitAllOp>::OpConversionPattern;
@@ -1136,32 +1082,6 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
       signalPassFailure();
     }
 
-    // Replace the PipelineStageOps first, followed by the
-    // HerdPipelineOps, then run the rest of the patterns.
-    // This avoids creating invalid intermediate code with respect
-    // to the herd->pipeline->stages nesting requirements.
-
-    // PipelineStageOp conversion
-    RewritePatternSet air_pipe_stage_patterns(context);
-    air_pipe_stage_patterns.insert<air::AIRPipeStageConversion>(
-        context, air::AIRPipeStageConversion::LoweringType::AllocBuffer);
-    if (failed(applyPartialConversion(module, target,
-                                      std::move(air_pipe_stage_patterns)))) {
-      emitError(UnknownLoc::get(context),
-                "error lowering air.pipeline.stage\n");
-      signalPassFailure();
-    }
-
-    // HerdPipelineOp conversion
-    RewritePatternSet air_pipe_patterns(context);
-    air_pipe_patterns.insert<AIRPipelineConversion, AIRPipelineGetConversion,
-                             AIRPipelinePutConversion>(context);
-    if (failed(applyPartialConversion(module, target,
-                                      std::move(air_pipe_patterns)))) {
-      emitError(UnknownLoc::get(context), "error lowering air.pipeline\n");
-      signalPassFailure();
-    }
-
     // DMA and HerdOp conversion
     RewritePatternSet air_patterns(context);
 
@@ -1528,62 +1448,6 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
   }
 };
 
-class AIRPipelineToAffinePass
-    : public air::impl::AIRPipelineToAffineBase<AIRPipelineToAffinePass> {
-
-public:
-  AIRPipelineToAffinePass() = default;
-  AIRPipelineToAffinePass(const AIRPipelineToAffinePass &pass) {}
-
-  void getDependentDialects(::mlir::DialectRegistry &registry) const override {
-    registry.insert<affine::AffineDialect>();
-  }
-
-  void runOnOperation() override {
-    auto module = getOperation();
-    auto context = module.getContext();
-
-    ConversionTarget target(*context);
-
-    target.addLegalDialect<
-        LLVM::LLVMDialect, func::FuncDialect, arith::ArithDialect,
-        affine::AffineDialect, scf::SCFDialect, linalg::LinalgDialect,
-        memref::MemRefDialect, bufferization::BufferizationDialect,
-        airrt::AIRRtDialect, air::airDialect>();
-
-    target.addIllegalOp<air::PipelineStageOp, air::PipelineYieldOp>();
-
-    // PipelineStageOp conversion
-    RewritePatternSet air_pipe_stage_patterns(context);
-    auto loweringType =
-        air::AIRPipeStageConversion::LoweringType::PipelineGetPut;
-    if (clLoweringType == "buffer")
-      loweringType = air::AIRPipeStageConversion::LoweringType::AllocBuffer;
-    air_pipe_stage_patterns.insert<air::AIRPipeStageConversion>(context,
-                                                                loweringType);
-    if (failed(applyPartialConversion(module, target,
-                                      std::move(air_pipe_stage_patterns)))) {
-      emitError(UnknownLoc::get(context),
-                "error lowering air.pipeline.stage\n");
-      signalPassFailure();
-    }
-
-    SmallVector<Operation *, 8> pipelines;
-    module.walk([&](air::HerdPipelineOp p) { pipelines.push_back(p); });
-
-    for (auto p : pipelines) {
-      auto pipeOp = cast<air::HerdPipelineOp>(p);
-      OpBuilder b(p);
-      Block &bb = pipeOp.getBody().front();
-      IRMapping remap;
-      bb.getTerminator()->erase();
-      for (auto &o : bb)
-        b.clone(o, remap);
-      p->erase();
-    }
-  }
-};
-
 } // namespace
 
 namespace xilinx {
@@ -1593,9 +1457,5 @@ std::unique_ptr<mlir::Pass> createAIRLoweringPass() {
   return std::make_unique<AIRLoweringPass>();
 }
 
-std::unique_ptr<mlir::Pass> createAIRPipelineToAffinePass() {
-  return std::make_unique<AIRPipelineToAffinePass>();
-}
-
 } // namespace air
 } // namespace xilinx