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Purge assertions in codebase (Xilinx#922)
* Purge assertions in codebase * Fixup faulty error condition * Purge assertions * Fixup typo * Purge assertions * Purge assertions * Purge assertions * Fixup typo * Purge assertions
1 parent dd70528 commit 7301aa0

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11 files changed

+344
-231
lines changed

11 files changed

+344
-231
lines changed

‎mlir/include/air/Util/Dependency.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -364,8 +364,10 @@ class dependencyTracer {
364364
dep_tracing_mode = 'w';
365365
else if (dep_type == "WAW/WAR")
366366
dep_tracing_mode = 'n';
367-
else
368-
assert(false && "Unknown dependency type");
367+
else {
368+
sink_air_op->emitOpError("Unknown dependency type.");
369+
return;
370+
}
369371

370372
// Detect deps
371373
for (auto operand : operands) {

‎mlir/lib/Conversion/AIRLoweringPass.cpp‎

Lines changed: 40 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -485,7 +485,11 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
485485
if (!launch) {
486486
if (auto for_op = thisOp->getParentOfType<scf::ForOp>()) {
487487
// Broadcast channel control loop
488-
assert(theOtherOp->hasAttr("tile"));
488+
if (!theOtherOp->hasAttr("tile")) {
489+
theOtherOp->emitOpError(
490+
"missing 'tile' attribute as compile-time flag.");
491+
return nullptr;
492+
}
489493
ArrayAttr tiles = theOtherOp->getAttrOfType<ArrayAttr>("tile");
490494
auto tile_dict = llvm::cast<DictionaryAttr>(tiles[0]);
491495
auto row = llvm::cast<IntegerAttr>(tile_dict.get("row")).getInt();
@@ -527,8 +531,11 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
527531
strides.push_back(one_idx);
528532
}
529533
// Stride field implicit last element one
530-
[[maybe_unused]] auto lastStrideConst = getConstantIntValue(strides.back());
531-
assert(lastStrideConst && "the last stride is not static");
534+
auto lastStrideConst = getConstantIntValue(strides.back());
535+
if (!lastStrideConst) {
536+
thisOp->emitOpError("last stride is not static.");
537+
return nullptr;
538+
}
532539

533540
strides.pop_back();
534541
while (offsets.size() < 4) {
@@ -863,13 +870,27 @@ LogicalResult ScfParToAffineForConversion(Operation *op) {
863870

864871
llvm::SmallSet<Operation *, 8> erased;
865872
f.walk([&](scf::ParallelOp scf_par) {
866-
for (auto v : scf_par.getLowerBound()) {
867-
assert(dyn_cast<arith::ConstantIndexOp>(v.getDefiningOp()).value() == 0);
868-
(void)v;
873+
if (!llvm::all_of(scf_par.getLowerBound(), [](Value v) {
874+
auto constV = getConstantIntValue(v);
875+
if (!constV)
876+
return false;
877+
if (*constV != 0)
878+
return false;
879+
return true;
880+
})) {
881+
scf_par->emitOpError("has non-zero lower bound.");
882+
return;
869883
}
870-
for (auto v : scf_par.getStep()) {
871-
assert(dyn_cast<arith::ConstantIndexOp>(v.getDefiningOp()).value() == 1);
872-
(void)v;
884+
if (!llvm::all_of(scf_par.getStep(), [](Value v) {
885+
auto constV = getConstantIntValue(v);
886+
if (!constV)
887+
return false;
888+
if (*constV != 1)
889+
return false;
890+
return true;
891+
})) {
892+
scf_par->emitOpError("has non-unit step size.");
893+
return;
873894
}
874895
std::vector<int> par_sizes = {};
875896
for (auto v : scf_par.getUpperBound())
@@ -1177,14 +1198,14 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
11771198
remapLoop(src_for, dst_for, remap);
11781199
} else if (src_par && dst_par) {
11791200
remapLoop(src_par, dst_par, remap);
1180-
} else
1181-
assert(false);
1201+
}
11821202
}
11831203

11841204
// Get parent loop nest
11851205
std::vector<Operation *> getParentLoopNest(Operation *op,
11861206
Operation *outermost) const {
1187-
assert(op);
1207+
if (!op)
1208+
return std::vector<Operation *>();
11881209
std::vector<Operation *> output;
11891210
for (auto parent = op->getParentOp(); parent != outermost;
11901211
parent = parent->getParentOp()) {
@@ -1283,11 +1304,14 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
12831304
for (unsigned i = 1; i < bucket.size(); i++) {
12841305
IRMapping remap;
12851306
Operation *chan_op = getInnerMostMemcpyFromLoopNest(bucket[i]);
1286-
assert(chan_op);
1307+
if (!chan_op) {
1308+
func->emitOpError("memcpy in innermost loop body not found.");
1309+
return;
1310+
}
12871311
auto src_loop_nest = getParentLoopNest(chan_op, bucket[i]);
1288-
assert(src_loop_nest.size() == dst_loop_nest.size());
1289-
for (unsigned i = 0; i < src_loop_nest.size(); i++) {
1290-
remapLoop(src_loop_nest[i], dst_loop_nest[i], remap);
1312+
for (auto [src_loop, dst_loop] :
1313+
llvm::zip_equal(src_loop_nest, dst_loop_nest)) {
1314+
remapLoop(src_loop, dst_loop, remap);
12911315
}
12921316
auto yield_op = dst_loop_nest[0]
12931317
->getRegions()

‎mlir/lib/Conversion/AIRRtToNpuPass.cpp‎

Lines changed: 18 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -492,8 +492,7 @@ bool violatesAIE2WrapLimit(airrt::DmaMemcpyNdOp dma) {
492492
// Detected wrap that goes beyond the AIE2 hardware limit.
493493
if (*const_val >= AIE2_WRAP_UPPER_BOUNDS[i])
494494
return true;
495-
} else
496-
assert(false && "has non-static wrap");
495+
}
497496
}
498497
return false;
499498
}
@@ -1177,8 +1176,6 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
11771176
return;
11781177
}
11791178
});
1180-
if (!containsOnlyWaitAll)
1181-
assert(false && "found scf.parallel op at this IR, NYI");
11821179
builder.setInsertionPoint(par_op);
11831180
auto newWaitAll = builder.create<airrt::WaitAllOp>(
11841181
par_op->getLoc(), airrt::EventType::get(par_op->getContext()),
@@ -1364,11 +1361,15 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
13641361
int srcRowIndex = srcTile.rowIndex();
13651362
int dstColIndex = destTile.colIndex();
13661363
int dstRowIndex = destTile.rowIndex();
1367-
assert((target_model.isCoreTile(srcColIndex, srcRowIndex) ||
1368-
target_model.isMemTile(srcColIndex, srcRowIndex)) &&
1369-
"unsupported trace src");
1370-
assert(target_model.isShimNOCTile(dstColIndex, dstRowIndex) &&
1371-
"unsupported trace dest");
1364+
if (!target_model.isCoreTile(srcColIndex, srcRowIndex) &&
1365+
!target_model.isMemTile(srcColIndex, srcRowIndex)) {
1366+
pktFlow->emitOpError("unsupported trace src.");
1367+
return;
1368+
}
1369+
if (!target_model.isShimNOCTile(dstColIndex, dstRowIndex)) {
1370+
pktFlow->emitOpError("unsupported trace dest.");
1371+
return;
1372+
}
13721373
int pkt_type = 0;
13731374
if (target_model.isMemTile(srcColIndex, srcRowIndex))
13741375
pkt_type = 3;
@@ -1452,7 +1453,10 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
14521453
if (chanToIdMap.count(dstColIndex) == 0)
14531454
chanToIdMap[dstColIndex] = 15;
14541455
int bdID = chanToIdMap[dstColIndex];
1455-
assert(bdID >= 4 && "run out of bd_id");
1456+
if (bdID < 4) {
1457+
pktFlow->emitOpError("runs out of bd_id.");
1458+
return;
1459+
}
14561460

14571461
builder.create<AIEX::NpuWriteBdOp>(
14581462
builder.getUnknownLoc(), dstColIndex, bdID, buff_size, buff_offset,
@@ -1479,8 +1483,10 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
14791483
address = 0x1D204;
14801484
else if (destPort.channel == 1)
14811485
address = 0x1D20C;
1482-
else
1483-
assert(false && "unknown trace dest");
1486+
else {
1487+
pktFlow->emitOpError("unknown trace dest.");
1488+
return;
1489+
}
14841490
builder.create<AIEX::NpuWrite32Op>(
14851491
builder.getUnknownLoc(), address, bdID, nullptr,
14861492
builder.getIntegerAttr(builder.getI32Type(), dstColIndex),

‎mlir/lib/Conversion/AIRToAIEPass.cpp‎

Lines changed: 20 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -238,9 +238,6 @@ void outlineAIECores(OpBuilder &builder, AIE::DeviceOp aie_device,
238238
// mem
239239
builder.setInsertionPoint(core);
240240

241-
assert((h.getBody().getBlocks().size() == 1) &&
242-
"Launch body can only contain one Block");
243-
244241
// generate the aie.core body
245242
//
246243
OpBuilder core_builder(core);
@@ -724,7 +721,6 @@ struct LowerScfTokenPattern : public OpRewritePattern<scf::ForOp> {
724721

725722
// remove air.async.token from the yield op
726723
auto yield = new_region.back().getTerminator();
727-
assert(isa<scf::YieldOp>(yield));
728724
rewriter.setInsertionPoint(yield);
729725
SmallVector<Value, 4> yield_operands;
730726
SmallVector<Value, 4> token_operands;
@@ -831,7 +827,10 @@ struct AllocL2BuffersPattern : public OpRewritePattern<memref::AllocOp> {
831827
return failure();
832828

833829
// Allocation of L2 memrefs in segment to buffer ops
834-
assert(memrefToTileMap.count(alloc));
830+
if (!memrefToTileMap.count(alloc)) {
831+
alloc->emitOpError("alloc not found in memrefToTileMap.");
832+
return failure();
833+
}
835834
AIE::TileOp tile = memrefToTileMap[alloc];
836835
if (!tile)
837836
return failure();
@@ -2076,7 +2075,10 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
20762075
memcpy_flows.push_back(flow);
20772076
} else if (auto putget = dyn_cast<air::ChannelInterface>(o)) {
20782077
auto chan = air::getChannelDeclarationThroughSymbol(putget);
2079-
assert(chan);
2078+
if (!chan) {
2079+
putget->emitOpError("failed to get air.channel declaration.");
2080+
return failure();
2081+
}
20802082
std::string chan_name = putget.getChanName().str();
20812083
// Check if new pair
20822084
bool found_in_flows = false;
@@ -2444,9 +2446,11 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
24442446
tile_side_memcpy.getOperation())) {
24452447
memref_ty =
24462448
llvm::cast<MemRefType>(tile_side_chan.getMemref().getType());
2449+
} else {
2450+
op->emitOpError(
2451+
"Memref type for shim DMA allocation not initialized!");
2452+
return;
24472453
}
2448-
assert(memref_ty != nullptr &&
2449-
"Memref type for shim DMA allocation not initialized!");
24502454

24512455
// Label airrt.dmamemcpynd ops with symbolic ref. to shimdmaalloc op
24522456
auto dmaop_labeled = labelAIRDmaOpsWithMetadata(
@@ -2950,7 +2954,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
29502954
for (auto &alloc : tileDmaAlloc.mm2s_allocs) {
29512955
if (alloc.foundAlloc(x, y)) {
29522956
for (auto o : alloc.memcpyOps) {
2953-
assert(o);
2957+
if (!o)
2958+
continue;
29542959
auto memcpyOpIf = dyn_cast<air::MemcpyInterface>(o);
29552960
if (!memcpyOpIf)
29562961
return o->emitOpError("does not have air::MemcpyInterface");
@@ -2962,7 +2967,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
29622967
for (auto &alloc : tileDmaAlloc.s2mm_allocs) {
29632968
if (alloc.foundAlloc(x, y)) {
29642969
for (auto o : alloc.memcpyOps) {
2965-
assert(o);
2970+
if (!o)
2971+
continue;
29662972
auto memcpyOpIf = dyn_cast<air::MemcpyInterface>(o);
29672973
if (!memcpyOpIf)
29682974
return o->emitOpError("does not have air::MemcpyInterface");
@@ -3038,7 +3044,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
30383044
if (tile.isShimTile())
30393045
push_back_if_unique<AIE::TileOp>(shimtiles, tile);
30403046
else {
3041-
assert(false);
3047+
tile->emitOpError(
3048+
"tile is logged for shim DMA allocation, but is not shim tile.");
30423049
return failure();
30433050
}
30443051
}
@@ -3047,7 +3054,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
30473054
if (tile.isMemTile())
30483055
push_back_if_unique<AIE::TileOp>(memTileTiles, tile);
30493056
else {
3050-
assert(false);
3057+
tile->emitOpError(
3058+
"tile is logged for memtile DMA allocation, but is not memtile.");
30513059
return failure();
30523060
}
30533061
}

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