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adds semantics and supporting code for several x86 instructions #1622

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Merged
merged 2 commits into from
Mar 17, 2025

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@ivg ivg commented Mar 12, 2025

Adds the following instructions:

  • shufps
  • pmuldq
  • [v]packusdw
  • [v]packuswb
  • [v]packssdw
  • [v]packsswb
  • vzeroupper
  • movntd
  • xchgb

The generated code for signed and unsigned saturation (the pack* family of instructions) is thoroughly optimized to minimize branching and comparison, which negatively affects analysis performance. Both signed and unsigned saturation are implemented as a lisp primitive that generates pure code with a single ite instruction and any comparisons are made with zero, i.e., no inequalities.

To following extra changes support the added instructions:

  1. [NEW] Extend x86 CPU family definition with 8-bit registers, e.g.,
    AL,BL,CL,DL,AH,BH,CH,DH,SIL,DIL,BPL, and SPL.
  2. [NEW] Added EFLAGS and RFLAGS aliases to the set of flag registers. 3) [NEW] It is now possible to use bool registers in the aliasing
    specifications.
  3. [NEW] Added system and control register flags.
  4. [FIX] Fixed a bug with incorrect reification of higher parts of
    aliased registers.
  5. [NEW] Added a dolist macro to Primus Lisp.
  6. [NEW] Added the unquote primitive to Primus Lisp. 8) [NEW] Added the cast-saturate primitive to Primus Lisp. 9) [NEW] Improved BIL code generation in case of empty if statements.

@ivg ivg force-pushed the x86-semantics branch 13 times, most recently from 89904c6 to 7d0b4e1 Compare March 14, 2025 19:52
Adds the following instructions:
 - shufps
 - pmuldq
 - [v]packusdw
 - [v]packuswb
 - [v]packssdw
 - [v]packsswb
 - vzeroupper
 - movntd
 - xchgb

The generated code for signed and unsigned saturation (the pack*
family of instructions) is thoroughly optimized to minimize branching
and comparison, which negatively affects analysis performance. Both
signed and unsigned saturation are implemented as a lisp primitive
that generates pure code with a single ite instruction and any
comparisons are made with zero, i.e., no inequalities.

To following extra changes support the added instructions:

1) [NEW] Extend x86 CPU family definition with 8-bit registers, e.g.,
   AL,BL,CL,DL,AH,BH,CH,DH,SIL,DIL,BPL, and SPL.
2) [NEW] Added EFLAGS and RFLAGS aliases to the set of flag registers.
3) [NEW] It is now possible to use bool registers in the aliasing
   specifications.
4) [NEW] Added system and control register flags.
5) [FIX] Fixed a bug with incorrect reification of higher parts of
   aliased registers.
6) [NEW] Added a `dolist` macro to Primus Lisp.
7) [NEW] Added the `unquote` primitive to Primus Lisp.
8) [NEW] Added the `cast-saturate` primitive to Primus Lisp.
9) [NEW] Improved BIL code generation in case of empty if statements.
@ivg ivg self-assigned this Mar 17, 2025
@ivg ivg requested a review from GeorgeLS March 17, 2025 14:19
mjkoo
mjkoo previously approved these changes Mar 17, 2025
Co-authored-by: Maxwell Koo <[email protected]>
@ivg ivg merged commit a795ddd into master Mar 17, 2025
7 checks passed
@ivg ivg deleted the x86-semantics branch April 22, 2025 13:57
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2 participants