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Rename NEON 8bit floating point from fpm8x8_t to mfp8x8_t
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According to the ACLE[1]

[1]ARM-software/acle#323
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CarolineConcatto committed Jul 31, 2024
1 parent e5bcd7f commit 6dd7d08
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Showing 14 changed files with 98 additions and 63 deletions.
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
//===--- arm_fpm8.td - ARM FPM8 compiler interface ------------------------===//
//===--- arm_mfp8.td - ARM MFP8 compiler interface ------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the TableGen definitions from which the ARM BF16 header
// This file defines the TableGen definitions from which the ARM MFP8 header
// file will be generated.
//
//===----------------------------------------------------------------------===//
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4 changes: 2 additions & 2 deletions clang/include/clang/Basic/arm_neon_incl.td
Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,7 @@ def OP_UNAVAILABLE : Operation {
// h: half-float
// d: double
// b: bfloat16
// m: fpm8
// m: mfp8
//
// Typespec modifiers
// ------------------
Expand All @@ -241,7 +241,7 @@ def OP_UNAVAILABLE : Operation {
// B: change to BFloat16
// P: change to polynomial category.
// p: change polynomial to equivalent integer category. Otherwise nop.
// M: change to Fpm8.
// M: change to MFloat8.
//
// >: double element width (vector size unchanged).
// <: half element width (vector size unchanged).
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2 changes: 1 addition & 1 deletion clang/lib/Basic/Targets/AArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -543,7 +543,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__ARM_FEATURE_BF16_SCALAR_ARITHMETIC", "1");
}

if (HasFpm8) {
if (HasMFloat8) {
Builder.defineMacro("__ARM_FEATURE_FP8", "1");
}
if ((FPU & SveMode) && HasBFloat16) {
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2 changes: 1 addition & 1 deletion clang/lib/Basic/Targets/ARM.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -661,7 +661,7 @@ bool ARMTargetInfo::hasBFloat16Type() const {
return HasBFloat16 || (FPU && !SoftFloat);
}

bool ARMTargetInfo::hasFpm8Type() const { return true; }
bool ARMTargetInfo::hasMFloat8Type() const { return true; }

bool ARMTargetInfo::isValidCPUName(StringRef Name) const {
return Name == "generic" ||
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2 changes: 1 addition & 1 deletion clang/lib/Basic/Targets/ARM.h
Original file line number Diff line number Diff line change
Expand Up @@ -176,7 +176,7 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {

bool hasBFloat16Type() const override;

bool hasFpm8Type() const override;
bool hasMFloat8Type() const override;

bool isValidCPUName(StringRef Name) const override;
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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2 changes: 2 additions & 0 deletions clang/lib/CodeGen/CGBuiltin.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6230,6 +6230,8 @@ static llvm::FixedVectorType *GetNeonType(CodeGenFunction *CGF,
case NeonTypeFlags::Int8:
case NeonTypeFlags::Poly8:
return llvm::FixedVectorType::get(CGF->Int8Ty, V1Ty ? 1 : (8 << IsQuad));
case NeonTypeFlags::MFloat8:
return llvm::FixedVectorType::get(CGF->MFloat8Ty, V1Ty ? 1 : (8 << IsQuad));
case NeonTypeFlags::Int16:
case NeonTypeFlags::Poly16:
return llvm::FixedVectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad));
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6 changes: 3 additions & 3 deletions clang/lib/Headers/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -391,8 +391,8 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
clang_generate_header(-gen-arm-sme-header arm_sme.td arm_sme.h)
# Generate arm_bf16.h
clang_generate_header(-gen-arm-bf16 arm_bf16.td arm_bf16.h)
# Generate arm_fpm8.h
clang_generate_header(-gen-arm-fpm8 arm_fpm8.td arm_fpm8.h)
# Generate arm_mfp8.h
clang_generate_header(-gen-arm-mfp8 arm_mfp8.td arm_mfp8.h)
# Generate arm_mve.h
clang_generate_header(-gen-arm-mve-header arm_mve.td arm_mve.h)
# Generate arm_cde.h
Expand All @@ -416,7 +416,7 @@ if(ARM IN_LIST LLVM_TARGETS_TO_BUILD OR AArch64 IN_LIST LLVM_TARGETS_TO_BUILD)
"${CMAKE_CURRENT_BINARY_DIR}/arm_sme.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_bf16.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_vector_types.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_fpm8.h"
"${CMAKE_CURRENT_BINARY_DIR}/arm_mfp8.h"
)
endif()
if(RISCV IN_LIST LLVM_TARGETS_TO_BUILD)
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2 changes: 2 additions & 0 deletions clang/lib/Sema/SemaARM.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -385,6 +385,8 @@ static QualType getNeonEltType(NeonTypeFlags Flags, ASTContext &Context,
return Context.DoubleTy;
case NeonTypeFlags::BFloat16:
return Context.BFloat16Ty;
case NeonTypeFlags::MFloat8:
return Context.MFloat8Ty;
}
llvm_unreachable("Invalid NeonTypeFlag!");
}
Expand Down
6 changes: 3 additions & 3 deletions clang/lib/Sema/SemaExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10215,9 +10215,9 @@ QualType Sema::CheckVectorOperands(ExprResult &LHS, ExprResult &RHS,
const VectorType *RHSVecType = RHSType->getAs<VectorType>();
assert(LHSVecType || RHSVecType);

// Any operation with Fpm8 type is only possible with C intrinsics
if ((LHSVecType && LHSVecType->getElementType()->isFpm8Type()) ||
(RHSVecType && RHSVecType->getElementType()->isFpm8Type()))
// Any operation with MFloat8 type is only possible with C intrinsics
if ((LHSVecType && LHSVecType->getElementType()->isMFloat8Type()) ||
(RHSVecType && RHSVecType->getElementType()->isMFloat8Type()))
return InvalidOperands(Loc, LHS, RHS);

// AltiVec-style "vector bool op vector bool" combinations are allowed
Expand Down
49 changes: 31 additions & 18 deletions clang/test/CodeGen/arm-mfp8.c
Original file line number Diff line number Diff line change
Expand Up @@ -4,18 +4,31 @@

// REQUIRES: aarch64-registered-target

// CHECK-LABEL: define dso_local i8 @func1n(
// CHECK-SAME: i8 noundef [[MFP8:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[MFP8_ADDR:%.*]] = alloca i8, align 1
// CHECK-NEXT: [[F1N:%.*]] = alloca [10 x i8], align 1
// CHECK-NEXT: store i8 [[MFP8]], ptr [[MFP8_ADDR]], align 1
// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[MFP8_ADDR]], align 1
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-NEXT: store i8 [[TMP0]], ptr [[ARRAYIDX]], align 1
// CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1
// CHECK-NEXT: ret i8 [[TMP1]]
// CHECK-C-LABEL: define dso_local i8 @func1n(
// CHECK-C-SAME: i8 noundef [[MFP8:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-C-NEXT: [[ENTRY:.*:]]
// CHECK-C-NEXT: [[MFP8_ADDR:%.*]] = alloca i8, align 1
// CHECK-C-NEXT: [[F1N:%.*]] = alloca [10 x i8], align 1
// CHECK-C-NEXT: store i8 [[MFP8]], ptr [[MFP8_ADDR]], align 1
// CHECK-C-NEXT: [[TMP0:%.*]] = load i8, ptr [[MFP8_ADDR]], align 1
// CHECK-C-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-C-NEXT: store i8 [[TMP0]], ptr [[ARRAYIDX]], align 1
// CHECK-C-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-C-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1
// CHECK-C-NEXT: ret i8 [[TMP1]]
//
// CHECK-CXX-LABEL: define dso_local noundef i8 @_Z6func1nw(
// CHECK-CXX-SAME: i8 noundef [[MFP8:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-CXX-NEXT: [[ENTRY:.*:]]
// CHECK-CXX-NEXT: [[MFP8_ADDR:%.*]] = alloca i8, align 1
// CHECK-CXX-NEXT: [[F1N:%.*]] = alloca [10 x i8], align 1
// CHECK-CXX-NEXT: store i8 [[MFP8]], ptr [[MFP8_ADDR]], align 1
// CHECK-CXX-NEXT: [[TMP0:%.*]] = load i8, ptr [[MFP8_ADDR]], align 1
// CHECK-CXX-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-CXX-NEXT: store i8 [[TMP0]], ptr [[ARRAYIDX]], align 1
// CHECK-CXX-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [10 x i8], ptr [[F1N]], i64 0, i64 2
// CHECK-CXX-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX1]], align 1
// CHECK-CXX-NEXT: ret i8 [[TMP1]]
//
__mfp8 func1n(__mfp8 mfp8) {
__mfp8 f1n[10];
Expand All @@ -26,43 +39,43 @@ __mfp8 func1n(__mfp8 mfp8) {

#include <arm_neon.h>

// CHECK-C-LABEL: define dso_local <16 x i8> @test_ret_fpm8x16_t(
// CHECK-C-LABEL: define dso_local <16 x i8> @test_ret_mfp8x16_t(
// CHECK-C-SAME: <16 x i8> noundef [[V:%.*]]) #[[ATTR0]] {
// CHECK-C-NEXT: [[ENTRY:.*:]]
// CHECK-C-NEXT: [[V_ADDR:%.*]] = alloca <16 x i8>, align 16
// CHECK-C-NEXT: store <16 x i8> [[V]], ptr [[V_ADDR]], align 16
// CHECK-C-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V_ADDR]], align 16
// CHECK-C-NEXT: ret <16 x i8> [[TMP0]]
//
// CHECK-CXX-LABEL: define dso_local noundef <16 x i8> @_Z18test_ret_fpm8x16_t13__Fpm8_tx16_t(
// CHECK-CXX-LABEL: define dso_local noundef <16 x i8> @_Z18test_ret_mfp8x16_t16__MFloat8_tx16_t(
// CHECK-CXX-SAME: <16 x i8> noundef [[V:%.*]]) #[[ATTR0]] {
// CHECK-CXX-NEXT: [[ENTRY:.*:]]
// CHECK-CXX-NEXT: [[V_ADDR:%.*]] = alloca <16 x i8>, align 16
// CHECK-CXX-NEXT: store <16 x i8> [[V]], ptr [[V_ADDR]], align 16
// CHECK-CXX-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V_ADDR]], align 16
// CHECK-CXX-NEXT: ret <16 x i8> [[TMP0]]
//
fpm8x16_t test_ret_fpm8x16_t(fpm8x16_t v) {
mfp8x16_t test_ret_mfp8x16_t(mfp8x16_t v) {
return v;
}

// CHECK-C-LABEL: define dso_local <8 x i8> @test_ret_fpm8x8_t(
// CHECK-C-LABEL: define dso_local <8 x i8> @test_ret_mfp8x8_t(
// CHECK-C-SAME: <8 x i8> noundef [[V:%.*]]) #[[ATTR0]] {
// CHECK-C-NEXT: [[ENTRY:.*:]]
// CHECK-C-NEXT: [[V_ADDR:%.*]] = alloca <8 x i8>, align 8
// CHECK-C-NEXT: store <8 x i8> [[V]], ptr [[V_ADDR]], align 8
// CHECK-C-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[V_ADDR]], align 8
// CHECK-C-NEXT: ret <8 x i8> [[TMP0]]
//
// CHECK-CXX-LABEL: define dso_local noundef <8 x i8> @_Z17test_ret_fpm8x8_t12__Fpm8_tx8_t(
// CHECK-CXX-LABEL: define dso_local noundef <8 x i8> @_Z17test_ret_mfp8x8_t15__MFloat8_tx8_t(
// CHECK-CXX-SAME: <8 x i8> noundef [[V:%.*]]) #[[ATTR0]] {
// CHECK-CXX-NEXT: [[ENTRY:.*:]]
// CHECK-CXX-NEXT: [[V_ADDR:%.*]] = alloca <8 x i8>, align 8
// CHECK-CXX-NEXT: store <8 x i8> [[V]], ptr [[V_ADDR]], align 8
// CHECK-CXX-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[V_ADDR]], align 8
// CHECK-CXX-NEXT: ret <8 x i8> [[TMP0]]
//
fpm8x8_t test_ret_fpm8x8_t(fpm8x8_t v) {
mfp8x8_t test_ret_mfp8x8_t(mfp8x8_t v) {
return v;
}

Expand Down
20 changes: 19 additions & 1 deletion clang/test/Sema/arm-mfp8.cpp
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
// RUN: %clang_cc1 -fsyntax-only -verify=scalar -triple aarch64-arm-none-eabi -target-feature -fp8 %s
// RUN: %clang_cc1 -fsyntax-only -verify=scalar,neon -triple aarch64-arm-none-eabi \
// RUN: -target-feature -fp8 -target-feature +neon %s

// REQUIRES: aarch64-registered-target
__mfp8 test_static_cast_from_char(char in) {
Expand Down Expand Up @@ -33,3 +34,20 @@ void test(bool b) {
mfp8 + (b ? u8 : mfp8); // scalar-error {{incompatible operand types ('char' and '__mfp8')}}
}

#include <arm_neon.h>

void test_vector(mfp8x8_t a, mfp8x8_t b, uint8x8_t c) {
a + b; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'mfp8x8_t')}}
a - b; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'mfp8x8_t')}}
a * b; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'mfp8x8_t')}}
a / b; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'mfp8x8_t')}}

a + c; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'uint8x8_t' (vector of 8 'uint8_t' values))}}
a - c; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'uint8x8_t' (vector of 8 'uint8_t' values))}}
a * c; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'uint8x8_t' (vector of 8 'uint8_t' values))}}
a / c; // neon-error {{invalid operands to binary expression ('mfp8x8_t' (vector of 8 'mfp8_t' values) and 'uint8x8_t' (vector of 8 'uint8_t' values))}}
c + b; // neon-error {{invalid operands to binary expression ('uint8x8_t' (vector of 8 'uint8_t' values) and 'mfp8x8_t' (vector of 8 'mfp8_t' values))}}
c - b; // neon-error {{invalid operands to binary expression ('uint8x8_t' (vector of 8 'uint8_t' values) and 'mfp8x8_t' (vector of 8 'mfp8_t' values))}}
c * b; // neon-error {{invalid operands to binary expression ('uint8x8_t' (vector of 8 'uint8_t' values) and 'mfp8x8_t' (vector of 8 'mfp8_t' values))}}
c / b; // neon-error {{invalid operands to binary expression ('uint8x8_t' (vector of 8 'uint8_t' values) and 'mfp8x8_t' (vector of 8 'mfp8_t' values))}}
}
52 changes: 26 additions & 26 deletions clang/utils/TableGen/NeonEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,7 @@ enum EltType {
Float32,
Float64,
BFloat16,
Fpm8
MFloat8
};

} // end namespace NeonTypeFlags
Expand Down Expand Up @@ -149,7 +149,7 @@ class Type {
UInt,
Poly,
BFloat16,
Fpm8,
MFloat8,
};
TypeKind Kind;
bool Immediate, Constant, Pointer;
Expand Down Expand Up @@ -203,7 +203,7 @@ class Type {
bool isLong() const { return isInteger() && ElementBitwidth == 64; }
bool isVoid() const { return Kind == Void; }
bool isBFloat16() const { return Kind == BFloat16; }
bool isFpm8() const { return Kind == Fpm8; }
bool isMFloat8() const { return Kind == MFloat8; }
unsigned getNumElements() const { return Bitwidth / ElementBitwidth; }
unsigned getSizeInBits() const { return Bitwidth; }
unsigned getElementSizeInBits() const { return ElementBitwidth; }
Expand Down Expand Up @@ -598,7 +598,7 @@ class NeonEmitter {
// Emit arm_bf16.h.inc
void runBF16(raw_ostream &o);

void runFpm8(raw_ostream &o);
void runMFloat8(raw_ostream &o);

void runVectorTypes(raw_ostream &o);

Expand Down Expand Up @@ -627,8 +627,8 @@ std::string Type::str() const {
S += "float";
else if (isBFloat16())
S += "bfloat";
else if (isFpm8())
S += "fpm";
else if (isMFloat8())
S += "mfp";
else
S += "int";

Expand Down Expand Up @@ -671,7 +671,7 @@ std::string Type::builtin_str() const {
else if (isBFloat16()) {
assert(ElementBitwidth == 16 && "BFloat16 can only be 16 bits");
S += "y";
} else if (isFpm8()) {
} else if (isMFloat8()) {
S += "c";
} else
switch (ElementBitwidth) {
Expand Down Expand Up @@ -727,9 +727,9 @@ unsigned Type::getNeonEnum() const {
Base = (unsigned)NeonTypeFlags::Float16 + (Addend - 1);
}

if (isFpm8()) {
assert(Addend == 1 && "Fpm8 is only 8 bit");
Base = (unsigned)NeonTypeFlags::Fpm8;
if (isMFloat8()) {
assert(Addend == 1 && "MFloat8 is only 8 bit");
Base = (unsigned)NeonTypeFlags::MFloat8;
}

if (isBFloat16()) {
Expand Down Expand Up @@ -758,8 +758,8 @@ Type Type::fromTypedefName(StringRef Name) {
T.Kind = Poly;
} else if (Name.consume_front("bfloat")) {
T.Kind = BFloat16;
} else if (Name.consume_front("fpm")) {
T.Kind = Fpm8;
} else if (Name.consume_front("mfp")) {
T.Kind = MFloat8;
} else {
assert(Name.starts_with("int"));
Name = Name.drop_front(3);
Expand Down Expand Up @@ -857,7 +857,7 @@ void Type::applyTypespec(bool &Quad) {
NumVectors = 0;
break;
case 'm':
Kind = Fpm8;
Kind = MFloat8;
ElementBitwidth = 8;
break;
case 'b':
Expand Down Expand Up @@ -895,7 +895,7 @@ void Type::applyModifiers(StringRef Mods) {
ElementBitwidth = 16;
break;
case 'M':
Kind = Fpm8;
Kind = MFloat8;
ElementBitwidth = 8;
break;
case 'F':
Expand Down Expand Up @@ -982,8 +982,8 @@ std::string Intrinsic::getInstTypeCode(Type T, ClassKind CK) const {
if (T.isBFloat16())
return "bf16";

if (T.isFpm8())
return "fpm8";
if (T.isMFloat8())
return "mfp8";

if (T.isPoly())
typeCode = 'p';
Expand Down Expand Up @@ -1022,7 +1022,7 @@ std::string Intrinsic::getBuiltinTypeStr() {

Type RetT = getReturnType();
if ((LocalCK == ClassI || LocalCK == ClassW) && RetT.isScalar() &&
!RetT.isFloating() && !RetT.isBFloat16() && !RetT.isFpm8())
!RetT.isFloating() && !RetT.isBFloat16() && !RetT.isMFloat8())
RetT.makeInteger(RetT.getElementSizeInBits(), false);

// Since the return value must be one type, return a vector type of the
Expand Down Expand Up @@ -2405,7 +2405,7 @@ void NeonEmitter::run(raw_ostream &OS) {

OS << "#include <arm_bf16.h>\n";

OS << "#include <arm_fpm8.h>\n";
OS << "#include <arm_mfp8.h>\n";

OS << "#include <arm_vector_types.h>\n";

Expand Down Expand Up @@ -2589,8 +2589,8 @@ void NeonEmitter::runFP16(raw_ostream &OS) {
OS << "#endif /* __ARM_FP16_H */\n";
}

void NeonEmitter::runFpm8(raw_ostream &OS) {
OS << "/*===---- arm_fpm8 - ARM vector type "
void NeonEmitter::runMFloat8(raw_ostream &OS) {
OS << "/*===---- arm_mfp8 - ARM vector type "
"------===\n"
" *\n"
" *\n"
Expand All @@ -2602,12 +2602,12 @@ void NeonEmitter::runFpm8(raw_ostream &OS) {
" *===-----------------------------------------------------------------"
"------===\n"
" */\n\n";
OS << "#ifndef __ARM_FPM8_H\n";
OS << "#define __ARM_FPM8_H\n\n";
OS << "typedef __fpm8 fpm8_t;\n";
OS << "#ifndef __ARM_MFP8_H\n";
OS << "#define __ARM_MFP8_H\n\n";
OS << "typedef __mfp8 mfp8_t;\n";

emitNeonTypeDefs("mQm", OS);
OS << "#endif // __ARM_FPM8_H\n";
OS << "#endif // __ARM_MFP8_H\n";
}

void NeonEmitter::runVectorTypes(raw_ostream &OS) {
Expand Down Expand Up @@ -2732,8 +2732,8 @@ void clang::EmitBF16(RecordKeeper &Records, raw_ostream &OS) {
NeonEmitter(Records).runBF16(OS);
}

void clang::EmitFpm8(RecordKeeper &Records, raw_ostream &OS) {
NeonEmitter(Records).runFpm8(OS);
void clang::EmitMFloat8(RecordKeeper &Records, raw_ostream &OS) {
NeonEmitter(Records).runMFloat8(OS);
}

void clang::EmitNeonSema(RecordKeeper &Records, raw_ostream &OS) {
Expand Down
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