Corrected issues with rfcmim extraction.

[d-m-bailey]

Changed the extracted device model from rfcmim to cap_rfcmim to match spice model.
Changed rfmim_sub calculation.
Added matching mim_sub connection to parallel cap_rfcmim check.
Use custom combiner for both layout and source reduction.

Fixes #512 Also may fix #459 and #418

• [O] Tests pass (test case in rfcmim LVS problems. #512 completes without giving warnings, without crashing, and with models that match spice.)
• Appropriate changes to README are included in PR <- no README changes.

[KrzysztofHerman]

@sergeiandreyev please take care

[sergeiandreyev]

Hi @d-m-bailey, could you please roll-back this part of the PR:

Changed the extracted device model from rfcmim to cap_rfcmim to match spice model.

As you can see, now the LVS regression is failing.. we have different device names for the rfcmim capacitor based on which netlist type you're generating, for simulation (SPICE) or LVS (CDL).
The simulation netlist should contain cap_rfcmim and the netlist for LVS rfcmim, and, btw, this has to be updated for xschem to generate the CDL netlist in correct way. It is not there yet

[d-m-bailey]

@sergeiandreyev

As you can see, now the LVS regression is failing.. we have different device names for the rfcmim capacitor based on which netlist type you're generating, for simulation (SPICE) or LVS (CDL).

I see.

With different model names, I see potential problems.

Currently, the klayout rules extract as rfcmim for LVS. I believe the current magic tech file does not support rfcmim. I think my PR adds the cap_rfcmim devices to magic. Magic is also used for parasitic extraction - meaning that the extracted netlist will be simulated in spice. So magic would need 2 extraction rules (which is possible with variants), one to extract parasitic devices with cap_rfcmim and one to extract with rfcmim for LVS.

What is the reason for different model names between simulation and LVS?

[sergeiandreyev]

What is the reason for different model names between simulation and LVS?

first of all, this is done with alignment to commercial PDK, while for the actual reason - let me double check on this internally..
from my point of view, we have somewhat confusing (and not clear) approach here - some devices have the same names between different netlist types, other have different, etc.

[d-m-bailey]

@sergeiandreyev

What is the reason for different model names between simulation and LVS?

first of all, this is done with alignment to commercial PDK,
I thought that might be the case.

Recently, bulk nodes have been added to the poly resistors for simulation. Are there plans to add those to LVS also or do we continue the separate LVS and simulation netlist approach.

[d-m-bailey]

@RTimothyEdwards I added rfcmim rules (mimicking cap_cmim) to the magic and netgen tech files. Can you do a quick sanity check?

[d-m-bailey]

@FaragElsayed2 Can you check the changes to the klayout rule deck? This PR modifies the extraction of the substrate terminal for rfcmim and also fixes a problem where the combination routine was different between the layout and source.