Iniciando escrita dos testes basicos do RV32I

LSC-Unicamp · Dec 13, 2024 · 966d208 · 966d208
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diff --git a/tests/RV32I/advanced/memory/012-jal.hex b/tests/RV32I/advanced/memory/012-jal.hex
@@ -0,0 +1,9 @@
+00300693
+00c000ef
+00500713
+02e02e23
+00a00793
+008000ef
+02f02e23
+00f00813
+03002e23
diff --git a/tests/RV32I/advanced/memory/013-jalr.hex b/tests/RV32I/advanced/memory/013-jalr.hex
@@ -0,0 +1,10 @@
+00300693
+00d686b3
+00000897
+01488893
+000880e7
+00700713
+02e02e23
+00a00793
+00008067
+02f02e23
diff --git a/tests/RV32I/advanced/src/012-jal.s b/tests/RV32I/advanced/src/012-jal.s
@@ -1 +1,26 @@
 # jal implementation
+.text
+
+.global _start
+
+_start:
+    addi a3, zero, 3;
+
+    jal subrotina;
+
+    addi a4, zero, 5;
+
+    sw a4, 60(zero);
+
+
+subrotina:
+    addi a5, zero, 10;
+
+    jal subrotina2;
+
+    sw a5, 60(zero);
+
+subrotina2:
+    addi a6, zero, 15;
+
+    sw a6, 60(zero);
diff --git a/tests/RV32I/advanced/src/013-jalr.s b/tests/RV32I/advanced/src/013-jalr.s
@@ -1 +1,22 @@
 # jalr implementation
+.text
+
+.global _start
+
+_start:
+    addi a3, zero, 3;
+    add a3, a3, a3;
+
+    la a7, subrotina;
+
+    jalr ra, a7, 0;
+
+    addi a4, zero, 7;
+
+    sw a4, 60(zero);
+
+subrotina:
+    addi a5, zero, 10;
+    jalr zero, ra, 0;
+
+    sw a5, 60(zero);
diff --git a/tests/RV32I/basic/memory/000-addi.hex b/tests/RV32I/basic/memory/000-addi.hex
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+00500593
+00000013
+00000013
+00000013
+02b02e23
diff --git a/tests/RV32I/basic/memory/001-sw.hex b/tests/RV32I/basic/memory/001-sw.hex
@@ -0,0 +1,2 @@
+00a00593
+02d02e23
diff --git a/tests/RV32I/basic/memory/002-slti.hex b/tests/RV32I/basic/memory/002-slti.hex
@@ -0,0 +1,5 @@
+00400593
+0015a693
+0055a713
+02d02c23
+02e02e23
diff --git a/tests/RV32I/basic/memory/003-sltiu.hex b/tests/RV32I/basic/memory/003-sltiu.hex
@@ -0,0 +1,3 @@
+00800593
+7ff5b613
+02c02e23
diff --git a/tests/RV32I/basic/memory/004-xori.hex b/tests/RV32I/basic/memory/004-xori.hex
@@ -0,0 +1,4 @@
+00500593
+00300613
+00c5c6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/005-ori.hex b/tests/RV32I/basic/memory/005-ori.hex
@@ -0,0 +1,3 @@
+00500593
+0035e693
+02d02e23
diff --git a/tests/RV32I/basic/memory/006-andi.hex b/tests/RV32I/basic/memory/006-andi.hex
@@ -0,0 +1,3 @@
+00500593
+0035f693
+02d02e23
diff --git a/tests/RV32I/basic/memory/007-slli.hex b/tests/RV32I/basic/memory/007-slli.hex
@@ -0,0 +1,3 @@
+00400593
+00159693
+02d02e23
diff --git a/tests/RV32I/basic/memory/008-srli.hex b/tests/RV32I/basic/memory/008-srli.hex
@@ -0,0 +1,3 @@
+00400593
+0015d693
+02d02e23
diff --git a/tests/RV32I/basic/memory/009-srai.hex b/tests/RV32I/basic/memory/009-srai.hex
@@ -0,0 +1,3 @@
+00800593
+4015d613
+02c02e23
diff --git a/tests/RV32I/basic/memory/010-lui.hex b/tests/RV32I/basic/memory/010-lui.hex
@@ -0,0 +1,2 @@
+6d0005b7
+02b02e23
diff --git a/tests/RV32I/basic/memory/011-auipc.hex b/tests/RV32I/basic/memory/011-auipc.hex
@@ -0,0 +1,5 @@
+6d000617
+6d000697
+00c68633
+02d02c23
+02c02e23
diff --git a/tests/RV32I/basic/memory/012-jal.hex b/tests/RV32I/basic/memory/012-jal.hex
@@ -0,0 +1,6 @@
+00300693
+00c000ef
+00500713
+02e02e23
+00a00793
+02f02e23
diff --git a/tests/RV32I/basic/memory/013-jalr.hex b/tests/RV32I/basic/memory/013-jalr.hex
@@ -0,0 +1,8 @@
+00300693
+00d686b3
+00c000ef
+00700713
+02e02e23
+00a00793
+00008067
+02f02e23
diff --git a/tests/RV32I/basic/memory/014-beq.hex b/tests/RV32I/basic/memory/014-beq.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02b58063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+fec582e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/015-bne.hex b/tests/RV32I/basic/memory/015-bne.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02c59063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+feb592e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/016-blt.hex b/tests/RV32I/basic/memory/016-blt.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02c5c063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+feb642e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/017-bge.hex b/tests/RV32I/basic/memory/017-bge.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02b65063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+fec5d2e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/018-bltu.hex b/tests/RV32I/basic/memory/018-bltu.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02c5e063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+feb662e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/019-bgeu.hex b/tests/RV32I/basic/memory/019-bgeu.hex
@@ -0,0 +1,14 @@
+00100593
+00200613
+02b67063
+00a00693
+02d02e23
+01400793
+02f02e23
+00000013
+00000013
+00000013
+00f00713
+00c70733
+fec5f2e3
+02e02e23
diff --git a/tests/RV32I/basic/memory/020-lb.hex b/tests/RV32I/basic/memory/020-lb.hex
@@ -0,0 +1,4 @@
+7ff00593
+02b02423
+02800603
+02c02e23
diff --git a/tests/RV32I/basic/memory/021-lh.hex b/tests/RV32I/basic/memory/021-lh.hex
@@ -0,0 +1,6 @@
+7ff00593
+00b585b3
+00559593
+02b02423
+02801603
+02c02e23
diff --git a/tests/RV32I/basic/memory/022-lw.hex b/tests/RV32I/basic/memory/022-lw.hex
@@ -0,0 +1,6 @@
+00a00593
+7ff00613
+00b606b3
+00d02e23
+01c02703
+02e02e23
diff --git a/tests/RV32I/basic/memory/025-sb.hex b/tests/RV32I/basic/memory/025-sb.hex
@@ -0,0 +1,5 @@
+7ff00593
+00b585b3
+02b00823
+03002603
+02c02e23
diff --git a/tests/RV32I/basic/memory/026-sh.hex b/tests/RV32I/basic/memory/026-sh.hex
@@ -0,0 +1,5 @@
+7ff00593
+00659593
+02b01823
+03002603
+02c02e23
diff --git a/tests/RV32I/basic/memory/027-add.hex b/tests/RV32I/basic/memory/027-add.hex
@@ -0,0 +1,3 @@
+00500593
+00b585b3
+02b02e23
diff --git a/tests/RV32I/basic/memory/028-sub.hex b/tests/RV32I/basic/memory/028-sub.hex
@@ -0,0 +1,4 @@
+00f00593
+00500613
+40c586b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/029-sll.hex b/tests/RV32I/basic/memory/029-sll.hex
@@ -0,0 +1,4 @@
+00400593
+00100613
+00c596b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/030-slt.hex b/tests/RV32I/basic/memory/030-slt.hex
@@ -0,0 +1,4 @@
+00400593
+00100613
+00c5a6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/031-sltu.hex b/tests/RV32I/basic/memory/031-sltu.hex
@@ -0,0 +1,4 @@
+00400593
+00100613
+00c5b6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/032-xor.hex b/tests/RV32I/basic/memory/032-xor.hex
@@ -0,0 +1,4 @@
+00500593
+00300613
+00c5c6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/033-srl.hex b/tests/RV32I/basic/memory/033-srl.hex
@@ -0,0 +1,4 @@
+00400593
+00100613
+00c5d6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/034-sra.hex b/tests/RV32I/basic/memory/034-sra.hex
@@ -0,0 +1,4 @@
+00400593
+00100613
+40c5d6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/035-or.hex b/tests/RV32I/basic/memory/035-or.hex
@@ -0,0 +1,4 @@
+00500593
+00300613
+00c5e6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/036-and.hex b/tests/RV32I/basic/memory/036-and.hex
@@ -0,0 +1,4 @@
+00500593
+00300613
+00c5f6b3
+02d02e23
diff --git a/tests/RV32I/basic/memory/040-timeout.hex b/tests/RV32I/basic/memory/040-timeout.hex
@@ -0,0 +1,3 @@
+00000593
+00158593
+ffdff06f
diff --git a/tests/RV32I/basic/memory/041-forwarding.hex b/tests/RV32I/basic/memory/041-forwarding.hex
@@ -0,0 +1,7 @@
+00a00593
+01400613
+00c586b3
+0016d693
+00c58733
+00d707b3
+02f02e23
diff --git a/tests/RV32I/basic/memory/042-forwarding-lw.hex b/tests/RV32I/basic/memory/042-forwarding-lw.hex
@@ -0,0 +1,8 @@
+00a00593
+01400613
+00c586b3
+02d02423
+00100713
+02802783
+00e787b3
+02f02e23
diff --git a/tests/RV32I/basic/reference/040-timeout.hex b/tests/RV32I/basic/reference/040-timeout.hex
diff --git a/tests/RV32I/basic/reference/041-forwarding.hex b/tests/RV32I/basic/reference/041-forwarding.hex
diff --git a/tests/RV32I/basic/reference/042-forwarding-lw.hex b/tests/RV32I/basic/reference/042-forwarding-lw.hex
diff --git a/tests/RV32I/basic/src/000-addi.s b/tests/RV32I/basic/src/000-addi.s
@@ -1 +1,14 @@
 # addi implementation
+.text
+
+.global _start;
+
+_start:
+    addi a1, zero, 5; # a1 = zero + 5
+
+    nop;
+    nop;
+    nop; # 3 nops to not cause forwarding
+
+    sw a1, 60(zero);
+
diff --git a/tests/RV32I/basic/src/001-sw.s b/tests/RV32I/basic/src/001-sw.s
@@ -1 +1,9 @@
 # sw implementation
+.text
+
+.global _start
+
+_start:
+    addi a1, zero, 10      # Carrega o primeiro número (10) em a1
+
+    sw a3, 60(zero)
diff --git a/tests/RV32I/basic/src/002-slti.s b/tests/RV32I/basic/src/002-slti.s
@@ -1 +1,14 @@
 # slti implementation
+.text
+
+.global _start;
+
+_start:
+    addi a1, zero, 4; # a1 = zero + 5
+
+    slti a3, a1, 1; # a3 = a1 < 1
+    slti a4, a1, 5; # a4 = a1 < 5
+
+    sw a3, 56(zero);
+    sw a4, 60(zero);
+
diff --git a/tests/RV32I/basic/src/003-sltiu.s b/tests/RV32I/basic/src/003-sltiu.s
@@ -1 +1,11 @@
 # sltiu implementation
+.text
+
+.global _start;
+
+_start:
+    addi a1, zero, 8; # a1 = zero + 5
+
+    sltiu a2, a1, 2047; # a2 = a1 < 2047
+
+    sw a2, 60(zero);
diff --git a/tests/RV32I/basic/src/004-xori.s b/tests/RV32I/basic/src/004-xori.s
@@ -1 +1,13 @@
 # xori implementation
+.text
+
+.global _start;
+
+_start:
+    addi a1, zero, 5; # a1 = zero + 5
+    addi a2, zero, 3; # a2 = zero + 3
+
+    xor a3, a1, a2; 
+
+    sw a3, 60(zero);
+
-Original file line number
+Diff line change
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+d000617
+d000697
+c68633
+d02c23
+c02e23