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Pull requests list

fix(bpu): add init value for t*_fire module: frontend Bpu, Ftq, Ifu, ICache, IBuffer topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5539 opened Jan 15, 2026 by TheKiteRunner24 Loading…
2
fix(Redirect): fix redirect and Topdown module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan module: top XSTop, XSTile, XSParameters, configs topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5538 opened Jan 15, 2026 by sinceforYy Loading…
2
refactor(IssueQueue): refactor all resps module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan
#5537 opened Jan 15, 2026 by xiaofeibao-xjtu Loading…
fix(pmu): adjust condition logic for specific performance counters module: frontend Bpu, Ftq, Ifu, ICache, IBuffer
#5536 opened Jan 15, 2026 by my-mayfly Loading…
1
refactor(writeback): refactor Bundle that writeback to Rob and RegFile module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan topic: code quality To make code more readable & maintainable
#5535 opened Jan 15, 2026 by sinceforYy • Draft
chore(topdown): update the paths of targets module: tool non-RTL tools like difftest, gsim, XSpdb, Makefiles, scripts, CI/CD, etc. topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5533 opened Jan 14, 2026 by lewislzh Loading…
1
fix(LoadExcetionBuffer): load cannot determine exception priority using lqidx module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun
#5532 opened Jan 14, 2026 by Anzooooo • Draft
1
fix(SoC): change AsyncBrigeSink fifo to 4 module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun module: top XSTop, XSTile, XSParameters, configs
#5531 opened Jan 14, 2026 by yulightenyu Loading…
timing(wakeup, backend): add load to fp delay wakeup module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan module: top XSTop, XSTile, XSParameters, configs topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes... topic: timing To fix bad timing
#5530 opened Jan 14, 2026 by wissygh • Draft
submodule(coupledL2): bump CoupledL2 and Utility module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun module: top XSTop, XSTile, XSParameters, configs module: utility RTL utility
#5529 opened Jan 14, 2026 by jlong299 Loading…
feat(sc): add bw table module: frontend Bpu, Ftq, Ifu, ICache, IBuffer topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5528 opened Jan 14, 2026 by sleep-zzz Loading… kmh-v3
1
feat(Bpu): lru & finalTaken for mbtb module: frontend Bpu, Ftq, Ifu, ICache, IBuffer note: do not squash (PR) For maintainer: please use rebase-and-merge instead of squash-and-merge topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes... topic: performance To improve performance
#5525 opened Jan 13, 2026 by ngc7331 Loading… kmh-v3
2
Fix async sink powerack module: top XSTop, XSTile, XSParameters, configs topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5524 opened Jan 13, 2026 by yulightenyu Loading…
fix(XSNoCTop): add power handshake between AsyncBridgeSink and LowPow… module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun module: top XSTop, XSTile, XSParameters, configs
#5521 opened Jan 13, 2026 by yulightenyu Loading…
timing(utage): train and predict using the history from the previous cycle module: frontend Bpu, Ftq, Ifu, ICache, IBuffer topic: timing To fix bad timing
#5517 opened Jan 12, 2026 by my-mayfly Loading… kmh-v3
1
submodule(difftest): fix emu compilation for load squash
#5516 opened Jan 12, 2026 by klin02 Loading…
feat(utage): add set-associative support to MicroTage module: frontend Bpu, Ftq, Ifu, ICache, IBuffer topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5513 opened Jan 12, 2026 by my-mayfly • Draft kmh-v3
fix(AXI4Flash): adjust Flash address bit width
#5511 opened Jan 11, 2026 by Anzooooo Loading… kmh-v2r2
2
feat(WriteBuffer): add lifeCnt to the already written entry module: frontend Bpu, Ftq, Ifu, ICache, IBuffer topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...
#5510 opened Jan 9, 2026 by sleep-zzz • Draft kmh-v3
feat(loadRAR, L2): switch lqRAR release source from L1 to L2 module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun
#5507 opened Jan 9, 2026 by jlong299 Loading… kmh-v3
fix(dcache): remove unnecessary XSError in DCache module: memory Memblock, DCache, TLB, Prefetcher, coupledL2, huancun
#5506 opened Jan 9, 2026 by jlong299 Loading… kmh-v3
fix(uncache): canMerge is confilct with rejectVec.orR, so keep former
#5503 opened Jan 8, 2026 by Maxpicca-Li Loading…
chore(submodule): bump submodules note: do not merge (PR) For maintainer: do not merge this pull request yet
#5499 opened Jan 8, 2026 by Yan-Muzi Loading…
ci: disable bolt pgo for mc
#5498 opened Jan 8, 2026 by Tang-Haojin • Draft
refactor(rename):resolve variable shadowing and improve variable naming module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan
#5495 opened Jan 7, 2026 by mastervalid Loading… kmh-v3
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