chapter12

HARDWARE DESIGN

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DETAILED DESIGN PROCESS

The detailed design process produces detailed design data using the hardware item requirements and conceptual design data as the basis for the detailed design.

Detailed Design Objectives

The detailed design process objectives are:

1. The detailed design is developed from the hardware item requirements and conceptual design data.

2. Derived requirements are fed back to the conceptual design process or other appropriate processes.

3. Requirement omissions or errors are provided to the appropriate processes for resolution.

Detailed Design Process Activities

Guidance for the detailed design activities includes:

1. The detailed design data for the hardware item should be generated based on the requirements and conceptual design data. This may include assembly and interconnection data, component data, HDL, test methods and hardware-software interface data.

   Note: During the detailed design process, verification methods are used informally to facilitate the technical decisions made during this process. For example, analysis of design parameters, such as logic timing and parameter variations, can provide information on which to base design decisions.

2. Architectural design techniques should be implemented as necessary. These may include establishing safety monitors for proper functionality, dissimilarity between function and safety monitors, preclusion of a design error from impacting safety, and fault tolerant designs.

3. Test features should be designed in, where necessary, to allow verification of safety requirements.

   Note: It is important to develop the design in a way that certain safety features can be verified not only during the hardware design life cycle, but also as a part of an acceptance test and a field return to service test.

4. An assessment of unused functions should be performed to identify potential effects on safety. Adverse effects should be addressed.

5. Constraints on the design, installation or operation of the hardware item that, if not adhered to, could affect the safety of the item should be identified.

6. Derived requirements produced during the detailed design process should be fed back to the conceptual design or other appropriate processes.

7. Requirement omissions and errors discovered during the detailed design process should be provided to the appropriate process for resolution.

LANGUAGES

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VHDL Language

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Overview

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Normative references

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Design entities and configurations

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Subprograms and packages

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Types

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Declarations

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Specifications

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Names

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Expressions

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Sequential statements

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Concurrent statements

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Scope and visibility

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Design units and their analysis

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Elaboration and execution

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Lexical elements

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Predefined language environment

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VHDL Procedural Interface overview

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VHPI access functions

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VHPI information model

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VHPI tool execution

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VHPI callbacks

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VHPI value access and update

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VHPI function reference

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Standard tool directives

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Verilog Language

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Overview

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Normative references

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Lexical conventions

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Data types

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Expressions

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Assignments

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Gate- and switch-level modeling

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User-defined primitives (UDPs)

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Behavioral modeling

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Tasks and functions

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Scheduling semantics

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Hierarchical structures

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Configuring the contents of a design

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Specify blocks

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Timing checks

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Backannotation using the standard delay format (SDF)

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System tasks and functions

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Value change dump (VCD) files

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Compiler directives

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Programming language interface (PLI) overview

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PLI TF and ACC interface mechanism (deprecated)

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Using ACC routines (deprecated)

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ACC routine definitions (deprecated)

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Using TF routines (deprecated)

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TF routine definitions (deprecated)

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Using Verilog procedural interface (VPI) routines

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VPI routine definitions

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Protected envelopes

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