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FPGA Openflow License

A Python library, and CLI utilities, which solves HDL-to-bitstream based on FOSS.

The library is basically a wrapper which employs hdl/containers to perform synthesis (VHDL and/or Verilog), implementation and bitstream generation. Some command-line utilities are provided, to be used as standalone tools.

Currently, it is based on GHDL, Yosys, ghdl-yosys-plugin, nextpnr, icestorm and prjtrellis.

NOTE: it started as part of PyFPGA and will be used to solves the openflow tool.