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README.md
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<div align="center">
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[](https://github.com/RDSik/verilog-transceiver/actions/workflows/main.yml)
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-[](https://github.com/RDSik/verilog-transceiver/master/LICENSE.txt)
+[](https://github.com/RDSik/verilog-transceiver/LICENSE.txt)
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</div><br/><br/>
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