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Provide a initial documentation generated with Sphinx and hosted on ReadTheDocs.
Overdue by 8 year(s)•Due by October 28, 2016•5/5 issues closedComplete rewrite of the Python infrastructure: - new *.files parser - new *.rules parser - new configuration database (*.ini files) Simulator support for: - Aldec Active-HDL - Cocotb simulation (based on QuestaSim) - GHDL - QuestaSim - Xilinx ISE Simulator - Xilinx Vivado Simulator Compiler support for: - Altera Quartus II / Quartus Prime - Lattice LSE - Xilinx XST - Xilinx CoreGenerator New IP cores: - Caches - standard cache with LRU strategy - Memory controllers for - Atlys (Spartan-6 board) - KC705 (Kintex-7 board)
Overdue by 9 year(s)•Due by May 13, 2016•3/3 issues closed