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Merge branch 'main' into dyn_objFifo_fix
2 parents 229378e + 12d3878 commit 45bb266

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2 files changed

+6
-9
lines changed

2 files changed

+6
-9
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lib/Dialect/AIE/Transforms/AIEAssignBuffers.cpp

+4-5
Original file line numberDiff line numberDiff line change
@@ -262,7 +262,7 @@ void printMemMap(TileOp tile, SmallVector<BufferOp> &allocatedBuffers,
262262
// Returns true if the buffer was successfully allocated, false otherwise.
263263
// If no bank has enough space to accommodate the buffer, an error is emitted.
264264

265-
int setBufferAddress(BufferOp buffer, int numBanks, int startBankIndex,
265+
int setBufferAddress(BufferOp buffer, int numBanks, int &startBankIndex,
266266
std::vector<int64_t> &nextAddrInBanks,
267267
std::vector<BankLimits> &bankLimits) {
268268
assert(startBankIndex < numBanks &&
@@ -276,13 +276,12 @@ int setBufferAddress(BufferOp buffer, int numBanks, int startBankIndex,
276276
buffer.setMemBank(bankIndex);
277277
setAndUpdateAddressInBank(buffer, startAddr, endAddr, nextAddrInBanks);
278278
allocated = true;
279-
bankIndex++;
280-
bankIndex %= numBanks;
279+
bankIndex = (bankIndex + 1) % numBanks;
280+
startBankIndex = bankIndex;
281281
break;
282282
}
283283
// Move to the next bank
284-
bankIndex++;
285-
bankIndex %= numBanks;
284+
bankIndex = (bankIndex + 1) % numBanks;
286285
}
287286
// If no bank has enough space, throws error
288287
if (!allocated) {

test/assign-buffer-addresses/bank_aware_alloc_simple.mlir

+2-4
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,10 @@
99
//===----------------------------------------------------------------------===//
1010

1111
// RUN: aie-opt --aie-assign-buffer-addresses="alloc-scheme=bank-aware" %s | FileCheck %s
12-
// CHECK: %a = aie.buffer(%tile_3_3) {address = 3104 : i32, mem_bank = 0 : i32, sym_name = "a"} : memref<16xi8>
12+
// CHECK: %a = aie.buffer(%tile_3_3) {address = 16384 : i32, mem_bank = 2 : i32, sym_name = "a"} : memref<16xi8>
1313
// CHECK: %b = aie.buffer(%tile_3_3) {address = 1024 : i32, mem_bank = 0 : i32, sym_name = "b"} : memref<512xi32>
14-
// CHECK: %c = aie.buffer(%tile_3_3) {address = 3072 : i32, mem_bank = 0 : i32, sym_name = "c"} : memref<16xi16>
14+
// CHECK: %c = aie.buffer(%tile_3_3) {address = 8192 : i32, mem_bank = 1 : i32, sym_name = "c"} : memref<16xi16>
1515
// CHECK: %_anonymous0 = aie.buffer(%tile_4_4) {address = 1024 : i32, mem_bank = 0 : i32, sym_name = "_anonymous0"} : memref<500xi32>
16-
17-
1816

1917
module @test {
2018
aie.device(xcvc1902) {

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