Skip to content

High-throughput Sparse Matrix–Vector Multiply (SPMV) accelerator for the Xilinx Alveo U280, redesigned from Serpens A16 into a fully Vitis HLS dataflow kernel with 24 HBM channels and improved memory and parallelism.

Notifications You must be signed in to change notification settings

aditya2819/Optimizing-Serpens-SpMV-Accelerator-on-Xilinx-Alveo-U280

 
 

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

44 Commits
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Serpens SpMV Accelerator — Optimized for Xilinx Alveo U280

Project: High-performance Sparse Matrix–Vector multiply (SpMV) accelerator optimized for the Xilinx Alveo U280.

This repository contains the host code, FPGA bitstreams and helper scripts needed to build and run the Serpens SpMV accelerator.

Repository layout

  • src/ : FPGA kernel sources and host helper headers.
  • scripts/ : Host and utility programs (e.g. host_xrt.cpp, spmvgen.py, run helpers).
  • bitstreams/ : Prebuilt FPGA binaries (.xclbin, .xo) for deployment.
  • docs/ : Short docs and run notes (this file includes the main run instructions).

Prerequisites

  • Xilinx Vitis / Vivado toolchain (for rebuilding kernels) and XRT (runtime) for target U280.
  • A Linux build host (recommended) or WSL on Windows with required Xilinx toolchain installed.
  • g++ (or clang++) for host compilation, Python 3 for scripts.
  • Access to an Alveo U280 or appropriate emulation environment.

Quick start Build host and run (recommended: Linux / WSL)

  1. Prepare environment
  • Ensure XRT is installed and the xbutil tool is available. For U280, set up the target and user permissions.
  1. Build the host application
cd scripts
# Example: compile on Linux (adjust include/lib paths for your XRT install)
g++ -std=c++14 -O2 -I/opt/xilinx/xrt/include -o host_xrt host_xrt.cpp -lOpenCL
  1. Deploy bitstream to the board
  • Copy bitstreams/Serpens.xclbin to the host that manages the U280 and program the card using your usual tooling (for example, xbutil program on systems with XRT):
xbutil program --device 0000:00:00.0 --file bitstreams/Serpens.xclbin
  1. Run the host
  • Basic run (example):
./host_xrt bitstreams/Serpens.xclbin [other args]
# See `scripts/instruction_to_run.txt` for recommended command-line arguments and ordering

Rebuilding the FPGA kernel

  • Use the Vitis build flow (kernel sources are in src/) to recompile if you need to rebuild for a different device or optimization flags. Typical flow:
# From project root, run your Vitis build script / v++ commands that target the Alveo U280
# Example (illustrative):
# v++ -t xilinx_u280_xdma_201920_3 --link -o bitstreams/Serpens.xclbin <kernel XO files>

Notes & troubleshooting

  • Line endings: source files were normalized for cross-platform use configure your git core.autocrlf appropriately.
  • If host fails to find the xclbin, ensure the environment variable XCLBIN or the command line path points to bitstreams/Serpens.xclbin.
  • For performance tuning, review the kernel compile flags and the src/ sources. Profiling tools in XRT and xbutil can help diagnose bottlenecks.

Contact / Attribution

  • This fork is maintained by the repository owner. Please check upstream for original license and contributors.

About

High-throughput Sparse Matrix–Vector Multiply (SPMV) accelerator for the Xilinx Alveo U280, redesigned from Serpens A16 into a fully Vitis HLS dataflow kernel with 24 HBM channels and improved memory and parallelism.

Topics

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Languages

  • C++ 75.3%
  • C 21.2%
  • Tcl 2.0%
  • Python 1.5%