Hardware Abstraction Layer crates for the ESP32, ESP32-C3, ESP32-S2, and ESP32-S3 from Espressif.
These HALs are no_std; if you are looking for std support please use esp-idf-hal instead.
This project is still in the early stages of development, and as such there should be no expectation of API stability. A significant number of peripherals currently have drivers implemented (you can see a full list here) but have varying levels of functionality. For most basic tasks, this should be usable already.
If you have any questions, comments, or concerns please open an issue, start a new discussion, or join us on Matrix. For additional information regarding any of the crates in this repository please refer to the crate's README.
| Crate | Target | Technical Reference Manual |
|---|---|---|
| esp32-hal | xtensa-esp32-none-elf |
ESP32 |
| esp32c3-hal | riscv32imc-unknown-none-elfriscv32imac-unknown-none-elf* |
ESP32-C3 |
| esp32s2-hal | xtensa-esp32s2-none-elf |
ESP32-S2 |
| esp32s3-hal | xtensa-esp32s3-none-elf |
ESP32-S3 |
* via atomic emulation
The Minimum Supported Rust Versions are:
1.60.0for RISC-V devices (ESP32-C3)1.60.0for Xtensa devices (ESP32, ESP32-S2, ESP32-S3)
Note that targeting the Xtensa ISA currently requires the use of the esp-rs/rust compiler fork. The esp-rs/rust-build repository has pre-compiled release artifacts for most common platforms, and provides installation scripts to aid you in the process.
RISC-V is officially supported by the official Rust compiler.
Licensed under either of:
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.