Digital System Design with Verilog HDL

In this repo you will find learning matrials + Verilog codes for Digital System Design with Verilog HDL course as it is taught at the Faculty of Engineering - University of Aden.

Course Prerequisites

• Logic Design.
• Digital Electronics.

References

• Digital Design: An Embedded Systems Approach Using Verilog by Peter J. Ashenden.
• Digital Design: Principles and Practices by John F. Wakerly.
• Verilog HDL A guide to Digital Design and Synthesis by Samir Palnitkar.

Laboratory setup

The lab is based on a simulation environment using Xilinx’s Vivado Design Suite - student edition, you will be designing with Verilog HDL and simulating your designs using the built-in simulator (ISim).

Useful resources

• EDA Playground.
• OpenCores projects.
• Introdction to Verilog by Altera on YouTube.
• Introduction to FPGA Design for Embedded Systems - course on Coursera
• Hardware Description Languages for FPGA Design - course on Coursera
• Verilog tutorials and other resources on ASIC World