mcu/stm32xx: HAL Timer interrupt cleanup

Interrupts for used for timers differ from MCU to MCU. hal_timer.c had a lot of preprocessor conditions to select correct interrupt number name to be used for HAL timer. With each new MCU conditions were modified. Now MCU specific mcu/stm32_hal.h defines interrupts name that deviate from common practice while stm32_common/stm23_hal.h provides defaults that are most frequently found. Unified defines STM32_HAL_TIMER_TIMx_IRQ are used in hal_timer.c simplifying preprocess conditions. Signed-off-by: Jerzy Kasenberg <[email protected]>
apache · Jan 25, 2024 · 3e93553 · 3e93553
1 parent 64e4e36
commit 3e93553
Show file tree

Hide file tree

Showing 10 changed files with 119 additions and 57 deletions.
diff --git a/hw/mcu/stm/stm32_common/include/stm32_common/stm32_hal.h b/hw/mcu/stm/stm32_common/include/stm32_common/stm32_hal.h
@@ -43,6 +43,61 @@ extern "C" {
 uint32_t stm32_hal_timer_get_freq(void *timx);
 void stm32_periph_create(void);
 
+#ifndef STM32_HAL_TIMER_TIM1_IRQ
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_UP_TIM10_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM2_IRQ
+#define STM32_HAL_TIMER_TIM2_IRQ    TIM2_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM3_IRQ
+#define STM32_HAL_TIMER_TIM3_IRQ    TIM3_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM4_IRQ
+#define STM32_HAL_TIMER_TIM4_IRQ    TIM4_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM6_IRQ
+#define STM32_HAL_TIMER_TIM6_IRQ    TIM6_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM7_IRQ
+#define STM32_HAL_TIMER_TIM7_IRQ    TIM7_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM8_IRQ
+#define STM32_HAL_TIMER_TIM8_IRQ    TIM8_UP_TIM13_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM9_IRQ
+#define STM32_HAL_TIMER_TIM9_IRQ    TIM1_BRK_TIM9_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM10_IRQ
+#define STM32_HAL_TIMER_TIM10_IRQ   TIM1_UP_TIM10_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM11_IRQ
+#define STM32_HAL_TIMER_TIM11_IRQ   TIM1_TRG_COM_TIM11_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM12_IRQ
+#define STM32_HAL_TIMER_TIM12_IRQ   TIM8_BRK_TIM12_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM13_IRQ
+#define STM32_HAL_TIMER_TIM13_IRQ   TIM8_UP_TIM13_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM14_IRQ
+#define STM32_HAL_TIMER_TIM14_IRQ   TIM8_TRG_COM_TIM14_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM15_IRQ
+#define STM32_HAL_TIMER_TIM15_IRQ   TIM1_BRK_TIM15_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM16_IRQ
+#define STM32_HAL_TIMER_TIM16_IRQ   TIM1_UP_TIM16_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM17_IRQ
+#define STM32_HAL_TIMER_TIM17_IRQ   TIM1_TRG_COM_TIM17_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM21_IRQ
+#define STM32_HAL_TIMER_TIM21_IRQ   TIM21_IRQn
+#endif
+#ifndef STM32_HAL_TIMER_TIM22_IRQ
+#define STM32_HAL_TIMER_TIM22_IRQ   TIM22_IRQn
+#endif
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/hw/mcu/stm/stm32_common/src/hal_timer.c b/hw/mcu/stm/stm32_common/src/hal_timer.c
@@ -193,138 +193,109 @@ stm32_hw_setup(int num, TIM_TypeDef *regs)
 
 #ifdef TIM1
     if (regs == TIM1) {
-#if MYNEWT_VAL(MCU_STM32F0)
-        stm32_tmr_reg_irq(TIM1_CC_IRQn, func);
-#elif MYNEWT_VAL(MCU_STM32F3) || MYNEWT_VAL(MCU_STM32L4) || MYNEWT_VAL(MCU_STM32WB)
-        stm32_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
-#elif MYNEWT_VAL(MCU_STM32U5)
-        stm32_tmr_reg_irq(TIM1_UP_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM1_IRQ, func);
         __HAL_RCC_TIM1_CLK_ENABLE();
     }
 #endif
 #ifdef TIM2
     if (regs == TIM2) {
-        stm32_tmr_reg_irq(TIM2_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM2_IRQ, func);
         __HAL_RCC_TIM2_CLK_ENABLE();
     }
 #endif
 #ifdef TIM3
     if (regs == TIM3) {
-        stm32_tmr_reg_irq(TIM3_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM3_IRQ, func);
         __HAL_RCC_TIM3_CLK_ENABLE();
     }
 #endif
 #ifdef TIM4
     if (regs == TIM4) {
-        stm32_tmr_reg_irq(TIM4_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM4_IRQ, func);
         __HAL_RCC_TIM4_CLK_ENABLE();
     }
 #endif
+#ifdef TIM6
+    if (regs == TIM6) {
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM6_IRQ, func);
+        __HAL_RCC_TIM6_CLK_ENABLE();
+    }
+#endif
+#ifdef TIM7
+    if (regs == TIM7) {
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM7_IRQ, func);
+        __HAL_RCC_TIM7_CLK_ENABLE();
+    }
+#endif
 #ifdef TIM8
     if (regs == TIM8) {
-        stm32_tmr_reg_irq(TIM8_CC_IRQn, func);
-#if MYNEWT_VAL(MCU_STM32F3) || MYNEWT_VAL(MCU_STM32L4) || MYNEWT_VAL(MCU_STM32WB) || MYNEWT_VAL(MCU_STM32U5)
-        stm32_tmr_reg_irq(TIM8_UP_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM8_IRQ, func);
         __HAL_RCC_TIM8_CLK_ENABLE();
     }
 #endif
 #ifdef TIM9
     if (regs == TIM9) {
-#if MYNEWT_VAL(MCU_STM32L1)
-        stm32_tmr_reg_irq(TIM9_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_BRK_TIM9_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM9_IRQ, func);
         __HAL_RCC_TIM9_CLK_ENABLE();
     }
 #endif
 #ifdef TIM10
     if (regs == TIM10) {
-#if MYNEWT_VAL(MCU_STM32L1) || MYNEWT_VAL(MCU_STM32L4) || MYNEWT_VAL(MCU_STM32WB)
-        stm32_tmr_reg_irq(TIM10_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_UP_TIM10_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM10_IRQ, func);
         __HAL_RCC_TIM10_CLK_ENABLE();
     }
 #endif
 #ifdef TIM11
     if (regs == TIM11) {
-#if MYNEWT_VAL(MCU_STM32L1)
-        stm32_tmr_reg_irq(TIM11_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_TRG_COM_TIM11_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM11_IRQ, func);
         __HAL_RCC_TIM11_CLK_ENABLE();
     }
 #endif
 #ifdef TIM12
     if (regs == TIM12) {
-        stm32_tmr_reg_irq(TIM8_BRK_TIM12_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM12_IRQ, func);
         __HAL_RCC_TIM12_CLK_ENABLE();
     }
 #endif
 #ifdef TIM13
     if (regs == TIM13) {
-        stm32_tmr_reg_irq(TIM8_UP_TIM13_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM13_IRQ, func);
         __HAL_RCC_TIM13_CLK_ENABLE();
     }
 #endif
 #ifdef TIM14
     if (regs == TIM14) {
-#if MYNEWT_VAL(MCU_STM32F0)
-        stm32_tmr_reg_irq(TIM14_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM8_TRG_COM_TIM14_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM14_IRQ, func);
         __HAL_RCC_TIM14_CLK_ENABLE();
     }
 #endif
 #ifdef TIM15
     if (regs == TIM15) {
-#if MYNEWT_VAL(MCU_STM32F0) || MYNEWT_VAL(MCU_STM32H7) || MYNEWT_VAL(MCU_STM32U5)
-        stm32_tmr_reg_irq(TIM15_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_BRK_TIM15_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM15_IRQ, func);
         __HAL_RCC_TIM15_CLK_ENABLE();
     }
 #endif
 #ifdef TIM16
     if (regs == TIM16) {
-#if MYNEWT_VAL(MCU_STM32F0) || MYNEWT_VAL(MCU_STM32H7) || MYNEWT_VAL(MCU_STM32U5)
-        stm32_tmr_reg_irq(TIM16_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_UP_TIM16_IRQn, func);
-#endif
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM16_IRQ, func);
         __HAL_RCC_TIM16_CLK_ENABLE();
     }
 #endif
 #ifdef TIM17
     if (regs == TIM17) {
-#if MYNEWT_VAL(MCU_STM32F0) || MYNEWT_VAL(MCU_STM32H7) || MYNEWT_VAL(MCU_STM32U5)
-        stm32_tmr_reg_irq(TIM17_IRQn, func);
-#else
-        stm32_tmr_reg_irq(TIM1_TRG_COM_TIM17_IRQn, func);
-#endif 
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM17_IRQ, func);
         __HAL_RCC_TIM17_CLK_ENABLE();
     }
 #endif
 #ifdef TIM21
     if (regs == TIM21) {
-        stm32_tmr_reg_irq(TIM21_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM21_IRQ, func);
         __HAL_RCC_TIM21_CLK_ENABLE();
     }
 #endif
 #ifdef TIM22
     if (regs == TIM22) {
-        stm32_tmr_reg_irq(TIM22_IRQn, func);
+        stm32_tmr_reg_irq(STM32_HAL_TIMER_TIM22_IRQ, func);
         __HAL_RCC_TIM22_CLK_ENABLE();
     }
 #endif

diff --git a/hw/mcu/stm/stm32f0xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f0xx/include/mcu/stm32_hal.h
@@ -75,6 +75,12 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_CC_IRQn
+#define STM32_HAL_TIMER_TIM14_IRQ   TIM14_IRQn
+#define STM32_HAL_TIMER_TIM15_IRQ   TIM15_IRQn
+#define STM32_HAL_TIMER_TIM16_IRQ   TIM16_IRQn
+#define STM32_HAL_TIMER_TIM17_IRQ   TIM17_IRQn
+
 /* hal_flash */
 #include "stm32f0xx_hal_def.h"
 #include "stm32f0xx_hal_flash.h"

diff --git a/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f3xx/include/mcu/stm32_hal.h
@@ -75,6 +75,10 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_UP_TIM16_IRQn
+#define STM32_HAL_TIMER_TIM6_IRQ    TIM6_DAC_IRQn
+#define STM32_HAL_TIMER_TIM8_IRQ    TIM8_UP_IRQn
+
 /* hal_flash */
 #include "stm32f3xx_hal_def.h"
 #include "stm32f3xx_hal_flash.h"

diff --git a/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32f7xx/include/mcu/stm32_hal.h
@@ -77,6 +77,8 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM6_IRQ    TIM6_DAC_IRQn
+
 /* hw/drivers/trng */
 #include "stm32f7xx_hal_rng.h"
 

diff --git a/hw/mcu/stm/stm32h7xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32h7xx/include/mcu/stm32_hal.h
@@ -72,6 +72,10 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM15_IRQ   TIM15_IRQn
+#define STM32_HAL_TIMER_TIM16_IRQ   TIM16_IRQn
+#define STM32_HAL_TIMER_TIM17_IRQ   TIM17_IRQn
+
 /* hw/drivers/trng */
 #include "stm32h7xx_hal_rng.h"
 

diff --git a/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32l1xx/include/mcu/stm32_hal.h
@@ -73,6 +73,10 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM9_IRQ    TIM9_IRQn
+#define STM32_HAL_TIMER_TIM10_IRQ   TIM10_IRQn
+#define STM32_HAL_TIMER_TIM11_IRQ   TIM11_IRQn
+
 /* hal_flash */
 #include "stm32l1xx_hal_def.h"
 #include "stm32l1xx_hal_flash.h"

diff --git a/hw/mcu/stm/stm32l4xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32l4xx/include/mcu/stm32_hal.h
@@ -67,6 +67,12 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_UP_TIM16_IRQn
+#define STM32_HAL_TIMER_TIM6_IRQ    TIM6_DAC_IRQn
+#define STM32_HAL_TIMER_TIM8_IRQ    TIM8_UP_IRQn
+#define STM32_HAL_TIMER_TIM10_IRQ   TIM10_IRQn
+
+
 #define STM32_HAL_FLASH_INIT()        \
     do {                              \
         HAL_FLASH_Unlock();           \

diff --git a/hw/mcu/stm/stm32u5xx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32u5xx/include/mcu/stm32_hal.h
@@ -63,6 +63,12 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_UP_IRQn
+#define STM32_HAL_TIMER_TIM8_IRQ    TIM8_UP_IRQn
+#define STM32_HAL_TIMER_TIM15_IRQ   TIM15_IRQn
+#define STM32_HAL_TIMER_TIM16_IRQ   TIM16_IRQn
+#define STM32_HAL_TIMER_TIM17_IRQ   TIM17_IRQn
+
 #define STM32_HAL_FLASH_INIT()        \
     do {                              \
         HAL_FLASH_Unlock();           \

diff --git a/hw/mcu/stm/stm32wbxx/include/mcu/stm32_hal.h b/hw/mcu/stm/stm32wbxx/include/mcu/stm32_hal.h
@@ -72,6 +72,10 @@ struct stm32_hal_spi_cfg {
 
 #define STM32_HAL_TIMER_MAX     (3)
 
+#define STM32_HAL_TIMER_TIM1_IRQ    TIM1_UP_TIM16_IRQn
+#define STM32_HAL_TIMER_TIM8_IRQ    TIM8_UP_IRQn
+#define STM32_HAL_TIMER_TIM10_IRQ   TIM10_IRQn
+
 #define STM32_HAL_FLASH_INIT()        \
     do {                              \
         HAL_FLASH_Unlock();           \